1// Code generated from _gen/386.rules using 'go generate'; DO NOT EDIT.
2
3package ssa
4
5import "math"
6import "cmd/compile/internal/types"
7
8func rewriteValue386(v *Value) bool {
9	switch v.Op {
10	case Op386ADCL:
11		return rewriteValue386_Op386ADCL(v)
12	case Op386ADDL:
13		return rewriteValue386_Op386ADDL(v)
14	case Op386ADDLcarry:
15		return rewriteValue386_Op386ADDLcarry(v)
16	case Op386ADDLconst:
17		return rewriteValue386_Op386ADDLconst(v)
18	case Op386ADDLconstmodify:
19		return rewriteValue386_Op386ADDLconstmodify(v)
20	case Op386ADDLload:
21		return rewriteValue386_Op386ADDLload(v)
22	case Op386ADDLmodify:
23		return rewriteValue386_Op386ADDLmodify(v)
24	case Op386ADDSD:
25		return rewriteValue386_Op386ADDSD(v)
26	case Op386ADDSDload:
27		return rewriteValue386_Op386ADDSDload(v)
28	case Op386ADDSS:
29		return rewriteValue386_Op386ADDSS(v)
30	case Op386ADDSSload:
31		return rewriteValue386_Op386ADDSSload(v)
32	case Op386ANDL:
33		return rewriteValue386_Op386ANDL(v)
34	case Op386ANDLconst:
35		return rewriteValue386_Op386ANDLconst(v)
36	case Op386ANDLconstmodify:
37		return rewriteValue386_Op386ANDLconstmodify(v)
38	case Op386ANDLload:
39		return rewriteValue386_Op386ANDLload(v)
40	case Op386ANDLmodify:
41		return rewriteValue386_Op386ANDLmodify(v)
42	case Op386CMPB:
43		return rewriteValue386_Op386CMPB(v)
44	case Op386CMPBconst:
45		return rewriteValue386_Op386CMPBconst(v)
46	case Op386CMPBload:
47		return rewriteValue386_Op386CMPBload(v)
48	case Op386CMPL:
49		return rewriteValue386_Op386CMPL(v)
50	case Op386CMPLconst:
51		return rewriteValue386_Op386CMPLconst(v)
52	case Op386CMPLload:
53		return rewriteValue386_Op386CMPLload(v)
54	case Op386CMPW:
55		return rewriteValue386_Op386CMPW(v)
56	case Op386CMPWconst:
57		return rewriteValue386_Op386CMPWconst(v)
58	case Op386CMPWload:
59		return rewriteValue386_Op386CMPWload(v)
60	case Op386DIVSD:
61		return rewriteValue386_Op386DIVSD(v)
62	case Op386DIVSDload:
63		return rewriteValue386_Op386DIVSDload(v)
64	case Op386DIVSS:
65		return rewriteValue386_Op386DIVSS(v)
66	case Op386DIVSSload:
67		return rewriteValue386_Op386DIVSSload(v)
68	case Op386LEAL:
69		return rewriteValue386_Op386LEAL(v)
70	case Op386LEAL1:
71		return rewriteValue386_Op386LEAL1(v)
72	case Op386LEAL2:
73		return rewriteValue386_Op386LEAL2(v)
74	case Op386LEAL4:
75		return rewriteValue386_Op386LEAL4(v)
76	case Op386LEAL8:
77		return rewriteValue386_Op386LEAL8(v)
78	case Op386MOVBLSX:
79		return rewriteValue386_Op386MOVBLSX(v)
80	case Op386MOVBLSXload:
81		return rewriteValue386_Op386MOVBLSXload(v)
82	case Op386MOVBLZX:
83		return rewriteValue386_Op386MOVBLZX(v)
84	case Op386MOVBload:
85		return rewriteValue386_Op386MOVBload(v)
86	case Op386MOVBstore:
87		return rewriteValue386_Op386MOVBstore(v)
88	case Op386MOVBstoreconst:
89		return rewriteValue386_Op386MOVBstoreconst(v)
90	case Op386MOVLload:
91		return rewriteValue386_Op386MOVLload(v)
92	case Op386MOVLstore:
93		return rewriteValue386_Op386MOVLstore(v)
94	case Op386MOVLstoreconst:
95		return rewriteValue386_Op386MOVLstoreconst(v)
96	case Op386MOVSDconst:
97		return rewriteValue386_Op386MOVSDconst(v)
98	case Op386MOVSDload:
99		return rewriteValue386_Op386MOVSDload(v)
100	case Op386MOVSDstore:
101		return rewriteValue386_Op386MOVSDstore(v)
102	case Op386MOVSSconst:
103		return rewriteValue386_Op386MOVSSconst(v)
104	case Op386MOVSSload:
105		return rewriteValue386_Op386MOVSSload(v)
106	case Op386MOVSSstore:
107		return rewriteValue386_Op386MOVSSstore(v)
108	case Op386MOVWLSX:
109		return rewriteValue386_Op386MOVWLSX(v)
110	case Op386MOVWLSXload:
111		return rewriteValue386_Op386MOVWLSXload(v)
112	case Op386MOVWLZX:
113		return rewriteValue386_Op386MOVWLZX(v)
114	case Op386MOVWload:
115		return rewriteValue386_Op386MOVWload(v)
116	case Op386MOVWstore:
117		return rewriteValue386_Op386MOVWstore(v)
118	case Op386MOVWstoreconst:
119		return rewriteValue386_Op386MOVWstoreconst(v)
120	case Op386MULL:
121		return rewriteValue386_Op386MULL(v)
122	case Op386MULLconst:
123		return rewriteValue386_Op386MULLconst(v)
124	case Op386MULLload:
125		return rewriteValue386_Op386MULLload(v)
126	case Op386MULSD:
127		return rewriteValue386_Op386MULSD(v)
128	case Op386MULSDload:
129		return rewriteValue386_Op386MULSDload(v)
130	case Op386MULSS:
131		return rewriteValue386_Op386MULSS(v)
132	case Op386MULSSload:
133		return rewriteValue386_Op386MULSSload(v)
134	case Op386NEGL:
135		return rewriteValue386_Op386NEGL(v)
136	case Op386NOTL:
137		return rewriteValue386_Op386NOTL(v)
138	case Op386ORL:
139		return rewriteValue386_Op386ORL(v)
140	case Op386ORLconst:
141		return rewriteValue386_Op386ORLconst(v)
142	case Op386ORLconstmodify:
143		return rewriteValue386_Op386ORLconstmodify(v)
144	case Op386ORLload:
145		return rewriteValue386_Op386ORLload(v)
146	case Op386ORLmodify:
147		return rewriteValue386_Op386ORLmodify(v)
148	case Op386ROLB:
149		return rewriteValue386_Op386ROLB(v)
150	case Op386ROLBconst:
151		return rewriteValue386_Op386ROLBconst(v)
152	case Op386ROLL:
153		return rewriteValue386_Op386ROLL(v)
154	case Op386ROLLconst:
155		return rewriteValue386_Op386ROLLconst(v)
156	case Op386ROLW:
157		return rewriteValue386_Op386ROLW(v)
158	case Op386ROLWconst:
159		return rewriteValue386_Op386ROLWconst(v)
160	case Op386SARB:
161		return rewriteValue386_Op386SARB(v)
162	case Op386SARBconst:
163		return rewriteValue386_Op386SARBconst(v)
164	case Op386SARL:
165		return rewriteValue386_Op386SARL(v)
166	case Op386SARLconst:
167		return rewriteValue386_Op386SARLconst(v)
168	case Op386SARW:
169		return rewriteValue386_Op386SARW(v)
170	case Op386SARWconst:
171		return rewriteValue386_Op386SARWconst(v)
172	case Op386SBBL:
173		return rewriteValue386_Op386SBBL(v)
174	case Op386SBBLcarrymask:
175		return rewriteValue386_Op386SBBLcarrymask(v)
176	case Op386SETA:
177		return rewriteValue386_Op386SETA(v)
178	case Op386SETAE:
179		return rewriteValue386_Op386SETAE(v)
180	case Op386SETB:
181		return rewriteValue386_Op386SETB(v)
182	case Op386SETBE:
183		return rewriteValue386_Op386SETBE(v)
184	case Op386SETEQ:
185		return rewriteValue386_Op386SETEQ(v)
186	case Op386SETG:
187		return rewriteValue386_Op386SETG(v)
188	case Op386SETGE:
189		return rewriteValue386_Op386SETGE(v)
190	case Op386SETL:
191		return rewriteValue386_Op386SETL(v)
192	case Op386SETLE:
193		return rewriteValue386_Op386SETLE(v)
194	case Op386SETNE:
195		return rewriteValue386_Op386SETNE(v)
196	case Op386SHLL:
197		return rewriteValue386_Op386SHLL(v)
198	case Op386SHLLconst:
199		return rewriteValue386_Op386SHLLconst(v)
200	case Op386SHRB:
201		return rewriteValue386_Op386SHRB(v)
202	case Op386SHRBconst:
203		return rewriteValue386_Op386SHRBconst(v)
204	case Op386SHRL:
205		return rewriteValue386_Op386SHRL(v)
206	case Op386SHRLconst:
207		return rewriteValue386_Op386SHRLconst(v)
208	case Op386SHRW:
209		return rewriteValue386_Op386SHRW(v)
210	case Op386SHRWconst:
211		return rewriteValue386_Op386SHRWconst(v)
212	case Op386SUBL:
213		return rewriteValue386_Op386SUBL(v)
214	case Op386SUBLcarry:
215		return rewriteValue386_Op386SUBLcarry(v)
216	case Op386SUBLconst:
217		return rewriteValue386_Op386SUBLconst(v)
218	case Op386SUBLload:
219		return rewriteValue386_Op386SUBLload(v)
220	case Op386SUBLmodify:
221		return rewriteValue386_Op386SUBLmodify(v)
222	case Op386SUBSD:
223		return rewriteValue386_Op386SUBSD(v)
224	case Op386SUBSDload:
225		return rewriteValue386_Op386SUBSDload(v)
226	case Op386SUBSS:
227		return rewriteValue386_Op386SUBSS(v)
228	case Op386SUBSSload:
229		return rewriteValue386_Op386SUBSSload(v)
230	case Op386XORL:
231		return rewriteValue386_Op386XORL(v)
232	case Op386XORLconst:
233		return rewriteValue386_Op386XORLconst(v)
234	case Op386XORLconstmodify:
235		return rewriteValue386_Op386XORLconstmodify(v)
236	case Op386XORLload:
237		return rewriteValue386_Op386XORLload(v)
238	case Op386XORLmodify:
239		return rewriteValue386_Op386XORLmodify(v)
240	case OpAdd16:
241		v.Op = Op386ADDL
242		return true
243	case OpAdd32:
244		v.Op = Op386ADDL
245		return true
246	case OpAdd32F:
247		v.Op = Op386ADDSS
248		return true
249	case OpAdd32carry:
250		v.Op = Op386ADDLcarry
251		return true
252	case OpAdd32withcarry:
253		v.Op = Op386ADCL
254		return true
255	case OpAdd64F:
256		v.Op = Op386ADDSD
257		return true
258	case OpAdd8:
259		v.Op = Op386ADDL
260		return true
261	case OpAddPtr:
262		v.Op = Op386ADDL
263		return true
264	case OpAddr:
265		return rewriteValue386_OpAddr(v)
266	case OpAnd16:
267		v.Op = Op386ANDL
268		return true
269	case OpAnd32:
270		v.Op = Op386ANDL
271		return true
272	case OpAnd8:
273		v.Op = Op386ANDL
274		return true
275	case OpAndB:
276		v.Op = Op386ANDL
277		return true
278	case OpAvg32u:
279		v.Op = Op386AVGLU
280		return true
281	case OpBswap16:
282		return rewriteValue386_OpBswap16(v)
283	case OpBswap32:
284		v.Op = Op386BSWAPL
285		return true
286	case OpClosureCall:
287		v.Op = Op386CALLclosure
288		return true
289	case OpCom16:
290		v.Op = Op386NOTL
291		return true
292	case OpCom32:
293		v.Op = Op386NOTL
294		return true
295	case OpCom8:
296		v.Op = Op386NOTL
297		return true
298	case OpConst16:
299		return rewriteValue386_OpConst16(v)
300	case OpConst32:
301		v.Op = Op386MOVLconst
302		return true
303	case OpConst32F:
304		v.Op = Op386MOVSSconst
305		return true
306	case OpConst64F:
307		v.Op = Op386MOVSDconst
308		return true
309	case OpConst8:
310		return rewriteValue386_OpConst8(v)
311	case OpConstBool:
312		return rewriteValue386_OpConstBool(v)
313	case OpConstNil:
314		return rewriteValue386_OpConstNil(v)
315	case OpCtz16:
316		return rewriteValue386_OpCtz16(v)
317	case OpCtz16NonZero:
318		v.Op = Op386BSFL
319		return true
320	case OpCtz32:
321		v.Op = Op386LoweredCtz32
322		return true
323	case OpCtz32NonZero:
324		v.Op = Op386BSFL
325		return true
326	case OpCtz8:
327		return rewriteValue386_OpCtz8(v)
328	case OpCtz8NonZero:
329		v.Op = Op386BSFL
330		return true
331	case OpCvt32Fto32:
332		v.Op = Op386CVTTSS2SL
333		return true
334	case OpCvt32Fto64F:
335		v.Op = Op386CVTSS2SD
336		return true
337	case OpCvt32to32F:
338		v.Op = Op386CVTSL2SS
339		return true
340	case OpCvt32to64F:
341		v.Op = Op386CVTSL2SD
342		return true
343	case OpCvt64Fto32:
344		v.Op = Op386CVTTSD2SL
345		return true
346	case OpCvt64Fto32F:
347		v.Op = Op386CVTSD2SS
348		return true
349	case OpCvtBoolToUint8:
350		v.Op = OpCopy
351		return true
352	case OpDiv16:
353		v.Op = Op386DIVW
354		return true
355	case OpDiv16u:
356		v.Op = Op386DIVWU
357		return true
358	case OpDiv32:
359		v.Op = Op386DIVL
360		return true
361	case OpDiv32F:
362		v.Op = Op386DIVSS
363		return true
364	case OpDiv32u:
365		v.Op = Op386DIVLU
366		return true
367	case OpDiv64F:
368		v.Op = Op386DIVSD
369		return true
370	case OpDiv8:
371		return rewriteValue386_OpDiv8(v)
372	case OpDiv8u:
373		return rewriteValue386_OpDiv8u(v)
374	case OpEq16:
375		return rewriteValue386_OpEq16(v)
376	case OpEq32:
377		return rewriteValue386_OpEq32(v)
378	case OpEq32F:
379		return rewriteValue386_OpEq32F(v)
380	case OpEq64F:
381		return rewriteValue386_OpEq64F(v)
382	case OpEq8:
383		return rewriteValue386_OpEq8(v)
384	case OpEqB:
385		return rewriteValue386_OpEqB(v)
386	case OpEqPtr:
387		return rewriteValue386_OpEqPtr(v)
388	case OpGetCallerPC:
389		v.Op = Op386LoweredGetCallerPC
390		return true
391	case OpGetCallerSP:
392		v.Op = Op386LoweredGetCallerSP
393		return true
394	case OpGetClosurePtr:
395		v.Op = Op386LoweredGetClosurePtr
396		return true
397	case OpGetG:
398		v.Op = Op386LoweredGetG
399		return true
400	case OpHmul32:
401		v.Op = Op386HMULL
402		return true
403	case OpHmul32u:
404		v.Op = Op386HMULLU
405		return true
406	case OpInterCall:
407		v.Op = Op386CALLinter
408		return true
409	case OpIsInBounds:
410		return rewriteValue386_OpIsInBounds(v)
411	case OpIsNonNil:
412		return rewriteValue386_OpIsNonNil(v)
413	case OpIsSliceInBounds:
414		return rewriteValue386_OpIsSliceInBounds(v)
415	case OpLeq16:
416		return rewriteValue386_OpLeq16(v)
417	case OpLeq16U:
418		return rewriteValue386_OpLeq16U(v)
419	case OpLeq32:
420		return rewriteValue386_OpLeq32(v)
421	case OpLeq32F:
422		return rewriteValue386_OpLeq32F(v)
423	case OpLeq32U:
424		return rewriteValue386_OpLeq32U(v)
425	case OpLeq64F:
426		return rewriteValue386_OpLeq64F(v)
427	case OpLeq8:
428		return rewriteValue386_OpLeq8(v)
429	case OpLeq8U:
430		return rewriteValue386_OpLeq8U(v)
431	case OpLess16:
432		return rewriteValue386_OpLess16(v)
433	case OpLess16U:
434		return rewriteValue386_OpLess16U(v)
435	case OpLess32:
436		return rewriteValue386_OpLess32(v)
437	case OpLess32F:
438		return rewriteValue386_OpLess32F(v)
439	case OpLess32U:
440		return rewriteValue386_OpLess32U(v)
441	case OpLess64F:
442		return rewriteValue386_OpLess64F(v)
443	case OpLess8:
444		return rewriteValue386_OpLess8(v)
445	case OpLess8U:
446		return rewriteValue386_OpLess8U(v)
447	case OpLoad:
448		return rewriteValue386_OpLoad(v)
449	case OpLocalAddr:
450		return rewriteValue386_OpLocalAddr(v)
451	case OpLsh16x16:
452		return rewriteValue386_OpLsh16x16(v)
453	case OpLsh16x32:
454		return rewriteValue386_OpLsh16x32(v)
455	case OpLsh16x64:
456		return rewriteValue386_OpLsh16x64(v)
457	case OpLsh16x8:
458		return rewriteValue386_OpLsh16x8(v)
459	case OpLsh32x16:
460		return rewriteValue386_OpLsh32x16(v)
461	case OpLsh32x32:
462		return rewriteValue386_OpLsh32x32(v)
463	case OpLsh32x64:
464		return rewriteValue386_OpLsh32x64(v)
465	case OpLsh32x8:
466		return rewriteValue386_OpLsh32x8(v)
467	case OpLsh8x16:
468		return rewriteValue386_OpLsh8x16(v)
469	case OpLsh8x32:
470		return rewriteValue386_OpLsh8x32(v)
471	case OpLsh8x64:
472		return rewriteValue386_OpLsh8x64(v)
473	case OpLsh8x8:
474		return rewriteValue386_OpLsh8x8(v)
475	case OpMod16:
476		v.Op = Op386MODW
477		return true
478	case OpMod16u:
479		v.Op = Op386MODWU
480		return true
481	case OpMod32:
482		v.Op = Op386MODL
483		return true
484	case OpMod32u:
485		v.Op = Op386MODLU
486		return true
487	case OpMod8:
488		return rewriteValue386_OpMod8(v)
489	case OpMod8u:
490		return rewriteValue386_OpMod8u(v)
491	case OpMove:
492		return rewriteValue386_OpMove(v)
493	case OpMul16:
494		v.Op = Op386MULL
495		return true
496	case OpMul32:
497		v.Op = Op386MULL
498		return true
499	case OpMul32F:
500		v.Op = Op386MULSS
501		return true
502	case OpMul32uhilo:
503		v.Op = Op386MULLQU
504		return true
505	case OpMul64F:
506		v.Op = Op386MULSD
507		return true
508	case OpMul8:
509		v.Op = Op386MULL
510		return true
511	case OpNeg16:
512		v.Op = Op386NEGL
513		return true
514	case OpNeg32:
515		v.Op = Op386NEGL
516		return true
517	case OpNeg32F:
518		return rewriteValue386_OpNeg32F(v)
519	case OpNeg64F:
520		return rewriteValue386_OpNeg64F(v)
521	case OpNeg8:
522		v.Op = Op386NEGL
523		return true
524	case OpNeq16:
525		return rewriteValue386_OpNeq16(v)
526	case OpNeq32:
527		return rewriteValue386_OpNeq32(v)
528	case OpNeq32F:
529		return rewriteValue386_OpNeq32F(v)
530	case OpNeq64F:
531		return rewriteValue386_OpNeq64F(v)
532	case OpNeq8:
533		return rewriteValue386_OpNeq8(v)
534	case OpNeqB:
535		return rewriteValue386_OpNeqB(v)
536	case OpNeqPtr:
537		return rewriteValue386_OpNeqPtr(v)
538	case OpNilCheck:
539		v.Op = Op386LoweredNilCheck
540		return true
541	case OpNot:
542		return rewriteValue386_OpNot(v)
543	case OpOffPtr:
544		return rewriteValue386_OpOffPtr(v)
545	case OpOr16:
546		v.Op = Op386ORL
547		return true
548	case OpOr32:
549		v.Op = Op386ORL
550		return true
551	case OpOr8:
552		v.Op = Op386ORL
553		return true
554	case OpOrB:
555		v.Op = Op386ORL
556		return true
557	case OpPanicBounds:
558		return rewriteValue386_OpPanicBounds(v)
559	case OpPanicExtend:
560		return rewriteValue386_OpPanicExtend(v)
561	case OpRotateLeft16:
562		v.Op = Op386ROLW
563		return true
564	case OpRotateLeft32:
565		v.Op = Op386ROLL
566		return true
567	case OpRotateLeft8:
568		v.Op = Op386ROLB
569		return true
570	case OpRound32F:
571		v.Op = OpCopy
572		return true
573	case OpRound64F:
574		v.Op = OpCopy
575		return true
576	case OpRsh16Ux16:
577		return rewriteValue386_OpRsh16Ux16(v)
578	case OpRsh16Ux32:
579		return rewriteValue386_OpRsh16Ux32(v)
580	case OpRsh16Ux64:
581		return rewriteValue386_OpRsh16Ux64(v)
582	case OpRsh16Ux8:
583		return rewriteValue386_OpRsh16Ux8(v)
584	case OpRsh16x16:
585		return rewriteValue386_OpRsh16x16(v)
586	case OpRsh16x32:
587		return rewriteValue386_OpRsh16x32(v)
588	case OpRsh16x64:
589		return rewriteValue386_OpRsh16x64(v)
590	case OpRsh16x8:
591		return rewriteValue386_OpRsh16x8(v)
592	case OpRsh32Ux16:
593		return rewriteValue386_OpRsh32Ux16(v)
594	case OpRsh32Ux32:
595		return rewriteValue386_OpRsh32Ux32(v)
596	case OpRsh32Ux64:
597		return rewriteValue386_OpRsh32Ux64(v)
598	case OpRsh32Ux8:
599		return rewriteValue386_OpRsh32Ux8(v)
600	case OpRsh32x16:
601		return rewriteValue386_OpRsh32x16(v)
602	case OpRsh32x32:
603		return rewriteValue386_OpRsh32x32(v)
604	case OpRsh32x64:
605		return rewriteValue386_OpRsh32x64(v)
606	case OpRsh32x8:
607		return rewriteValue386_OpRsh32x8(v)
608	case OpRsh8Ux16:
609		return rewriteValue386_OpRsh8Ux16(v)
610	case OpRsh8Ux32:
611		return rewriteValue386_OpRsh8Ux32(v)
612	case OpRsh8Ux64:
613		return rewriteValue386_OpRsh8Ux64(v)
614	case OpRsh8Ux8:
615		return rewriteValue386_OpRsh8Ux8(v)
616	case OpRsh8x16:
617		return rewriteValue386_OpRsh8x16(v)
618	case OpRsh8x32:
619		return rewriteValue386_OpRsh8x32(v)
620	case OpRsh8x64:
621		return rewriteValue386_OpRsh8x64(v)
622	case OpRsh8x8:
623		return rewriteValue386_OpRsh8x8(v)
624	case OpSelect0:
625		return rewriteValue386_OpSelect0(v)
626	case OpSelect1:
627		return rewriteValue386_OpSelect1(v)
628	case OpSignExt16to32:
629		v.Op = Op386MOVWLSX
630		return true
631	case OpSignExt8to16:
632		v.Op = Op386MOVBLSX
633		return true
634	case OpSignExt8to32:
635		v.Op = Op386MOVBLSX
636		return true
637	case OpSignmask:
638		return rewriteValue386_OpSignmask(v)
639	case OpSlicemask:
640		return rewriteValue386_OpSlicemask(v)
641	case OpSqrt:
642		v.Op = Op386SQRTSD
643		return true
644	case OpSqrt32:
645		v.Op = Op386SQRTSS
646		return true
647	case OpStaticCall:
648		v.Op = Op386CALLstatic
649		return true
650	case OpStore:
651		return rewriteValue386_OpStore(v)
652	case OpSub16:
653		v.Op = Op386SUBL
654		return true
655	case OpSub32:
656		v.Op = Op386SUBL
657		return true
658	case OpSub32F:
659		v.Op = Op386SUBSS
660		return true
661	case OpSub32carry:
662		v.Op = Op386SUBLcarry
663		return true
664	case OpSub32withcarry:
665		v.Op = Op386SBBL
666		return true
667	case OpSub64F:
668		v.Op = Op386SUBSD
669		return true
670	case OpSub8:
671		v.Op = Op386SUBL
672		return true
673	case OpSubPtr:
674		v.Op = Op386SUBL
675		return true
676	case OpTailCall:
677		v.Op = Op386CALLtail
678		return true
679	case OpTrunc16to8:
680		v.Op = OpCopy
681		return true
682	case OpTrunc32to16:
683		v.Op = OpCopy
684		return true
685	case OpTrunc32to8:
686		v.Op = OpCopy
687		return true
688	case OpWB:
689		v.Op = Op386LoweredWB
690		return true
691	case OpXor16:
692		v.Op = Op386XORL
693		return true
694	case OpXor32:
695		v.Op = Op386XORL
696		return true
697	case OpXor8:
698		v.Op = Op386XORL
699		return true
700	case OpZero:
701		return rewriteValue386_OpZero(v)
702	case OpZeroExt16to32:
703		v.Op = Op386MOVWLZX
704		return true
705	case OpZeroExt8to16:
706		v.Op = Op386MOVBLZX
707		return true
708	case OpZeroExt8to32:
709		v.Op = Op386MOVBLZX
710		return true
711	case OpZeromask:
712		return rewriteValue386_OpZeromask(v)
713	}
714	return false
715}
716func rewriteValue386_Op386ADCL(v *Value) bool {
717	v_2 := v.Args[2]
718	v_1 := v.Args[1]
719	v_0 := v.Args[0]
720	// match: (ADCL x (MOVLconst [c]) f)
721	// result: (ADCLconst [c] x f)
722	for {
723		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
724			x := v_0
725			if v_1.Op != Op386MOVLconst {
726				continue
727			}
728			c := auxIntToInt32(v_1.AuxInt)
729			f := v_2
730			v.reset(Op386ADCLconst)
731			v.AuxInt = int32ToAuxInt(c)
732			v.AddArg2(x, f)
733			return true
734		}
735		break
736	}
737	return false
738}
739func rewriteValue386_Op386ADDL(v *Value) bool {
740	v_1 := v.Args[1]
741	v_0 := v.Args[0]
742	// match: (ADDL x (MOVLconst <t> [c]))
743	// cond: !t.IsPtr()
744	// result: (ADDLconst [c] x)
745	for {
746		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
747			x := v_0
748			if v_1.Op != Op386MOVLconst {
749				continue
750			}
751			t := v_1.Type
752			c := auxIntToInt32(v_1.AuxInt)
753			if !(!t.IsPtr()) {
754				continue
755			}
756			v.reset(Op386ADDLconst)
757			v.AuxInt = int32ToAuxInt(c)
758			v.AddArg(x)
759			return true
760		}
761		break
762	}
763	// match: (ADDL x (SHLLconst [3] y))
764	// result: (LEAL8 x y)
765	for {
766		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
767			x := v_0
768			if v_1.Op != Op386SHLLconst || auxIntToInt32(v_1.AuxInt) != 3 {
769				continue
770			}
771			y := v_1.Args[0]
772			v.reset(Op386LEAL8)
773			v.AddArg2(x, y)
774			return true
775		}
776		break
777	}
778	// match: (ADDL x (SHLLconst [2] y))
779	// result: (LEAL4 x y)
780	for {
781		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
782			x := v_0
783			if v_1.Op != Op386SHLLconst || auxIntToInt32(v_1.AuxInt) != 2 {
784				continue
785			}
786			y := v_1.Args[0]
787			v.reset(Op386LEAL4)
788			v.AddArg2(x, y)
789			return true
790		}
791		break
792	}
793	// match: (ADDL x (SHLLconst [1] y))
794	// result: (LEAL2 x y)
795	for {
796		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
797			x := v_0
798			if v_1.Op != Op386SHLLconst || auxIntToInt32(v_1.AuxInt) != 1 {
799				continue
800			}
801			y := v_1.Args[0]
802			v.reset(Op386LEAL2)
803			v.AddArg2(x, y)
804			return true
805		}
806		break
807	}
808	// match: (ADDL x (ADDL y y))
809	// result: (LEAL2 x y)
810	for {
811		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
812			x := v_0
813			if v_1.Op != Op386ADDL {
814				continue
815			}
816			y := v_1.Args[1]
817			if y != v_1.Args[0] {
818				continue
819			}
820			v.reset(Op386LEAL2)
821			v.AddArg2(x, y)
822			return true
823		}
824		break
825	}
826	// match: (ADDL x (ADDL x y))
827	// result: (LEAL2 y x)
828	for {
829		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
830			x := v_0
831			if v_1.Op != Op386ADDL {
832				continue
833			}
834			_ = v_1.Args[1]
835			v_1_0 := v_1.Args[0]
836			v_1_1 := v_1.Args[1]
837			for _i1 := 0; _i1 <= 1; _i1, v_1_0, v_1_1 = _i1+1, v_1_1, v_1_0 {
838				if x != v_1_0 {
839					continue
840				}
841				y := v_1_1
842				v.reset(Op386LEAL2)
843				v.AddArg2(y, x)
844				return true
845			}
846		}
847		break
848	}
849	// match: (ADDL (ADDLconst [c] x) y)
850	// result: (LEAL1 [c] x y)
851	for {
852		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
853			if v_0.Op != Op386ADDLconst {
854				continue
855			}
856			c := auxIntToInt32(v_0.AuxInt)
857			x := v_0.Args[0]
858			y := v_1
859			v.reset(Op386LEAL1)
860			v.AuxInt = int32ToAuxInt(c)
861			v.AddArg2(x, y)
862			return true
863		}
864		break
865	}
866	// match: (ADDL x (LEAL [c] {s} y))
867	// cond: x.Op != OpSB && y.Op != OpSB
868	// result: (LEAL1 [c] {s} x y)
869	for {
870		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
871			x := v_0
872			if v_1.Op != Op386LEAL {
873				continue
874			}
875			c := auxIntToInt32(v_1.AuxInt)
876			s := auxToSym(v_1.Aux)
877			y := v_1.Args[0]
878			if !(x.Op != OpSB && y.Op != OpSB) {
879				continue
880			}
881			v.reset(Op386LEAL1)
882			v.AuxInt = int32ToAuxInt(c)
883			v.Aux = symToAux(s)
884			v.AddArg2(x, y)
885			return true
886		}
887		break
888	}
889	// match: (ADDL x l:(MOVLload [off] {sym} ptr mem))
890	// cond: canMergeLoadClobber(v, l, x) && clobber(l)
891	// result: (ADDLload x [off] {sym} ptr mem)
892	for {
893		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
894			x := v_0
895			l := v_1
896			if l.Op != Op386MOVLload {
897				continue
898			}
899			off := auxIntToInt32(l.AuxInt)
900			sym := auxToSym(l.Aux)
901			mem := l.Args[1]
902			ptr := l.Args[0]
903			if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
904				continue
905			}
906			v.reset(Op386ADDLload)
907			v.AuxInt = int32ToAuxInt(off)
908			v.Aux = symToAux(sym)
909			v.AddArg3(x, ptr, mem)
910			return true
911		}
912		break
913	}
914	// match: (ADDL x (NEGL y))
915	// result: (SUBL x y)
916	for {
917		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
918			x := v_0
919			if v_1.Op != Op386NEGL {
920				continue
921			}
922			y := v_1.Args[0]
923			v.reset(Op386SUBL)
924			v.AddArg2(x, y)
925			return true
926		}
927		break
928	}
929	return false
930}
931func rewriteValue386_Op386ADDLcarry(v *Value) bool {
932	v_1 := v.Args[1]
933	v_0 := v.Args[0]
934	// match: (ADDLcarry x (MOVLconst [c]))
935	// result: (ADDLconstcarry [c] x)
936	for {
937		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
938			x := v_0
939			if v_1.Op != Op386MOVLconst {
940				continue
941			}
942			c := auxIntToInt32(v_1.AuxInt)
943			v.reset(Op386ADDLconstcarry)
944			v.AuxInt = int32ToAuxInt(c)
945			v.AddArg(x)
946			return true
947		}
948		break
949	}
950	return false
951}
952func rewriteValue386_Op386ADDLconst(v *Value) bool {
953	v_0 := v.Args[0]
954	// match: (ADDLconst [c] (ADDL x y))
955	// result: (LEAL1 [c] x y)
956	for {
957		c := auxIntToInt32(v.AuxInt)
958		if v_0.Op != Op386ADDL {
959			break
960		}
961		y := v_0.Args[1]
962		x := v_0.Args[0]
963		v.reset(Op386LEAL1)
964		v.AuxInt = int32ToAuxInt(c)
965		v.AddArg2(x, y)
966		return true
967	}
968	// match: (ADDLconst [c] (LEAL [d] {s} x))
969	// cond: is32Bit(int64(c)+int64(d))
970	// result: (LEAL [c+d] {s} x)
971	for {
972		c := auxIntToInt32(v.AuxInt)
973		if v_0.Op != Op386LEAL {
974			break
975		}
976		d := auxIntToInt32(v_0.AuxInt)
977		s := auxToSym(v_0.Aux)
978		x := v_0.Args[0]
979		if !(is32Bit(int64(c) + int64(d))) {
980			break
981		}
982		v.reset(Op386LEAL)
983		v.AuxInt = int32ToAuxInt(c + d)
984		v.Aux = symToAux(s)
985		v.AddArg(x)
986		return true
987	}
988	// match: (ADDLconst [c] x:(SP))
989	// result: (LEAL [c] x)
990	for {
991		c := auxIntToInt32(v.AuxInt)
992		x := v_0
993		if x.Op != OpSP {
994			break
995		}
996		v.reset(Op386LEAL)
997		v.AuxInt = int32ToAuxInt(c)
998		v.AddArg(x)
999		return true
1000	}
1001	// match: (ADDLconst [c] (LEAL1 [d] {s} x y))
1002	// cond: is32Bit(int64(c)+int64(d))
1003	// result: (LEAL1 [c+d] {s} x y)
1004	for {
1005		c := auxIntToInt32(v.AuxInt)
1006		if v_0.Op != Op386LEAL1 {
1007			break
1008		}
1009		d := auxIntToInt32(v_0.AuxInt)
1010		s := auxToSym(v_0.Aux)
1011		y := v_0.Args[1]
1012		x := v_0.Args[0]
1013		if !(is32Bit(int64(c) + int64(d))) {
1014			break
1015		}
1016		v.reset(Op386LEAL1)
1017		v.AuxInt = int32ToAuxInt(c + d)
1018		v.Aux = symToAux(s)
1019		v.AddArg2(x, y)
1020		return true
1021	}
1022	// match: (ADDLconst [c] (LEAL2 [d] {s} x y))
1023	// cond: is32Bit(int64(c)+int64(d))
1024	// result: (LEAL2 [c+d] {s} x y)
1025	for {
1026		c := auxIntToInt32(v.AuxInt)
1027		if v_0.Op != Op386LEAL2 {
1028			break
1029		}
1030		d := auxIntToInt32(v_0.AuxInt)
1031		s := auxToSym(v_0.Aux)
1032		y := v_0.Args[1]
1033		x := v_0.Args[0]
1034		if !(is32Bit(int64(c) + int64(d))) {
1035			break
1036		}
1037		v.reset(Op386LEAL2)
1038		v.AuxInt = int32ToAuxInt(c + d)
1039		v.Aux = symToAux(s)
1040		v.AddArg2(x, y)
1041		return true
1042	}
1043	// match: (ADDLconst [c] (LEAL4 [d] {s} x y))
1044	// cond: is32Bit(int64(c)+int64(d))
1045	// result: (LEAL4 [c+d] {s} x y)
1046	for {
1047		c := auxIntToInt32(v.AuxInt)
1048		if v_0.Op != Op386LEAL4 {
1049			break
1050		}
1051		d := auxIntToInt32(v_0.AuxInt)
1052		s := auxToSym(v_0.Aux)
1053		y := v_0.Args[1]
1054		x := v_0.Args[0]
1055		if !(is32Bit(int64(c) + int64(d))) {
1056			break
1057		}
1058		v.reset(Op386LEAL4)
1059		v.AuxInt = int32ToAuxInt(c + d)
1060		v.Aux = symToAux(s)
1061		v.AddArg2(x, y)
1062		return true
1063	}
1064	// match: (ADDLconst [c] (LEAL8 [d] {s} x y))
1065	// cond: is32Bit(int64(c)+int64(d))
1066	// result: (LEAL8 [c+d] {s} x y)
1067	for {
1068		c := auxIntToInt32(v.AuxInt)
1069		if v_0.Op != Op386LEAL8 {
1070			break
1071		}
1072		d := auxIntToInt32(v_0.AuxInt)
1073		s := auxToSym(v_0.Aux)
1074		y := v_0.Args[1]
1075		x := v_0.Args[0]
1076		if !(is32Bit(int64(c) + int64(d))) {
1077			break
1078		}
1079		v.reset(Op386LEAL8)
1080		v.AuxInt = int32ToAuxInt(c + d)
1081		v.Aux = symToAux(s)
1082		v.AddArg2(x, y)
1083		return true
1084	}
1085	// match: (ADDLconst [c] x)
1086	// cond: c==0
1087	// result: x
1088	for {
1089		c := auxIntToInt32(v.AuxInt)
1090		x := v_0
1091		if !(c == 0) {
1092			break
1093		}
1094		v.copyOf(x)
1095		return true
1096	}
1097	// match: (ADDLconst [c] (MOVLconst [d]))
1098	// result: (MOVLconst [c+d])
1099	for {
1100		c := auxIntToInt32(v.AuxInt)
1101		if v_0.Op != Op386MOVLconst {
1102			break
1103		}
1104		d := auxIntToInt32(v_0.AuxInt)
1105		v.reset(Op386MOVLconst)
1106		v.AuxInt = int32ToAuxInt(c + d)
1107		return true
1108	}
1109	// match: (ADDLconst [c] (ADDLconst [d] x))
1110	// result: (ADDLconst [c+d] x)
1111	for {
1112		c := auxIntToInt32(v.AuxInt)
1113		if v_0.Op != Op386ADDLconst {
1114			break
1115		}
1116		d := auxIntToInt32(v_0.AuxInt)
1117		x := v_0.Args[0]
1118		v.reset(Op386ADDLconst)
1119		v.AuxInt = int32ToAuxInt(c + d)
1120		v.AddArg(x)
1121		return true
1122	}
1123	return false
1124}
1125func rewriteValue386_Op386ADDLconstmodify(v *Value) bool {
1126	v_1 := v.Args[1]
1127	v_0 := v.Args[0]
1128	b := v.Block
1129	config := b.Func.Config
1130	// match: (ADDLconstmodify [valoff1] {sym} (ADDLconst [off2] base) mem)
1131	// cond: valoff1.canAdd32(off2)
1132	// result: (ADDLconstmodify [valoff1.addOffset32(off2)] {sym} base mem)
1133	for {
1134		valoff1 := auxIntToValAndOff(v.AuxInt)
1135		sym := auxToSym(v.Aux)
1136		if v_0.Op != Op386ADDLconst {
1137			break
1138		}
1139		off2 := auxIntToInt32(v_0.AuxInt)
1140		base := v_0.Args[0]
1141		mem := v_1
1142		if !(valoff1.canAdd32(off2)) {
1143			break
1144		}
1145		v.reset(Op386ADDLconstmodify)
1146		v.AuxInt = valAndOffToAuxInt(valoff1.addOffset32(off2))
1147		v.Aux = symToAux(sym)
1148		v.AddArg2(base, mem)
1149		return true
1150	}
1151	// match: (ADDLconstmodify [valoff1] {sym1} (LEAL [off2] {sym2} base) mem)
1152	// cond: valoff1.canAdd32(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
1153	// result: (ADDLconstmodify [valoff1.addOffset32(off2)] {mergeSym(sym1,sym2)} base mem)
1154	for {
1155		valoff1 := auxIntToValAndOff(v.AuxInt)
1156		sym1 := auxToSym(v.Aux)
1157		if v_0.Op != Op386LEAL {
1158			break
1159		}
1160		off2 := auxIntToInt32(v_0.AuxInt)
1161		sym2 := auxToSym(v_0.Aux)
1162		base := v_0.Args[0]
1163		mem := v_1
1164		if !(valoff1.canAdd32(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
1165			break
1166		}
1167		v.reset(Op386ADDLconstmodify)
1168		v.AuxInt = valAndOffToAuxInt(valoff1.addOffset32(off2))
1169		v.Aux = symToAux(mergeSym(sym1, sym2))
1170		v.AddArg2(base, mem)
1171		return true
1172	}
1173	return false
1174}
1175func rewriteValue386_Op386ADDLload(v *Value) bool {
1176	v_2 := v.Args[2]
1177	v_1 := v.Args[1]
1178	v_0 := v.Args[0]
1179	b := v.Block
1180	config := b.Func.Config
1181	// match: (ADDLload [off1] {sym} val (ADDLconst [off2] base) mem)
1182	// cond: is32Bit(int64(off1)+int64(off2))
1183	// result: (ADDLload [off1+off2] {sym} val base mem)
1184	for {
1185		off1 := auxIntToInt32(v.AuxInt)
1186		sym := auxToSym(v.Aux)
1187		val := v_0
1188		if v_1.Op != Op386ADDLconst {
1189			break
1190		}
1191		off2 := auxIntToInt32(v_1.AuxInt)
1192		base := v_1.Args[0]
1193		mem := v_2
1194		if !(is32Bit(int64(off1) + int64(off2))) {
1195			break
1196		}
1197		v.reset(Op386ADDLload)
1198		v.AuxInt = int32ToAuxInt(off1 + off2)
1199		v.Aux = symToAux(sym)
1200		v.AddArg3(val, base, mem)
1201		return true
1202	}
1203	// match: (ADDLload [off1] {sym1} val (LEAL [off2] {sym2} base) mem)
1204	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
1205	// result: (ADDLload [off1+off2] {mergeSym(sym1,sym2)} val base mem)
1206	for {
1207		off1 := auxIntToInt32(v.AuxInt)
1208		sym1 := auxToSym(v.Aux)
1209		val := v_0
1210		if v_1.Op != Op386LEAL {
1211			break
1212		}
1213		off2 := auxIntToInt32(v_1.AuxInt)
1214		sym2 := auxToSym(v_1.Aux)
1215		base := v_1.Args[0]
1216		mem := v_2
1217		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
1218			break
1219		}
1220		v.reset(Op386ADDLload)
1221		v.AuxInt = int32ToAuxInt(off1 + off2)
1222		v.Aux = symToAux(mergeSym(sym1, sym2))
1223		v.AddArg3(val, base, mem)
1224		return true
1225	}
1226	return false
1227}
1228func rewriteValue386_Op386ADDLmodify(v *Value) bool {
1229	v_2 := v.Args[2]
1230	v_1 := v.Args[1]
1231	v_0 := v.Args[0]
1232	b := v.Block
1233	config := b.Func.Config
1234	// match: (ADDLmodify [off1] {sym} (ADDLconst [off2] base) val mem)
1235	// cond: is32Bit(int64(off1)+int64(off2))
1236	// result: (ADDLmodify [off1+off2] {sym} base val mem)
1237	for {
1238		off1 := auxIntToInt32(v.AuxInt)
1239		sym := auxToSym(v.Aux)
1240		if v_0.Op != Op386ADDLconst {
1241			break
1242		}
1243		off2 := auxIntToInt32(v_0.AuxInt)
1244		base := v_0.Args[0]
1245		val := v_1
1246		mem := v_2
1247		if !(is32Bit(int64(off1) + int64(off2))) {
1248			break
1249		}
1250		v.reset(Op386ADDLmodify)
1251		v.AuxInt = int32ToAuxInt(off1 + off2)
1252		v.Aux = symToAux(sym)
1253		v.AddArg3(base, val, mem)
1254		return true
1255	}
1256	// match: (ADDLmodify [off1] {sym1} (LEAL [off2] {sym2} base) val mem)
1257	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
1258	// result: (ADDLmodify [off1+off2] {mergeSym(sym1,sym2)} base val mem)
1259	for {
1260		off1 := auxIntToInt32(v.AuxInt)
1261		sym1 := auxToSym(v.Aux)
1262		if v_0.Op != Op386LEAL {
1263			break
1264		}
1265		off2 := auxIntToInt32(v_0.AuxInt)
1266		sym2 := auxToSym(v_0.Aux)
1267		base := v_0.Args[0]
1268		val := v_1
1269		mem := v_2
1270		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
1271			break
1272		}
1273		v.reset(Op386ADDLmodify)
1274		v.AuxInt = int32ToAuxInt(off1 + off2)
1275		v.Aux = symToAux(mergeSym(sym1, sym2))
1276		v.AddArg3(base, val, mem)
1277		return true
1278	}
1279	return false
1280}
1281func rewriteValue386_Op386ADDSD(v *Value) bool {
1282	v_1 := v.Args[1]
1283	v_0 := v.Args[0]
1284	// match: (ADDSD x l:(MOVSDload [off] {sym} ptr mem))
1285	// cond: canMergeLoadClobber(v, l, x) && clobber(l)
1286	// result: (ADDSDload x [off] {sym} ptr mem)
1287	for {
1288		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
1289			x := v_0
1290			l := v_1
1291			if l.Op != Op386MOVSDload {
1292				continue
1293			}
1294			off := auxIntToInt32(l.AuxInt)
1295			sym := auxToSym(l.Aux)
1296			mem := l.Args[1]
1297			ptr := l.Args[0]
1298			if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
1299				continue
1300			}
1301			v.reset(Op386ADDSDload)
1302			v.AuxInt = int32ToAuxInt(off)
1303			v.Aux = symToAux(sym)
1304			v.AddArg3(x, ptr, mem)
1305			return true
1306		}
1307		break
1308	}
1309	return false
1310}
1311func rewriteValue386_Op386ADDSDload(v *Value) bool {
1312	v_2 := v.Args[2]
1313	v_1 := v.Args[1]
1314	v_0 := v.Args[0]
1315	b := v.Block
1316	config := b.Func.Config
1317	// match: (ADDSDload [off1] {sym} val (ADDLconst [off2] base) mem)
1318	// cond: is32Bit(int64(off1)+int64(off2))
1319	// result: (ADDSDload [off1+off2] {sym} val base mem)
1320	for {
1321		off1 := auxIntToInt32(v.AuxInt)
1322		sym := auxToSym(v.Aux)
1323		val := v_0
1324		if v_1.Op != Op386ADDLconst {
1325			break
1326		}
1327		off2 := auxIntToInt32(v_1.AuxInt)
1328		base := v_1.Args[0]
1329		mem := v_2
1330		if !(is32Bit(int64(off1) + int64(off2))) {
1331			break
1332		}
1333		v.reset(Op386ADDSDload)
1334		v.AuxInt = int32ToAuxInt(off1 + off2)
1335		v.Aux = symToAux(sym)
1336		v.AddArg3(val, base, mem)
1337		return true
1338	}
1339	// match: (ADDSDload [off1] {sym1} val (LEAL [off2] {sym2} base) mem)
1340	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
1341	// result: (ADDSDload [off1+off2] {mergeSym(sym1,sym2)} val base mem)
1342	for {
1343		off1 := auxIntToInt32(v.AuxInt)
1344		sym1 := auxToSym(v.Aux)
1345		val := v_0
1346		if v_1.Op != Op386LEAL {
1347			break
1348		}
1349		off2 := auxIntToInt32(v_1.AuxInt)
1350		sym2 := auxToSym(v_1.Aux)
1351		base := v_1.Args[0]
1352		mem := v_2
1353		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
1354			break
1355		}
1356		v.reset(Op386ADDSDload)
1357		v.AuxInt = int32ToAuxInt(off1 + off2)
1358		v.Aux = symToAux(mergeSym(sym1, sym2))
1359		v.AddArg3(val, base, mem)
1360		return true
1361	}
1362	return false
1363}
1364func rewriteValue386_Op386ADDSS(v *Value) bool {
1365	v_1 := v.Args[1]
1366	v_0 := v.Args[0]
1367	// match: (ADDSS x l:(MOVSSload [off] {sym} ptr mem))
1368	// cond: canMergeLoadClobber(v, l, x) && clobber(l)
1369	// result: (ADDSSload x [off] {sym} ptr mem)
1370	for {
1371		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
1372			x := v_0
1373			l := v_1
1374			if l.Op != Op386MOVSSload {
1375				continue
1376			}
1377			off := auxIntToInt32(l.AuxInt)
1378			sym := auxToSym(l.Aux)
1379			mem := l.Args[1]
1380			ptr := l.Args[0]
1381			if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
1382				continue
1383			}
1384			v.reset(Op386ADDSSload)
1385			v.AuxInt = int32ToAuxInt(off)
1386			v.Aux = symToAux(sym)
1387			v.AddArg3(x, ptr, mem)
1388			return true
1389		}
1390		break
1391	}
1392	return false
1393}
1394func rewriteValue386_Op386ADDSSload(v *Value) bool {
1395	v_2 := v.Args[2]
1396	v_1 := v.Args[1]
1397	v_0 := v.Args[0]
1398	b := v.Block
1399	config := b.Func.Config
1400	// match: (ADDSSload [off1] {sym} val (ADDLconst [off2] base) mem)
1401	// cond: is32Bit(int64(off1)+int64(off2))
1402	// result: (ADDSSload [off1+off2] {sym} val base mem)
1403	for {
1404		off1 := auxIntToInt32(v.AuxInt)
1405		sym := auxToSym(v.Aux)
1406		val := v_0
1407		if v_1.Op != Op386ADDLconst {
1408			break
1409		}
1410		off2 := auxIntToInt32(v_1.AuxInt)
1411		base := v_1.Args[0]
1412		mem := v_2
1413		if !(is32Bit(int64(off1) + int64(off2))) {
1414			break
1415		}
1416		v.reset(Op386ADDSSload)
1417		v.AuxInt = int32ToAuxInt(off1 + off2)
1418		v.Aux = symToAux(sym)
1419		v.AddArg3(val, base, mem)
1420		return true
1421	}
1422	// match: (ADDSSload [off1] {sym1} val (LEAL [off2] {sym2} base) mem)
1423	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
1424	// result: (ADDSSload [off1+off2] {mergeSym(sym1,sym2)} val base mem)
1425	for {
1426		off1 := auxIntToInt32(v.AuxInt)
1427		sym1 := auxToSym(v.Aux)
1428		val := v_0
1429		if v_1.Op != Op386LEAL {
1430			break
1431		}
1432		off2 := auxIntToInt32(v_1.AuxInt)
1433		sym2 := auxToSym(v_1.Aux)
1434		base := v_1.Args[0]
1435		mem := v_2
1436		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
1437			break
1438		}
1439		v.reset(Op386ADDSSload)
1440		v.AuxInt = int32ToAuxInt(off1 + off2)
1441		v.Aux = symToAux(mergeSym(sym1, sym2))
1442		v.AddArg3(val, base, mem)
1443		return true
1444	}
1445	return false
1446}
1447func rewriteValue386_Op386ANDL(v *Value) bool {
1448	v_1 := v.Args[1]
1449	v_0 := v.Args[0]
1450	// match: (ANDL x (MOVLconst [c]))
1451	// result: (ANDLconst [c] x)
1452	for {
1453		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
1454			x := v_0
1455			if v_1.Op != Op386MOVLconst {
1456				continue
1457			}
1458			c := auxIntToInt32(v_1.AuxInt)
1459			v.reset(Op386ANDLconst)
1460			v.AuxInt = int32ToAuxInt(c)
1461			v.AddArg(x)
1462			return true
1463		}
1464		break
1465	}
1466	// match: (ANDL x l:(MOVLload [off] {sym} ptr mem))
1467	// cond: canMergeLoadClobber(v, l, x) && clobber(l)
1468	// result: (ANDLload x [off] {sym} ptr mem)
1469	for {
1470		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
1471			x := v_0
1472			l := v_1
1473			if l.Op != Op386MOVLload {
1474				continue
1475			}
1476			off := auxIntToInt32(l.AuxInt)
1477			sym := auxToSym(l.Aux)
1478			mem := l.Args[1]
1479			ptr := l.Args[0]
1480			if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
1481				continue
1482			}
1483			v.reset(Op386ANDLload)
1484			v.AuxInt = int32ToAuxInt(off)
1485			v.Aux = symToAux(sym)
1486			v.AddArg3(x, ptr, mem)
1487			return true
1488		}
1489		break
1490	}
1491	// match: (ANDL x x)
1492	// result: x
1493	for {
1494		x := v_0
1495		if x != v_1 {
1496			break
1497		}
1498		v.copyOf(x)
1499		return true
1500	}
1501	return false
1502}
1503func rewriteValue386_Op386ANDLconst(v *Value) bool {
1504	v_0 := v.Args[0]
1505	// match: (ANDLconst [c] (ANDLconst [d] x))
1506	// result: (ANDLconst [c & d] x)
1507	for {
1508		c := auxIntToInt32(v.AuxInt)
1509		if v_0.Op != Op386ANDLconst {
1510			break
1511		}
1512		d := auxIntToInt32(v_0.AuxInt)
1513		x := v_0.Args[0]
1514		v.reset(Op386ANDLconst)
1515		v.AuxInt = int32ToAuxInt(c & d)
1516		v.AddArg(x)
1517		return true
1518	}
1519	// match: (ANDLconst [c] _)
1520	// cond: c==0
1521	// result: (MOVLconst [0])
1522	for {
1523		c := auxIntToInt32(v.AuxInt)
1524		if !(c == 0) {
1525			break
1526		}
1527		v.reset(Op386MOVLconst)
1528		v.AuxInt = int32ToAuxInt(0)
1529		return true
1530	}
1531	// match: (ANDLconst [c] x)
1532	// cond: c==-1
1533	// result: x
1534	for {
1535		c := auxIntToInt32(v.AuxInt)
1536		x := v_0
1537		if !(c == -1) {
1538			break
1539		}
1540		v.copyOf(x)
1541		return true
1542	}
1543	// match: (ANDLconst [c] (MOVLconst [d]))
1544	// result: (MOVLconst [c&d])
1545	for {
1546		c := auxIntToInt32(v.AuxInt)
1547		if v_0.Op != Op386MOVLconst {
1548			break
1549		}
1550		d := auxIntToInt32(v_0.AuxInt)
1551		v.reset(Op386MOVLconst)
1552		v.AuxInt = int32ToAuxInt(c & d)
1553		return true
1554	}
1555	return false
1556}
1557func rewriteValue386_Op386ANDLconstmodify(v *Value) bool {
1558	v_1 := v.Args[1]
1559	v_0 := v.Args[0]
1560	b := v.Block
1561	config := b.Func.Config
1562	// match: (ANDLconstmodify [valoff1] {sym} (ADDLconst [off2] base) mem)
1563	// cond: valoff1.canAdd32(off2)
1564	// result: (ANDLconstmodify [valoff1.addOffset32(off2)] {sym} base mem)
1565	for {
1566		valoff1 := auxIntToValAndOff(v.AuxInt)
1567		sym := auxToSym(v.Aux)
1568		if v_0.Op != Op386ADDLconst {
1569			break
1570		}
1571		off2 := auxIntToInt32(v_0.AuxInt)
1572		base := v_0.Args[0]
1573		mem := v_1
1574		if !(valoff1.canAdd32(off2)) {
1575			break
1576		}
1577		v.reset(Op386ANDLconstmodify)
1578		v.AuxInt = valAndOffToAuxInt(valoff1.addOffset32(off2))
1579		v.Aux = symToAux(sym)
1580		v.AddArg2(base, mem)
1581		return true
1582	}
1583	// match: (ANDLconstmodify [valoff1] {sym1} (LEAL [off2] {sym2} base) mem)
1584	// cond: valoff1.canAdd32(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
1585	// result: (ANDLconstmodify [valoff1.addOffset32(off2)] {mergeSym(sym1,sym2)} base mem)
1586	for {
1587		valoff1 := auxIntToValAndOff(v.AuxInt)
1588		sym1 := auxToSym(v.Aux)
1589		if v_0.Op != Op386LEAL {
1590			break
1591		}
1592		off2 := auxIntToInt32(v_0.AuxInt)
1593		sym2 := auxToSym(v_0.Aux)
1594		base := v_0.Args[0]
1595		mem := v_1
1596		if !(valoff1.canAdd32(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
1597			break
1598		}
1599		v.reset(Op386ANDLconstmodify)
1600		v.AuxInt = valAndOffToAuxInt(valoff1.addOffset32(off2))
1601		v.Aux = symToAux(mergeSym(sym1, sym2))
1602		v.AddArg2(base, mem)
1603		return true
1604	}
1605	return false
1606}
1607func rewriteValue386_Op386ANDLload(v *Value) bool {
1608	v_2 := v.Args[2]
1609	v_1 := v.Args[1]
1610	v_0 := v.Args[0]
1611	b := v.Block
1612	config := b.Func.Config
1613	// match: (ANDLload [off1] {sym} val (ADDLconst [off2] base) mem)
1614	// cond: is32Bit(int64(off1)+int64(off2))
1615	// result: (ANDLload [off1+off2] {sym} val base mem)
1616	for {
1617		off1 := auxIntToInt32(v.AuxInt)
1618		sym := auxToSym(v.Aux)
1619		val := v_0
1620		if v_1.Op != Op386ADDLconst {
1621			break
1622		}
1623		off2 := auxIntToInt32(v_1.AuxInt)
1624		base := v_1.Args[0]
1625		mem := v_2
1626		if !(is32Bit(int64(off1) + int64(off2))) {
1627			break
1628		}
1629		v.reset(Op386ANDLload)
1630		v.AuxInt = int32ToAuxInt(off1 + off2)
1631		v.Aux = symToAux(sym)
1632		v.AddArg3(val, base, mem)
1633		return true
1634	}
1635	// match: (ANDLload [off1] {sym1} val (LEAL [off2] {sym2} base) mem)
1636	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
1637	// result: (ANDLload [off1+off2] {mergeSym(sym1,sym2)} val base mem)
1638	for {
1639		off1 := auxIntToInt32(v.AuxInt)
1640		sym1 := auxToSym(v.Aux)
1641		val := v_0
1642		if v_1.Op != Op386LEAL {
1643			break
1644		}
1645		off2 := auxIntToInt32(v_1.AuxInt)
1646		sym2 := auxToSym(v_1.Aux)
1647		base := v_1.Args[0]
1648		mem := v_2
1649		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
1650			break
1651		}
1652		v.reset(Op386ANDLload)
1653		v.AuxInt = int32ToAuxInt(off1 + off2)
1654		v.Aux = symToAux(mergeSym(sym1, sym2))
1655		v.AddArg3(val, base, mem)
1656		return true
1657	}
1658	return false
1659}
1660func rewriteValue386_Op386ANDLmodify(v *Value) bool {
1661	v_2 := v.Args[2]
1662	v_1 := v.Args[1]
1663	v_0 := v.Args[0]
1664	b := v.Block
1665	config := b.Func.Config
1666	// match: (ANDLmodify [off1] {sym} (ADDLconst [off2] base) val mem)
1667	// cond: is32Bit(int64(off1)+int64(off2))
1668	// result: (ANDLmodify [off1+off2] {sym} base val mem)
1669	for {
1670		off1 := auxIntToInt32(v.AuxInt)
1671		sym := auxToSym(v.Aux)
1672		if v_0.Op != Op386ADDLconst {
1673			break
1674		}
1675		off2 := auxIntToInt32(v_0.AuxInt)
1676		base := v_0.Args[0]
1677		val := v_1
1678		mem := v_2
1679		if !(is32Bit(int64(off1) + int64(off2))) {
1680			break
1681		}
1682		v.reset(Op386ANDLmodify)
1683		v.AuxInt = int32ToAuxInt(off1 + off2)
1684		v.Aux = symToAux(sym)
1685		v.AddArg3(base, val, mem)
1686		return true
1687	}
1688	// match: (ANDLmodify [off1] {sym1} (LEAL [off2] {sym2} base) val mem)
1689	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
1690	// result: (ANDLmodify [off1+off2] {mergeSym(sym1,sym2)} base val mem)
1691	for {
1692		off1 := auxIntToInt32(v.AuxInt)
1693		sym1 := auxToSym(v.Aux)
1694		if v_0.Op != Op386LEAL {
1695			break
1696		}
1697		off2 := auxIntToInt32(v_0.AuxInt)
1698		sym2 := auxToSym(v_0.Aux)
1699		base := v_0.Args[0]
1700		val := v_1
1701		mem := v_2
1702		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
1703			break
1704		}
1705		v.reset(Op386ANDLmodify)
1706		v.AuxInt = int32ToAuxInt(off1 + off2)
1707		v.Aux = symToAux(mergeSym(sym1, sym2))
1708		v.AddArg3(base, val, mem)
1709		return true
1710	}
1711	return false
1712}
1713func rewriteValue386_Op386CMPB(v *Value) bool {
1714	v_1 := v.Args[1]
1715	v_0 := v.Args[0]
1716	b := v.Block
1717	// match: (CMPB x (MOVLconst [c]))
1718	// result: (CMPBconst x [int8(c)])
1719	for {
1720		x := v_0
1721		if v_1.Op != Op386MOVLconst {
1722			break
1723		}
1724		c := auxIntToInt32(v_1.AuxInt)
1725		v.reset(Op386CMPBconst)
1726		v.AuxInt = int8ToAuxInt(int8(c))
1727		v.AddArg(x)
1728		return true
1729	}
1730	// match: (CMPB (MOVLconst [c]) x)
1731	// result: (InvertFlags (CMPBconst x [int8(c)]))
1732	for {
1733		if v_0.Op != Op386MOVLconst {
1734			break
1735		}
1736		c := auxIntToInt32(v_0.AuxInt)
1737		x := v_1
1738		v.reset(Op386InvertFlags)
1739		v0 := b.NewValue0(v.Pos, Op386CMPBconst, types.TypeFlags)
1740		v0.AuxInt = int8ToAuxInt(int8(c))
1741		v0.AddArg(x)
1742		v.AddArg(v0)
1743		return true
1744	}
1745	// match: (CMPB x y)
1746	// cond: canonLessThan(x,y)
1747	// result: (InvertFlags (CMPB y x))
1748	for {
1749		x := v_0
1750		y := v_1
1751		if !(canonLessThan(x, y)) {
1752			break
1753		}
1754		v.reset(Op386InvertFlags)
1755		v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags)
1756		v0.AddArg2(y, x)
1757		v.AddArg(v0)
1758		return true
1759	}
1760	// match: (CMPB l:(MOVBload {sym} [off] ptr mem) x)
1761	// cond: canMergeLoad(v, l) && clobber(l)
1762	// result: (CMPBload {sym} [off] ptr x mem)
1763	for {
1764		l := v_0
1765		if l.Op != Op386MOVBload {
1766			break
1767		}
1768		off := auxIntToInt32(l.AuxInt)
1769		sym := auxToSym(l.Aux)
1770		mem := l.Args[1]
1771		ptr := l.Args[0]
1772		x := v_1
1773		if !(canMergeLoad(v, l) && clobber(l)) {
1774			break
1775		}
1776		v.reset(Op386CMPBload)
1777		v.AuxInt = int32ToAuxInt(off)
1778		v.Aux = symToAux(sym)
1779		v.AddArg3(ptr, x, mem)
1780		return true
1781	}
1782	// match: (CMPB x l:(MOVBload {sym} [off] ptr mem))
1783	// cond: canMergeLoad(v, l) && clobber(l)
1784	// result: (InvertFlags (CMPBload {sym} [off] ptr x mem))
1785	for {
1786		x := v_0
1787		l := v_1
1788		if l.Op != Op386MOVBload {
1789			break
1790		}
1791		off := auxIntToInt32(l.AuxInt)
1792		sym := auxToSym(l.Aux)
1793		mem := l.Args[1]
1794		ptr := l.Args[0]
1795		if !(canMergeLoad(v, l) && clobber(l)) {
1796			break
1797		}
1798		v.reset(Op386InvertFlags)
1799		v0 := b.NewValue0(l.Pos, Op386CMPBload, types.TypeFlags)
1800		v0.AuxInt = int32ToAuxInt(off)
1801		v0.Aux = symToAux(sym)
1802		v0.AddArg3(ptr, x, mem)
1803		v.AddArg(v0)
1804		return true
1805	}
1806	return false
1807}
1808func rewriteValue386_Op386CMPBconst(v *Value) bool {
1809	v_0 := v.Args[0]
1810	b := v.Block
1811	// match: (CMPBconst (MOVLconst [x]) [y])
1812	// cond: int8(x)==y
1813	// result: (FlagEQ)
1814	for {
1815		y := auxIntToInt8(v.AuxInt)
1816		if v_0.Op != Op386MOVLconst {
1817			break
1818		}
1819		x := auxIntToInt32(v_0.AuxInt)
1820		if !(int8(x) == y) {
1821			break
1822		}
1823		v.reset(Op386FlagEQ)
1824		return true
1825	}
1826	// match: (CMPBconst (MOVLconst [x]) [y])
1827	// cond: int8(x)<y && uint8(x)<uint8(y)
1828	// result: (FlagLT_ULT)
1829	for {
1830		y := auxIntToInt8(v.AuxInt)
1831		if v_0.Op != Op386MOVLconst {
1832			break
1833		}
1834		x := auxIntToInt32(v_0.AuxInt)
1835		if !(int8(x) < y && uint8(x) < uint8(y)) {
1836			break
1837		}
1838		v.reset(Op386FlagLT_ULT)
1839		return true
1840	}
1841	// match: (CMPBconst (MOVLconst [x]) [y])
1842	// cond: int8(x)<y && uint8(x)>uint8(y)
1843	// result: (FlagLT_UGT)
1844	for {
1845		y := auxIntToInt8(v.AuxInt)
1846		if v_0.Op != Op386MOVLconst {
1847			break
1848		}
1849		x := auxIntToInt32(v_0.AuxInt)
1850		if !(int8(x) < y && uint8(x) > uint8(y)) {
1851			break
1852		}
1853		v.reset(Op386FlagLT_UGT)
1854		return true
1855	}
1856	// match: (CMPBconst (MOVLconst [x]) [y])
1857	// cond: int8(x)>y && uint8(x)<uint8(y)
1858	// result: (FlagGT_ULT)
1859	for {
1860		y := auxIntToInt8(v.AuxInt)
1861		if v_0.Op != Op386MOVLconst {
1862			break
1863		}
1864		x := auxIntToInt32(v_0.AuxInt)
1865		if !(int8(x) > y && uint8(x) < uint8(y)) {
1866			break
1867		}
1868		v.reset(Op386FlagGT_ULT)
1869		return true
1870	}
1871	// match: (CMPBconst (MOVLconst [x]) [y])
1872	// cond: int8(x)>y && uint8(x)>uint8(y)
1873	// result: (FlagGT_UGT)
1874	for {
1875		y := auxIntToInt8(v.AuxInt)
1876		if v_0.Op != Op386MOVLconst {
1877			break
1878		}
1879		x := auxIntToInt32(v_0.AuxInt)
1880		if !(int8(x) > y && uint8(x) > uint8(y)) {
1881			break
1882		}
1883		v.reset(Op386FlagGT_UGT)
1884		return true
1885	}
1886	// match: (CMPBconst (ANDLconst _ [m]) [n])
1887	// cond: 0 <= int8(m) && int8(m) < n
1888	// result: (FlagLT_ULT)
1889	for {
1890		n := auxIntToInt8(v.AuxInt)
1891		if v_0.Op != Op386ANDLconst {
1892			break
1893		}
1894		m := auxIntToInt32(v_0.AuxInt)
1895		if !(0 <= int8(m) && int8(m) < n) {
1896			break
1897		}
1898		v.reset(Op386FlagLT_ULT)
1899		return true
1900	}
1901	// match: (CMPBconst l:(ANDL x y) [0])
1902	// cond: l.Uses==1
1903	// result: (TESTB x y)
1904	for {
1905		if auxIntToInt8(v.AuxInt) != 0 {
1906			break
1907		}
1908		l := v_0
1909		if l.Op != Op386ANDL {
1910			break
1911		}
1912		y := l.Args[1]
1913		x := l.Args[0]
1914		if !(l.Uses == 1) {
1915			break
1916		}
1917		v.reset(Op386TESTB)
1918		v.AddArg2(x, y)
1919		return true
1920	}
1921	// match: (CMPBconst l:(ANDLconst [c] x) [0])
1922	// cond: l.Uses==1
1923	// result: (TESTBconst [int8(c)] x)
1924	for {
1925		if auxIntToInt8(v.AuxInt) != 0 {
1926			break
1927		}
1928		l := v_0
1929		if l.Op != Op386ANDLconst {
1930			break
1931		}
1932		c := auxIntToInt32(l.AuxInt)
1933		x := l.Args[0]
1934		if !(l.Uses == 1) {
1935			break
1936		}
1937		v.reset(Op386TESTBconst)
1938		v.AuxInt = int8ToAuxInt(int8(c))
1939		v.AddArg(x)
1940		return true
1941	}
1942	// match: (CMPBconst x [0])
1943	// result: (TESTB x x)
1944	for {
1945		if auxIntToInt8(v.AuxInt) != 0 {
1946			break
1947		}
1948		x := v_0
1949		v.reset(Op386TESTB)
1950		v.AddArg2(x, x)
1951		return true
1952	}
1953	// match: (CMPBconst l:(MOVBload {sym} [off] ptr mem) [c])
1954	// cond: l.Uses == 1 && clobber(l)
1955	// result: @l.Block (CMPBconstload {sym} [makeValAndOff(int32(c),off)] ptr mem)
1956	for {
1957		c := auxIntToInt8(v.AuxInt)
1958		l := v_0
1959		if l.Op != Op386MOVBload {
1960			break
1961		}
1962		off := auxIntToInt32(l.AuxInt)
1963		sym := auxToSym(l.Aux)
1964		mem := l.Args[1]
1965		ptr := l.Args[0]
1966		if !(l.Uses == 1 && clobber(l)) {
1967			break
1968		}
1969		b = l.Block
1970		v0 := b.NewValue0(l.Pos, Op386CMPBconstload, types.TypeFlags)
1971		v.copyOf(v0)
1972		v0.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(c), off))
1973		v0.Aux = symToAux(sym)
1974		v0.AddArg2(ptr, mem)
1975		return true
1976	}
1977	return false
1978}
1979func rewriteValue386_Op386CMPBload(v *Value) bool {
1980	v_2 := v.Args[2]
1981	v_1 := v.Args[1]
1982	v_0 := v.Args[0]
1983	// match: (CMPBload {sym} [off] ptr (MOVLconst [c]) mem)
1984	// result: (CMPBconstload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
1985	for {
1986		off := auxIntToInt32(v.AuxInt)
1987		sym := auxToSym(v.Aux)
1988		ptr := v_0
1989		if v_1.Op != Op386MOVLconst {
1990			break
1991		}
1992		c := auxIntToInt32(v_1.AuxInt)
1993		mem := v_2
1994		v.reset(Op386CMPBconstload)
1995		v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
1996		v.Aux = symToAux(sym)
1997		v.AddArg2(ptr, mem)
1998		return true
1999	}
2000	return false
2001}
2002func rewriteValue386_Op386CMPL(v *Value) bool {
2003	v_1 := v.Args[1]
2004	v_0 := v.Args[0]
2005	b := v.Block
2006	// match: (CMPL x (MOVLconst [c]))
2007	// result: (CMPLconst x [c])
2008	for {
2009		x := v_0
2010		if v_1.Op != Op386MOVLconst {
2011			break
2012		}
2013		c := auxIntToInt32(v_1.AuxInt)
2014		v.reset(Op386CMPLconst)
2015		v.AuxInt = int32ToAuxInt(c)
2016		v.AddArg(x)
2017		return true
2018	}
2019	// match: (CMPL (MOVLconst [c]) x)
2020	// result: (InvertFlags (CMPLconst x [c]))
2021	for {
2022		if v_0.Op != Op386MOVLconst {
2023			break
2024		}
2025		c := auxIntToInt32(v_0.AuxInt)
2026		x := v_1
2027		v.reset(Op386InvertFlags)
2028		v0 := b.NewValue0(v.Pos, Op386CMPLconst, types.TypeFlags)
2029		v0.AuxInt = int32ToAuxInt(c)
2030		v0.AddArg(x)
2031		v.AddArg(v0)
2032		return true
2033	}
2034	// match: (CMPL x y)
2035	// cond: canonLessThan(x,y)
2036	// result: (InvertFlags (CMPL y x))
2037	for {
2038		x := v_0
2039		y := v_1
2040		if !(canonLessThan(x, y)) {
2041			break
2042		}
2043		v.reset(Op386InvertFlags)
2044		v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags)
2045		v0.AddArg2(y, x)
2046		v.AddArg(v0)
2047		return true
2048	}
2049	// match: (CMPL l:(MOVLload {sym} [off] ptr mem) x)
2050	// cond: canMergeLoad(v, l) && clobber(l)
2051	// result: (CMPLload {sym} [off] ptr x mem)
2052	for {
2053		l := v_0
2054		if l.Op != Op386MOVLload {
2055			break
2056		}
2057		off := auxIntToInt32(l.AuxInt)
2058		sym := auxToSym(l.Aux)
2059		mem := l.Args[1]
2060		ptr := l.Args[0]
2061		x := v_1
2062		if !(canMergeLoad(v, l) && clobber(l)) {
2063			break
2064		}
2065		v.reset(Op386CMPLload)
2066		v.AuxInt = int32ToAuxInt(off)
2067		v.Aux = symToAux(sym)
2068		v.AddArg3(ptr, x, mem)
2069		return true
2070	}
2071	// match: (CMPL x l:(MOVLload {sym} [off] ptr mem))
2072	// cond: canMergeLoad(v, l) && clobber(l)
2073	// result: (InvertFlags (CMPLload {sym} [off] ptr x mem))
2074	for {
2075		x := v_0
2076		l := v_1
2077		if l.Op != Op386MOVLload {
2078			break
2079		}
2080		off := auxIntToInt32(l.AuxInt)
2081		sym := auxToSym(l.Aux)
2082		mem := l.Args[1]
2083		ptr := l.Args[0]
2084		if !(canMergeLoad(v, l) && clobber(l)) {
2085			break
2086		}
2087		v.reset(Op386InvertFlags)
2088		v0 := b.NewValue0(l.Pos, Op386CMPLload, types.TypeFlags)
2089		v0.AuxInt = int32ToAuxInt(off)
2090		v0.Aux = symToAux(sym)
2091		v0.AddArg3(ptr, x, mem)
2092		v.AddArg(v0)
2093		return true
2094	}
2095	return false
2096}
2097func rewriteValue386_Op386CMPLconst(v *Value) bool {
2098	v_0 := v.Args[0]
2099	b := v.Block
2100	// match: (CMPLconst (MOVLconst [x]) [y])
2101	// cond: x==y
2102	// result: (FlagEQ)
2103	for {
2104		y := auxIntToInt32(v.AuxInt)
2105		if v_0.Op != Op386MOVLconst {
2106			break
2107		}
2108		x := auxIntToInt32(v_0.AuxInt)
2109		if !(x == y) {
2110			break
2111		}
2112		v.reset(Op386FlagEQ)
2113		return true
2114	}
2115	// match: (CMPLconst (MOVLconst [x]) [y])
2116	// cond: x<y && uint32(x)<uint32(y)
2117	// result: (FlagLT_ULT)
2118	for {
2119		y := auxIntToInt32(v.AuxInt)
2120		if v_0.Op != Op386MOVLconst {
2121			break
2122		}
2123		x := auxIntToInt32(v_0.AuxInt)
2124		if !(x < y && uint32(x) < uint32(y)) {
2125			break
2126		}
2127		v.reset(Op386FlagLT_ULT)
2128		return true
2129	}
2130	// match: (CMPLconst (MOVLconst [x]) [y])
2131	// cond: x<y && uint32(x)>uint32(y)
2132	// result: (FlagLT_UGT)
2133	for {
2134		y := auxIntToInt32(v.AuxInt)
2135		if v_0.Op != Op386MOVLconst {
2136			break
2137		}
2138		x := auxIntToInt32(v_0.AuxInt)
2139		if !(x < y && uint32(x) > uint32(y)) {
2140			break
2141		}
2142		v.reset(Op386FlagLT_UGT)
2143		return true
2144	}
2145	// match: (CMPLconst (MOVLconst [x]) [y])
2146	// cond: x>y && uint32(x)<uint32(y)
2147	// result: (FlagGT_ULT)
2148	for {
2149		y := auxIntToInt32(v.AuxInt)
2150		if v_0.Op != Op386MOVLconst {
2151			break
2152		}
2153		x := auxIntToInt32(v_0.AuxInt)
2154		if !(x > y && uint32(x) < uint32(y)) {
2155			break
2156		}
2157		v.reset(Op386FlagGT_ULT)
2158		return true
2159	}
2160	// match: (CMPLconst (MOVLconst [x]) [y])
2161	// cond: x>y && uint32(x)>uint32(y)
2162	// result: (FlagGT_UGT)
2163	for {
2164		y := auxIntToInt32(v.AuxInt)
2165		if v_0.Op != Op386MOVLconst {
2166			break
2167		}
2168		x := auxIntToInt32(v_0.AuxInt)
2169		if !(x > y && uint32(x) > uint32(y)) {
2170			break
2171		}
2172		v.reset(Op386FlagGT_UGT)
2173		return true
2174	}
2175	// match: (CMPLconst (SHRLconst _ [c]) [n])
2176	// cond: 0 <= n && 0 < c && c <= 32 && (1<<uint64(32-c)) <= uint64(n)
2177	// result: (FlagLT_ULT)
2178	for {
2179		n := auxIntToInt32(v.AuxInt)
2180		if v_0.Op != Op386SHRLconst {
2181			break
2182		}
2183		c := auxIntToInt32(v_0.AuxInt)
2184		if !(0 <= n && 0 < c && c <= 32 && (1<<uint64(32-c)) <= uint64(n)) {
2185			break
2186		}
2187		v.reset(Op386FlagLT_ULT)
2188		return true
2189	}
2190	// match: (CMPLconst (ANDLconst _ [m]) [n])
2191	// cond: 0 <= m && m < n
2192	// result: (FlagLT_ULT)
2193	for {
2194		n := auxIntToInt32(v.AuxInt)
2195		if v_0.Op != Op386ANDLconst {
2196			break
2197		}
2198		m := auxIntToInt32(v_0.AuxInt)
2199		if !(0 <= m && m < n) {
2200			break
2201		}
2202		v.reset(Op386FlagLT_ULT)
2203		return true
2204	}
2205	// match: (CMPLconst l:(ANDL x y) [0])
2206	// cond: l.Uses==1
2207	// result: (TESTL x y)
2208	for {
2209		if auxIntToInt32(v.AuxInt) != 0 {
2210			break
2211		}
2212		l := v_0
2213		if l.Op != Op386ANDL {
2214			break
2215		}
2216		y := l.Args[1]
2217		x := l.Args[0]
2218		if !(l.Uses == 1) {
2219			break
2220		}
2221		v.reset(Op386TESTL)
2222		v.AddArg2(x, y)
2223		return true
2224	}
2225	// match: (CMPLconst l:(ANDLconst [c] x) [0])
2226	// cond: l.Uses==1
2227	// result: (TESTLconst [c] x)
2228	for {
2229		if auxIntToInt32(v.AuxInt) != 0 {
2230			break
2231		}
2232		l := v_0
2233		if l.Op != Op386ANDLconst {
2234			break
2235		}
2236		c := auxIntToInt32(l.AuxInt)
2237		x := l.Args[0]
2238		if !(l.Uses == 1) {
2239			break
2240		}
2241		v.reset(Op386TESTLconst)
2242		v.AuxInt = int32ToAuxInt(c)
2243		v.AddArg(x)
2244		return true
2245	}
2246	// match: (CMPLconst x [0])
2247	// result: (TESTL x x)
2248	for {
2249		if auxIntToInt32(v.AuxInt) != 0 {
2250			break
2251		}
2252		x := v_0
2253		v.reset(Op386TESTL)
2254		v.AddArg2(x, x)
2255		return true
2256	}
2257	// match: (CMPLconst l:(MOVLload {sym} [off] ptr mem) [c])
2258	// cond: l.Uses == 1 && clobber(l)
2259	// result: @l.Block (CMPLconstload {sym} [makeValAndOff(int32(c),off)] ptr mem)
2260	for {
2261		c := auxIntToInt32(v.AuxInt)
2262		l := v_0
2263		if l.Op != Op386MOVLload {
2264			break
2265		}
2266		off := auxIntToInt32(l.AuxInt)
2267		sym := auxToSym(l.Aux)
2268		mem := l.Args[1]
2269		ptr := l.Args[0]
2270		if !(l.Uses == 1 && clobber(l)) {
2271			break
2272		}
2273		b = l.Block
2274		v0 := b.NewValue0(l.Pos, Op386CMPLconstload, types.TypeFlags)
2275		v.copyOf(v0)
2276		v0.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(c), off))
2277		v0.Aux = symToAux(sym)
2278		v0.AddArg2(ptr, mem)
2279		return true
2280	}
2281	return false
2282}
2283func rewriteValue386_Op386CMPLload(v *Value) bool {
2284	v_2 := v.Args[2]
2285	v_1 := v.Args[1]
2286	v_0 := v.Args[0]
2287	// match: (CMPLload {sym} [off] ptr (MOVLconst [c]) mem)
2288	// result: (CMPLconstload {sym} [makeValAndOff(c,off)] ptr mem)
2289	for {
2290		off := auxIntToInt32(v.AuxInt)
2291		sym := auxToSym(v.Aux)
2292		ptr := v_0
2293		if v_1.Op != Op386MOVLconst {
2294			break
2295		}
2296		c := auxIntToInt32(v_1.AuxInt)
2297		mem := v_2
2298		v.reset(Op386CMPLconstload)
2299		v.AuxInt = valAndOffToAuxInt(makeValAndOff(c, off))
2300		v.Aux = symToAux(sym)
2301		v.AddArg2(ptr, mem)
2302		return true
2303	}
2304	return false
2305}
2306func rewriteValue386_Op386CMPW(v *Value) bool {
2307	v_1 := v.Args[1]
2308	v_0 := v.Args[0]
2309	b := v.Block
2310	// match: (CMPW x (MOVLconst [c]))
2311	// result: (CMPWconst x [int16(c)])
2312	for {
2313		x := v_0
2314		if v_1.Op != Op386MOVLconst {
2315			break
2316		}
2317		c := auxIntToInt32(v_1.AuxInt)
2318		v.reset(Op386CMPWconst)
2319		v.AuxInt = int16ToAuxInt(int16(c))
2320		v.AddArg(x)
2321		return true
2322	}
2323	// match: (CMPW (MOVLconst [c]) x)
2324	// result: (InvertFlags (CMPWconst x [int16(c)]))
2325	for {
2326		if v_0.Op != Op386MOVLconst {
2327			break
2328		}
2329		c := auxIntToInt32(v_0.AuxInt)
2330		x := v_1
2331		v.reset(Op386InvertFlags)
2332		v0 := b.NewValue0(v.Pos, Op386CMPWconst, types.TypeFlags)
2333		v0.AuxInt = int16ToAuxInt(int16(c))
2334		v0.AddArg(x)
2335		v.AddArg(v0)
2336		return true
2337	}
2338	// match: (CMPW x y)
2339	// cond: canonLessThan(x,y)
2340	// result: (InvertFlags (CMPW y x))
2341	for {
2342		x := v_0
2343		y := v_1
2344		if !(canonLessThan(x, y)) {
2345			break
2346		}
2347		v.reset(Op386InvertFlags)
2348		v0 := b.NewValue0(v.Pos, Op386CMPW, types.TypeFlags)
2349		v0.AddArg2(y, x)
2350		v.AddArg(v0)
2351		return true
2352	}
2353	// match: (CMPW l:(MOVWload {sym} [off] ptr mem) x)
2354	// cond: canMergeLoad(v, l) && clobber(l)
2355	// result: (CMPWload {sym} [off] ptr x mem)
2356	for {
2357		l := v_0
2358		if l.Op != Op386MOVWload {
2359			break
2360		}
2361		off := auxIntToInt32(l.AuxInt)
2362		sym := auxToSym(l.Aux)
2363		mem := l.Args[1]
2364		ptr := l.Args[0]
2365		x := v_1
2366		if !(canMergeLoad(v, l) && clobber(l)) {
2367			break
2368		}
2369		v.reset(Op386CMPWload)
2370		v.AuxInt = int32ToAuxInt(off)
2371		v.Aux = symToAux(sym)
2372		v.AddArg3(ptr, x, mem)
2373		return true
2374	}
2375	// match: (CMPW x l:(MOVWload {sym} [off] ptr mem))
2376	// cond: canMergeLoad(v, l) && clobber(l)
2377	// result: (InvertFlags (CMPWload {sym} [off] ptr x mem))
2378	for {
2379		x := v_0
2380		l := v_1
2381		if l.Op != Op386MOVWload {
2382			break
2383		}
2384		off := auxIntToInt32(l.AuxInt)
2385		sym := auxToSym(l.Aux)
2386		mem := l.Args[1]
2387		ptr := l.Args[0]
2388		if !(canMergeLoad(v, l) && clobber(l)) {
2389			break
2390		}
2391		v.reset(Op386InvertFlags)
2392		v0 := b.NewValue0(l.Pos, Op386CMPWload, types.TypeFlags)
2393		v0.AuxInt = int32ToAuxInt(off)
2394		v0.Aux = symToAux(sym)
2395		v0.AddArg3(ptr, x, mem)
2396		v.AddArg(v0)
2397		return true
2398	}
2399	return false
2400}
2401func rewriteValue386_Op386CMPWconst(v *Value) bool {
2402	v_0 := v.Args[0]
2403	b := v.Block
2404	// match: (CMPWconst (MOVLconst [x]) [y])
2405	// cond: int16(x)==y
2406	// result: (FlagEQ)
2407	for {
2408		y := auxIntToInt16(v.AuxInt)
2409		if v_0.Op != Op386MOVLconst {
2410			break
2411		}
2412		x := auxIntToInt32(v_0.AuxInt)
2413		if !(int16(x) == y) {
2414			break
2415		}
2416		v.reset(Op386FlagEQ)
2417		return true
2418	}
2419	// match: (CMPWconst (MOVLconst [x]) [y])
2420	// cond: int16(x)<y && uint16(x)<uint16(y)
2421	// result: (FlagLT_ULT)
2422	for {
2423		y := auxIntToInt16(v.AuxInt)
2424		if v_0.Op != Op386MOVLconst {
2425			break
2426		}
2427		x := auxIntToInt32(v_0.AuxInt)
2428		if !(int16(x) < y && uint16(x) < uint16(y)) {
2429			break
2430		}
2431		v.reset(Op386FlagLT_ULT)
2432		return true
2433	}
2434	// match: (CMPWconst (MOVLconst [x]) [y])
2435	// cond: int16(x)<y && uint16(x)>uint16(y)
2436	// result: (FlagLT_UGT)
2437	for {
2438		y := auxIntToInt16(v.AuxInt)
2439		if v_0.Op != Op386MOVLconst {
2440			break
2441		}
2442		x := auxIntToInt32(v_0.AuxInt)
2443		if !(int16(x) < y && uint16(x) > uint16(y)) {
2444			break
2445		}
2446		v.reset(Op386FlagLT_UGT)
2447		return true
2448	}
2449	// match: (CMPWconst (MOVLconst [x]) [y])
2450	// cond: int16(x)>y && uint16(x)<uint16(y)
2451	// result: (FlagGT_ULT)
2452	for {
2453		y := auxIntToInt16(v.AuxInt)
2454		if v_0.Op != Op386MOVLconst {
2455			break
2456		}
2457		x := auxIntToInt32(v_0.AuxInt)
2458		if !(int16(x) > y && uint16(x) < uint16(y)) {
2459			break
2460		}
2461		v.reset(Op386FlagGT_ULT)
2462		return true
2463	}
2464	// match: (CMPWconst (MOVLconst [x]) [y])
2465	// cond: int16(x)>y && uint16(x)>uint16(y)
2466	// result: (FlagGT_UGT)
2467	for {
2468		y := auxIntToInt16(v.AuxInt)
2469		if v_0.Op != Op386MOVLconst {
2470			break
2471		}
2472		x := auxIntToInt32(v_0.AuxInt)
2473		if !(int16(x) > y && uint16(x) > uint16(y)) {
2474			break
2475		}
2476		v.reset(Op386FlagGT_UGT)
2477		return true
2478	}
2479	// match: (CMPWconst (ANDLconst _ [m]) [n])
2480	// cond: 0 <= int16(m) && int16(m) < n
2481	// result: (FlagLT_ULT)
2482	for {
2483		n := auxIntToInt16(v.AuxInt)
2484		if v_0.Op != Op386ANDLconst {
2485			break
2486		}
2487		m := auxIntToInt32(v_0.AuxInt)
2488		if !(0 <= int16(m) && int16(m) < n) {
2489			break
2490		}
2491		v.reset(Op386FlagLT_ULT)
2492		return true
2493	}
2494	// match: (CMPWconst l:(ANDL x y) [0])
2495	// cond: l.Uses==1
2496	// result: (TESTW x y)
2497	for {
2498		if auxIntToInt16(v.AuxInt) != 0 {
2499			break
2500		}
2501		l := v_0
2502		if l.Op != Op386ANDL {
2503			break
2504		}
2505		y := l.Args[1]
2506		x := l.Args[0]
2507		if !(l.Uses == 1) {
2508			break
2509		}
2510		v.reset(Op386TESTW)
2511		v.AddArg2(x, y)
2512		return true
2513	}
2514	// match: (CMPWconst l:(ANDLconst [c] x) [0])
2515	// cond: l.Uses==1
2516	// result: (TESTWconst [int16(c)] x)
2517	for {
2518		if auxIntToInt16(v.AuxInt) != 0 {
2519			break
2520		}
2521		l := v_0
2522		if l.Op != Op386ANDLconst {
2523			break
2524		}
2525		c := auxIntToInt32(l.AuxInt)
2526		x := l.Args[0]
2527		if !(l.Uses == 1) {
2528			break
2529		}
2530		v.reset(Op386TESTWconst)
2531		v.AuxInt = int16ToAuxInt(int16(c))
2532		v.AddArg(x)
2533		return true
2534	}
2535	// match: (CMPWconst x [0])
2536	// result: (TESTW x x)
2537	for {
2538		if auxIntToInt16(v.AuxInt) != 0 {
2539			break
2540		}
2541		x := v_0
2542		v.reset(Op386TESTW)
2543		v.AddArg2(x, x)
2544		return true
2545	}
2546	// match: (CMPWconst l:(MOVWload {sym} [off] ptr mem) [c])
2547	// cond: l.Uses == 1 && clobber(l)
2548	// result: @l.Block (CMPWconstload {sym} [makeValAndOff(int32(c),off)] ptr mem)
2549	for {
2550		c := auxIntToInt16(v.AuxInt)
2551		l := v_0
2552		if l.Op != Op386MOVWload {
2553			break
2554		}
2555		off := auxIntToInt32(l.AuxInt)
2556		sym := auxToSym(l.Aux)
2557		mem := l.Args[1]
2558		ptr := l.Args[0]
2559		if !(l.Uses == 1 && clobber(l)) {
2560			break
2561		}
2562		b = l.Block
2563		v0 := b.NewValue0(l.Pos, Op386CMPWconstload, types.TypeFlags)
2564		v.copyOf(v0)
2565		v0.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(c), off))
2566		v0.Aux = symToAux(sym)
2567		v0.AddArg2(ptr, mem)
2568		return true
2569	}
2570	return false
2571}
2572func rewriteValue386_Op386CMPWload(v *Value) bool {
2573	v_2 := v.Args[2]
2574	v_1 := v.Args[1]
2575	v_0 := v.Args[0]
2576	// match: (CMPWload {sym} [off] ptr (MOVLconst [c]) mem)
2577	// result: (CMPWconstload {sym} [makeValAndOff(int32(int16(c)),off)] ptr mem)
2578	for {
2579		off := auxIntToInt32(v.AuxInt)
2580		sym := auxToSym(v.Aux)
2581		ptr := v_0
2582		if v_1.Op != Op386MOVLconst {
2583			break
2584		}
2585		c := auxIntToInt32(v_1.AuxInt)
2586		mem := v_2
2587		v.reset(Op386CMPWconstload)
2588		v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int16(c)), off))
2589		v.Aux = symToAux(sym)
2590		v.AddArg2(ptr, mem)
2591		return true
2592	}
2593	return false
2594}
2595func rewriteValue386_Op386DIVSD(v *Value) bool {
2596	v_1 := v.Args[1]
2597	v_0 := v.Args[0]
2598	// match: (DIVSD x l:(MOVSDload [off] {sym} ptr mem))
2599	// cond: canMergeLoadClobber(v, l, x) && clobber(l)
2600	// result: (DIVSDload x [off] {sym} ptr mem)
2601	for {
2602		x := v_0
2603		l := v_1
2604		if l.Op != Op386MOVSDload {
2605			break
2606		}
2607		off := auxIntToInt32(l.AuxInt)
2608		sym := auxToSym(l.Aux)
2609		mem := l.Args[1]
2610		ptr := l.Args[0]
2611		if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
2612			break
2613		}
2614		v.reset(Op386DIVSDload)
2615		v.AuxInt = int32ToAuxInt(off)
2616		v.Aux = symToAux(sym)
2617		v.AddArg3(x, ptr, mem)
2618		return true
2619	}
2620	return false
2621}
2622func rewriteValue386_Op386DIVSDload(v *Value) bool {
2623	v_2 := v.Args[2]
2624	v_1 := v.Args[1]
2625	v_0 := v.Args[0]
2626	b := v.Block
2627	config := b.Func.Config
2628	// match: (DIVSDload [off1] {sym} val (ADDLconst [off2] base) mem)
2629	// cond: is32Bit(int64(off1)+int64(off2))
2630	// result: (DIVSDload [off1+off2] {sym} val base mem)
2631	for {
2632		off1 := auxIntToInt32(v.AuxInt)
2633		sym := auxToSym(v.Aux)
2634		val := v_0
2635		if v_1.Op != Op386ADDLconst {
2636			break
2637		}
2638		off2 := auxIntToInt32(v_1.AuxInt)
2639		base := v_1.Args[0]
2640		mem := v_2
2641		if !(is32Bit(int64(off1) + int64(off2))) {
2642			break
2643		}
2644		v.reset(Op386DIVSDload)
2645		v.AuxInt = int32ToAuxInt(off1 + off2)
2646		v.Aux = symToAux(sym)
2647		v.AddArg3(val, base, mem)
2648		return true
2649	}
2650	// match: (DIVSDload [off1] {sym1} val (LEAL [off2] {sym2} base) mem)
2651	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
2652	// result: (DIVSDload [off1+off2] {mergeSym(sym1,sym2)} val base mem)
2653	for {
2654		off1 := auxIntToInt32(v.AuxInt)
2655		sym1 := auxToSym(v.Aux)
2656		val := v_0
2657		if v_1.Op != Op386LEAL {
2658			break
2659		}
2660		off2 := auxIntToInt32(v_1.AuxInt)
2661		sym2 := auxToSym(v_1.Aux)
2662		base := v_1.Args[0]
2663		mem := v_2
2664		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
2665			break
2666		}
2667		v.reset(Op386DIVSDload)
2668		v.AuxInt = int32ToAuxInt(off1 + off2)
2669		v.Aux = symToAux(mergeSym(sym1, sym2))
2670		v.AddArg3(val, base, mem)
2671		return true
2672	}
2673	return false
2674}
2675func rewriteValue386_Op386DIVSS(v *Value) bool {
2676	v_1 := v.Args[1]
2677	v_0 := v.Args[0]
2678	// match: (DIVSS x l:(MOVSSload [off] {sym} ptr mem))
2679	// cond: canMergeLoadClobber(v, l, x) && clobber(l)
2680	// result: (DIVSSload x [off] {sym} ptr mem)
2681	for {
2682		x := v_0
2683		l := v_1
2684		if l.Op != Op386MOVSSload {
2685			break
2686		}
2687		off := auxIntToInt32(l.AuxInt)
2688		sym := auxToSym(l.Aux)
2689		mem := l.Args[1]
2690		ptr := l.Args[0]
2691		if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
2692			break
2693		}
2694		v.reset(Op386DIVSSload)
2695		v.AuxInt = int32ToAuxInt(off)
2696		v.Aux = symToAux(sym)
2697		v.AddArg3(x, ptr, mem)
2698		return true
2699	}
2700	return false
2701}
2702func rewriteValue386_Op386DIVSSload(v *Value) bool {
2703	v_2 := v.Args[2]
2704	v_1 := v.Args[1]
2705	v_0 := v.Args[0]
2706	b := v.Block
2707	config := b.Func.Config
2708	// match: (DIVSSload [off1] {sym} val (ADDLconst [off2] base) mem)
2709	// cond: is32Bit(int64(off1)+int64(off2))
2710	// result: (DIVSSload [off1+off2] {sym} val base mem)
2711	for {
2712		off1 := auxIntToInt32(v.AuxInt)
2713		sym := auxToSym(v.Aux)
2714		val := v_0
2715		if v_1.Op != Op386ADDLconst {
2716			break
2717		}
2718		off2 := auxIntToInt32(v_1.AuxInt)
2719		base := v_1.Args[0]
2720		mem := v_2
2721		if !(is32Bit(int64(off1) + int64(off2))) {
2722			break
2723		}
2724		v.reset(Op386DIVSSload)
2725		v.AuxInt = int32ToAuxInt(off1 + off2)
2726		v.Aux = symToAux(sym)
2727		v.AddArg3(val, base, mem)
2728		return true
2729	}
2730	// match: (DIVSSload [off1] {sym1} val (LEAL [off2] {sym2} base) mem)
2731	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
2732	// result: (DIVSSload [off1+off2] {mergeSym(sym1,sym2)} val base mem)
2733	for {
2734		off1 := auxIntToInt32(v.AuxInt)
2735		sym1 := auxToSym(v.Aux)
2736		val := v_0
2737		if v_1.Op != Op386LEAL {
2738			break
2739		}
2740		off2 := auxIntToInt32(v_1.AuxInt)
2741		sym2 := auxToSym(v_1.Aux)
2742		base := v_1.Args[0]
2743		mem := v_2
2744		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
2745			break
2746		}
2747		v.reset(Op386DIVSSload)
2748		v.AuxInt = int32ToAuxInt(off1 + off2)
2749		v.Aux = symToAux(mergeSym(sym1, sym2))
2750		v.AddArg3(val, base, mem)
2751		return true
2752	}
2753	return false
2754}
2755func rewriteValue386_Op386LEAL(v *Value) bool {
2756	v_0 := v.Args[0]
2757	// match: (LEAL [c] {s} (ADDLconst [d] x))
2758	// cond: is32Bit(int64(c)+int64(d))
2759	// result: (LEAL [c+d] {s} x)
2760	for {
2761		c := auxIntToInt32(v.AuxInt)
2762		s := auxToSym(v.Aux)
2763		if v_0.Op != Op386ADDLconst {
2764			break
2765		}
2766		d := auxIntToInt32(v_0.AuxInt)
2767		x := v_0.Args[0]
2768		if !(is32Bit(int64(c) + int64(d))) {
2769			break
2770		}
2771		v.reset(Op386LEAL)
2772		v.AuxInt = int32ToAuxInt(c + d)
2773		v.Aux = symToAux(s)
2774		v.AddArg(x)
2775		return true
2776	}
2777	// match: (LEAL [c] {s} (ADDL x y))
2778	// cond: x.Op != OpSB && y.Op != OpSB
2779	// result: (LEAL1 [c] {s} x y)
2780	for {
2781		c := auxIntToInt32(v.AuxInt)
2782		s := auxToSym(v.Aux)
2783		if v_0.Op != Op386ADDL {
2784			break
2785		}
2786		_ = v_0.Args[1]
2787		v_0_0 := v_0.Args[0]
2788		v_0_1 := v_0.Args[1]
2789		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
2790			x := v_0_0
2791			y := v_0_1
2792			if !(x.Op != OpSB && y.Op != OpSB) {
2793				continue
2794			}
2795			v.reset(Op386LEAL1)
2796			v.AuxInt = int32ToAuxInt(c)
2797			v.Aux = symToAux(s)
2798			v.AddArg2(x, y)
2799			return true
2800		}
2801		break
2802	}
2803	// match: (LEAL [off1] {sym1} (LEAL [off2] {sym2} x))
2804	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2)
2805	// result: (LEAL [off1+off2] {mergeSym(sym1,sym2)} x)
2806	for {
2807		off1 := auxIntToInt32(v.AuxInt)
2808		sym1 := auxToSym(v.Aux)
2809		if v_0.Op != Op386LEAL {
2810			break
2811		}
2812		off2 := auxIntToInt32(v_0.AuxInt)
2813		sym2 := auxToSym(v_0.Aux)
2814		x := v_0.Args[0]
2815		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2)) {
2816			break
2817		}
2818		v.reset(Op386LEAL)
2819		v.AuxInt = int32ToAuxInt(off1 + off2)
2820		v.Aux = symToAux(mergeSym(sym1, sym2))
2821		v.AddArg(x)
2822		return true
2823	}
2824	// match: (LEAL [off1] {sym1} (LEAL1 [off2] {sym2} x y))
2825	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2)
2826	// result: (LEAL1 [off1+off2] {mergeSym(sym1,sym2)} x y)
2827	for {
2828		off1 := auxIntToInt32(v.AuxInt)
2829		sym1 := auxToSym(v.Aux)
2830		if v_0.Op != Op386LEAL1 {
2831			break
2832		}
2833		off2 := auxIntToInt32(v_0.AuxInt)
2834		sym2 := auxToSym(v_0.Aux)
2835		y := v_0.Args[1]
2836		x := v_0.Args[0]
2837		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2)) {
2838			break
2839		}
2840		v.reset(Op386LEAL1)
2841		v.AuxInt = int32ToAuxInt(off1 + off2)
2842		v.Aux = symToAux(mergeSym(sym1, sym2))
2843		v.AddArg2(x, y)
2844		return true
2845	}
2846	// match: (LEAL [off1] {sym1} (LEAL2 [off2] {sym2} x y))
2847	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2)
2848	// result: (LEAL2 [off1+off2] {mergeSym(sym1,sym2)} x y)
2849	for {
2850		off1 := auxIntToInt32(v.AuxInt)
2851		sym1 := auxToSym(v.Aux)
2852		if v_0.Op != Op386LEAL2 {
2853			break
2854		}
2855		off2 := auxIntToInt32(v_0.AuxInt)
2856		sym2 := auxToSym(v_0.Aux)
2857		y := v_0.Args[1]
2858		x := v_0.Args[0]
2859		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2)) {
2860			break
2861		}
2862		v.reset(Op386LEAL2)
2863		v.AuxInt = int32ToAuxInt(off1 + off2)
2864		v.Aux = symToAux(mergeSym(sym1, sym2))
2865		v.AddArg2(x, y)
2866		return true
2867	}
2868	// match: (LEAL [off1] {sym1} (LEAL4 [off2] {sym2} x y))
2869	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2)
2870	// result: (LEAL4 [off1+off2] {mergeSym(sym1,sym2)} x y)
2871	for {
2872		off1 := auxIntToInt32(v.AuxInt)
2873		sym1 := auxToSym(v.Aux)
2874		if v_0.Op != Op386LEAL4 {
2875			break
2876		}
2877		off2 := auxIntToInt32(v_0.AuxInt)
2878		sym2 := auxToSym(v_0.Aux)
2879		y := v_0.Args[1]
2880		x := v_0.Args[0]
2881		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2)) {
2882			break
2883		}
2884		v.reset(Op386LEAL4)
2885		v.AuxInt = int32ToAuxInt(off1 + off2)
2886		v.Aux = symToAux(mergeSym(sym1, sym2))
2887		v.AddArg2(x, y)
2888		return true
2889	}
2890	// match: (LEAL [off1] {sym1} (LEAL8 [off2] {sym2} x y))
2891	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2)
2892	// result: (LEAL8 [off1+off2] {mergeSym(sym1,sym2)} x y)
2893	for {
2894		off1 := auxIntToInt32(v.AuxInt)
2895		sym1 := auxToSym(v.Aux)
2896		if v_0.Op != Op386LEAL8 {
2897			break
2898		}
2899		off2 := auxIntToInt32(v_0.AuxInt)
2900		sym2 := auxToSym(v_0.Aux)
2901		y := v_0.Args[1]
2902		x := v_0.Args[0]
2903		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2)) {
2904			break
2905		}
2906		v.reset(Op386LEAL8)
2907		v.AuxInt = int32ToAuxInt(off1 + off2)
2908		v.Aux = symToAux(mergeSym(sym1, sym2))
2909		v.AddArg2(x, y)
2910		return true
2911	}
2912	return false
2913}
2914func rewriteValue386_Op386LEAL1(v *Value) bool {
2915	v_1 := v.Args[1]
2916	v_0 := v.Args[0]
2917	// match: (LEAL1 [c] {s} (ADDLconst [d] x) y)
2918	// cond: is32Bit(int64(c)+int64(d)) && x.Op != OpSB
2919	// result: (LEAL1 [c+d] {s} x y)
2920	for {
2921		c := auxIntToInt32(v.AuxInt)
2922		s := auxToSym(v.Aux)
2923		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
2924			if v_0.Op != Op386ADDLconst {
2925				continue
2926			}
2927			d := auxIntToInt32(v_0.AuxInt)
2928			x := v_0.Args[0]
2929			y := v_1
2930			if !(is32Bit(int64(c)+int64(d)) && x.Op != OpSB) {
2931				continue
2932			}
2933			v.reset(Op386LEAL1)
2934			v.AuxInt = int32ToAuxInt(c + d)
2935			v.Aux = symToAux(s)
2936			v.AddArg2(x, y)
2937			return true
2938		}
2939		break
2940	}
2941	// match: (LEAL1 [c] {s} x (SHLLconst [1] y))
2942	// result: (LEAL2 [c] {s} x y)
2943	for {
2944		c := auxIntToInt32(v.AuxInt)
2945		s := auxToSym(v.Aux)
2946		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
2947			x := v_0
2948			if v_1.Op != Op386SHLLconst || auxIntToInt32(v_1.AuxInt) != 1 {
2949				continue
2950			}
2951			y := v_1.Args[0]
2952			v.reset(Op386LEAL2)
2953			v.AuxInt = int32ToAuxInt(c)
2954			v.Aux = symToAux(s)
2955			v.AddArg2(x, y)
2956			return true
2957		}
2958		break
2959	}
2960	// match: (LEAL1 [c] {s} x (SHLLconst [2] y))
2961	// result: (LEAL4 [c] {s} x y)
2962	for {
2963		c := auxIntToInt32(v.AuxInt)
2964		s := auxToSym(v.Aux)
2965		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
2966			x := v_0
2967			if v_1.Op != Op386SHLLconst || auxIntToInt32(v_1.AuxInt) != 2 {
2968				continue
2969			}
2970			y := v_1.Args[0]
2971			v.reset(Op386LEAL4)
2972			v.AuxInt = int32ToAuxInt(c)
2973			v.Aux = symToAux(s)
2974			v.AddArg2(x, y)
2975			return true
2976		}
2977		break
2978	}
2979	// match: (LEAL1 [c] {s} x (SHLLconst [3] y))
2980	// result: (LEAL8 [c] {s} x y)
2981	for {
2982		c := auxIntToInt32(v.AuxInt)
2983		s := auxToSym(v.Aux)
2984		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
2985			x := v_0
2986			if v_1.Op != Op386SHLLconst || auxIntToInt32(v_1.AuxInt) != 3 {
2987				continue
2988			}
2989			y := v_1.Args[0]
2990			v.reset(Op386LEAL8)
2991			v.AuxInt = int32ToAuxInt(c)
2992			v.Aux = symToAux(s)
2993			v.AddArg2(x, y)
2994			return true
2995		}
2996		break
2997	}
2998	// match: (LEAL1 [off1] {sym1} (LEAL [off2] {sym2} x) y)
2999	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && x.Op != OpSB
3000	// result: (LEAL1 [off1+off2] {mergeSym(sym1,sym2)} x y)
3001	for {
3002		off1 := auxIntToInt32(v.AuxInt)
3003		sym1 := auxToSym(v.Aux)
3004		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
3005			if v_0.Op != Op386LEAL {
3006				continue
3007			}
3008			off2 := auxIntToInt32(v_0.AuxInt)
3009			sym2 := auxToSym(v_0.Aux)
3010			x := v_0.Args[0]
3011			y := v_1
3012			if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && x.Op != OpSB) {
3013				continue
3014			}
3015			v.reset(Op386LEAL1)
3016			v.AuxInt = int32ToAuxInt(off1 + off2)
3017			v.Aux = symToAux(mergeSym(sym1, sym2))
3018			v.AddArg2(x, y)
3019			return true
3020		}
3021		break
3022	}
3023	// match: (LEAL1 [off1] {sym1} x (LEAL1 [off2] {sym2} y y))
3024	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2)
3025	// result: (LEAL2 [off1+off2] {mergeSym(sym1, sym2)} x y)
3026	for {
3027		off1 := auxIntToInt32(v.AuxInt)
3028		sym1 := auxToSym(v.Aux)
3029		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
3030			x := v_0
3031			if v_1.Op != Op386LEAL1 {
3032				continue
3033			}
3034			off2 := auxIntToInt32(v_1.AuxInt)
3035			sym2 := auxToSym(v_1.Aux)
3036			y := v_1.Args[1]
3037			if y != v_1.Args[0] || !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2)) {
3038				continue
3039			}
3040			v.reset(Op386LEAL2)
3041			v.AuxInt = int32ToAuxInt(off1 + off2)
3042			v.Aux = symToAux(mergeSym(sym1, sym2))
3043			v.AddArg2(x, y)
3044			return true
3045		}
3046		break
3047	}
3048	// match: (LEAL1 [off1] {sym1} x (LEAL1 [off2] {sym2} x y))
3049	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2)
3050	// result: (LEAL2 [off1+off2] {mergeSym(sym1, sym2)} y x)
3051	for {
3052		off1 := auxIntToInt32(v.AuxInt)
3053		sym1 := auxToSym(v.Aux)
3054		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
3055			x := v_0
3056			if v_1.Op != Op386LEAL1 {
3057				continue
3058			}
3059			off2 := auxIntToInt32(v_1.AuxInt)
3060			sym2 := auxToSym(v_1.Aux)
3061			_ = v_1.Args[1]
3062			v_1_0 := v_1.Args[0]
3063			v_1_1 := v_1.Args[1]
3064			for _i1 := 0; _i1 <= 1; _i1, v_1_0, v_1_1 = _i1+1, v_1_1, v_1_0 {
3065				if x != v_1_0 {
3066					continue
3067				}
3068				y := v_1_1
3069				if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2)) {
3070					continue
3071				}
3072				v.reset(Op386LEAL2)
3073				v.AuxInt = int32ToAuxInt(off1 + off2)
3074				v.Aux = symToAux(mergeSym(sym1, sym2))
3075				v.AddArg2(y, x)
3076				return true
3077			}
3078		}
3079		break
3080	}
3081	// match: (LEAL1 [0] {nil} x y)
3082	// result: (ADDL x y)
3083	for {
3084		if auxIntToInt32(v.AuxInt) != 0 || auxToSym(v.Aux) != nil {
3085			break
3086		}
3087		x := v_0
3088		y := v_1
3089		v.reset(Op386ADDL)
3090		v.AddArg2(x, y)
3091		return true
3092	}
3093	return false
3094}
3095func rewriteValue386_Op386LEAL2(v *Value) bool {
3096	v_1 := v.Args[1]
3097	v_0 := v.Args[0]
3098	// match: (LEAL2 [c] {s} (ADDLconst [d] x) y)
3099	// cond: is32Bit(int64(c)+int64(d)) && x.Op != OpSB
3100	// result: (LEAL2 [c+d] {s} x y)
3101	for {
3102		c := auxIntToInt32(v.AuxInt)
3103		s := auxToSym(v.Aux)
3104		if v_0.Op != Op386ADDLconst {
3105			break
3106		}
3107		d := auxIntToInt32(v_0.AuxInt)
3108		x := v_0.Args[0]
3109		y := v_1
3110		if !(is32Bit(int64(c)+int64(d)) && x.Op != OpSB) {
3111			break
3112		}
3113		v.reset(Op386LEAL2)
3114		v.AuxInt = int32ToAuxInt(c + d)
3115		v.Aux = symToAux(s)
3116		v.AddArg2(x, y)
3117		return true
3118	}
3119	// match: (LEAL2 [c] {s} x (ADDLconst [d] y))
3120	// cond: is32Bit(int64(c)+2*int64(d)) && y.Op != OpSB
3121	// result: (LEAL2 [c+2*d] {s} x y)
3122	for {
3123		c := auxIntToInt32(v.AuxInt)
3124		s := auxToSym(v.Aux)
3125		x := v_0
3126		if v_1.Op != Op386ADDLconst {
3127			break
3128		}
3129		d := auxIntToInt32(v_1.AuxInt)
3130		y := v_1.Args[0]
3131		if !(is32Bit(int64(c)+2*int64(d)) && y.Op != OpSB) {
3132			break
3133		}
3134		v.reset(Op386LEAL2)
3135		v.AuxInt = int32ToAuxInt(c + 2*d)
3136		v.Aux = symToAux(s)
3137		v.AddArg2(x, y)
3138		return true
3139	}
3140	// match: (LEAL2 [c] {s} x (SHLLconst [1] y))
3141	// result: (LEAL4 [c] {s} x y)
3142	for {
3143		c := auxIntToInt32(v.AuxInt)
3144		s := auxToSym(v.Aux)
3145		x := v_0
3146		if v_1.Op != Op386SHLLconst || auxIntToInt32(v_1.AuxInt) != 1 {
3147			break
3148		}
3149		y := v_1.Args[0]
3150		v.reset(Op386LEAL4)
3151		v.AuxInt = int32ToAuxInt(c)
3152		v.Aux = symToAux(s)
3153		v.AddArg2(x, y)
3154		return true
3155	}
3156	// match: (LEAL2 [c] {s} x (SHLLconst [2] y))
3157	// result: (LEAL8 [c] {s} x y)
3158	for {
3159		c := auxIntToInt32(v.AuxInt)
3160		s := auxToSym(v.Aux)
3161		x := v_0
3162		if v_1.Op != Op386SHLLconst || auxIntToInt32(v_1.AuxInt) != 2 {
3163			break
3164		}
3165		y := v_1.Args[0]
3166		v.reset(Op386LEAL8)
3167		v.AuxInt = int32ToAuxInt(c)
3168		v.Aux = symToAux(s)
3169		v.AddArg2(x, y)
3170		return true
3171	}
3172	// match: (LEAL2 [off1] {sym1} (LEAL [off2] {sym2} x) y)
3173	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && x.Op != OpSB
3174	// result: (LEAL2 [off1+off2] {mergeSym(sym1,sym2)} x y)
3175	for {
3176		off1 := auxIntToInt32(v.AuxInt)
3177		sym1 := auxToSym(v.Aux)
3178		if v_0.Op != Op386LEAL {
3179			break
3180		}
3181		off2 := auxIntToInt32(v_0.AuxInt)
3182		sym2 := auxToSym(v_0.Aux)
3183		x := v_0.Args[0]
3184		y := v_1
3185		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && x.Op != OpSB) {
3186			break
3187		}
3188		v.reset(Op386LEAL2)
3189		v.AuxInt = int32ToAuxInt(off1 + off2)
3190		v.Aux = symToAux(mergeSym(sym1, sym2))
3191		v.AddArg2(x, y)
3192		return true
3193	}
3194	// match: (LEAL2 [off1] {sym} x (LEAL1 [off2] {nil} y y))
3195	// cond: is32Bit(int64(off1)+2*int64(off2))
3196	// result: (LEAL4 [off1+2*off2] {sym} x y)
3197	for {
3198		off1 := auxIntToInt32(v.AuxInt)
3199		sym := auxToSym(v.Aux)
3200		x := v_0
3201		if v_1.Op != Op386LEAL1 {
3202			break
3203		}
3204		off2 := auxIntToInt32(v_1.AuxInt)
3205		if auxToSym(v_1.Aux) != nil {
3206			break
3207		}
3208		y := v_1.Args[1]
3209		if y != v_1.Args[0] || !(is32Bit(int64(off1) + 2*int64(off2))) {
3210			break
3211		}
3212		v.reset(Op386LEAL4)
3213		v.AuxInt = int32ToAuxInt(off1 + 2*off2)
3214		v.Aux = symToAux(sym)
3215		v.AddArg2(x, y)
3216		return true
3217	}
3218	return false
3219}
3220func rewriteValue386_Op386LEAL4(v *Value) bool {
3221	v_1 := v.Args[1]
3222	v_0 := v.Args[0]
3223	// match: (LEAL4 [c] {s} (ADDLconst [d] x) y)
3224	// cond: is32Bit(int64(c)+int64(d)) && x.Op != OpSB
3225	// result: (LEAL4 [c+d] {s} x y)
3226	for {
3227		c := auxIntToInt32(v.AuxInt)
3228		s := auxToSym(v.Aux)
3229		if v_0.Op != Op386ADDLconst {
3230			break
3231		}
3232		d := auxIntToInt32(v_0.AuxInt)
3233		x := v_0.Args[0]
3234		y := v_1
3235		if !(is32Bit(int64(c)+int64(d)) && x.Op != OpSB) {
3236			break
3237		}
3238		v.reset(Op386LEAL4)
3239		v.AuxInt = int32ToAuxInt(c + d)
3240		v.Aux = symToAux(s)
3241		v.AddArg2(x, y)
3242		return true
3243	}
3244	// match: (LEAL4 [c] {s} x (ADDLconst [d] y))
3245	// cond: is32Bit(int64(c)+4*int64(d)) && y.Op != OpSB
3246	// result: (LEAL4 [c+4*d] {s} x y)
3247	for {
3248		c := auxIntToInt32(v.AuxInt)
3249		s := auxToSym(v.Aux)
3250		x := v_0
3251		if v_1.Op != Op386ADDLconst {
3252			break
3253		}
3254		d := auxIntToInt32(v_1.AuxInt)
3255		y := v_1.Args[0]
3256		if !(is32Bit(int64(c)+4*int64(d)) && y.Op != OpSB) {
3257			break
3258		}
3259		v.reset(Op386LEAL4)
3260		v.AuxInt = int32ToAuxInt(c + 4*d)
3261		v.Aux = symToAux(s)
3262		v.AddArg2(x, y)
3263		return true
3264	}
3265	// match: (LEAL4 [c] {s} x (SHLLconst [1] y))
3266	// result: (LEAL8 [c] {s} x y)
3267	for {
3268		c := auxIntToInt32(v.AuxInt)
3269		s := auxToSym(v.Aux)
3270		x := v_0
3271		if v_1.Op != Op386SHLLconst || auxIntToInt32(v_1.AuxInt) != 1 {
3272			break
3273		}
3274		y := v_1.Args[0]
3275		v.reset(Op386LEAL8)
3276		v.AuxInt = int32ToAuxInt(c)
3277		v.Aux = symToAux(s)
3278		v.AddArg2(x, y)
3279		return true
3280	}
3281	// match: (LEAL4 [off1] {sym1} (LEAL [off2] {sym2} x) y)
3282	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && x.Op != OpSB
3283	// result: (LEAL4 [off1+off2] {mergeSym(sym1,sym2)} x y)
3284	for {
3285		off1 := auxIntToInt32(v.AuxInt)
3286		sym1 := auxToSym(v.Aux)
3287		if v_0.Op != Op386LEAL {
3288			break
3289		}
3290		off2 := auxIntToInt32(v_0.AuxInt)
3291		sym2 := auxToSym(v_0.Aux)
3292		x := v_0.Args[0]
3293		y := v_1
3294		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && x.Op != OpSB) {
3295			break
3296		}
3297		v.reset(Op386LEAL4)
3298		v.AuxInt = int32ToAuxInt(off1 + off2)
3299		v.Aux = symToAux(mergeSym(sym1, sym2))
3300		v.AddArg2(x, y)
3301		return true
3302	}
3303	// match: (LEAL4 [off1] {sym} x (LEAL1 [off2] {nil} y y))
3304	// cond: is32Bit(int64(off1)+4*int64(off2))
3305	// result: (LEAL8 [off1+4*off2] {sym} x y)
3306	for {
3307		off1 := auxIntToInt32(v.AuxInt)
3308		sym := auxToSym(v.Aux)
3309		x := v_0
3310		if v_1.Op != Op386LEAL1 {
3311			break
3312		}
3313		off2 := auxIntToInt32(v_1.AuxInt)
3314		if auxToSym(v_1.Aux) != nil {
3315			break
3316		}
3317		y := v_1.Args[1]
3318		if y != v_1.Args[0] || !(is32Bit(int64(off1) + 4*int64(off2))) {
3319			break
3320		}
3321		v.reset(Op386LEAL8)
3322		v.AuxInt = int32ToAuxInt(off1 + 4*off2)
3323		v.Aux = symToAux(sym)
3324		v.AddArg2(x, y)
3325		return true
3326	}
3327	return false
3328}
3329func rewriteValue386_Op386LEAL8(v *Value) bool {
3330	v_1 := v.Args[1]
3331	v_0 := v.Args[0]
3332	// match: (LEAL8 [c] {s} (ADDLconst [d] x) y)
3333	// cond: is32Bit(int64(c)+int64(d)) && x.Op != OpSB
3334	// result: (LEAL8 [c+d] {s} x y)
3335	for {
3336		c := auxIntToInt32(v.AuxInt)
3337		s := auxToSym(v.Aux)
3338		if v_0.Op != Op386ADDLconst {
3339			break
3340		}
3341		d := auxIntToInt32(v_0.AuxInt)
3342		x := v_0.Args[0]
3343		y := v_1
3344		if !(is32Bit(int64(c)+int64(d)) && x.Op != OpSB) {
3345			break
3346		}
3347		v.reset(Op386LEAL8)
3348		v.AuxInt = int32ToAuxInt(c + d)
3349		v.Aux = symToAux(s)
3350		v.AddArg2(x, y)
3351		return true
3352	}
3353	// match: (LEAL8 [c] {s} x (ADDLconst [d] y))
3354	// cond: is32Bit(int64(c)+8*int64(d)) && y.Op != OpSB
3355	// result: (LEAL8 [c+8*d] {s} x y)
3356	for {
3357		c := auxIntToInt32(v.AuxInt)
3358		s := auxToSym(v.Aux)
3359		x := v_0
3360		if v_1.Op != Op386ADDLconst {
3361			break
3362		}
3363		d := auxIntToInt32(v_1.AuxInt)
3364		y := v_1.Args[0]
3365		if !(is32Bit(int64(c)+8*int64(d)) && y.Op != OpSB) {
3366			break
3367		}
3368		v.reset(Op386LEAL8)
3369		v.AuxInt = int32ToAuxInt(c + 8*d)
3370		v.Aux = symToAux(s)
3371		v.AddArg2(x, y)
3372		return true
3373	}
3374	// match: (LEAL8 [off1] {sym1} (LEAL [off2] {sym2} x) y)
3375	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && x.Op != OpSB
3376	// result: (LEAL8 [off1+off2] {mergeSym(sym1,sym2)} x y)
3377	for {
3378		off1 := auxIntToInt32(v.AuxInt)
3379		sym1 := auxToSym(v.Aux)
3380		if v_0.Op != Op386LEAL {
3381			break
3382		}
3383		off2 := auxIntToInt32(v_0.AuxInt)
3384		sym2 := auxToSym(v_0.Aux)
3385		x := v_0.Args[0]
3386		y := v_1
3387		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && x.Op != OpSB) {
3388			break
3389		}
3390		v.reset(Op386LEAL8)
3391		v.AuxInt = int32ToAuxInt(off1 + off2)
3392		v.Aux = symToAux(mergeSym(sym1, sym2))
3393		v.AddArg2(x, y)
3394		return true
3395	}
3396	return false
3397}
3398func rewriteValue386_Op386MOVBLSX(v *Value) bool {
3399	v_0 := v.Args[0]
3400	b := v.Block
3401	// match: (MOVBLSX x:(MOVBload [off] {sym} ptr mem))
3402	// cond: x.Uses == 1 && clobber(x)
3403	// result: @x.Block (MOVBLSXload <v.Type> [off] {sym} ptr mem)
3404	for {
3405		x := v_0
3406		if x.Op != Op386MOVBload {
3407			break
3408		}
3409		off := auxIntToInt32(x.AuxInt)
3410		sym := auxToSym(x.Aux)
3411		mem := x.Args[1]
3412		ptr := x.Args[0]
3413		if !(x.Uses == 1 && clobber(x)) {
3414			break
3415		}
3416		b = x.Block
3417		v0 := b.NewValue0(x.Pos, Op386MOVBLSXload, v.Type)
3418		v.copyOf(v0)
3419		v0.AuxInt = int32ToAuxInt(off)
3420		v0.Aux = symToAux(sym)
3421		v0.AddArg2(ptr, mem)
3422		return true
3423	}
3424	// match: (MOVBLSX (ANDLconst [c] x))
3425	// cond: c & 0x80 == 0
3426	// result: (ANDLconst [c & 0x7f] x)
3427	for {
3428		if v_0.Op != Op386ANDLconst {
3429			break
3430		}
3431		c := auxIntToInt32(v_0.AuxInt)
3432		x := v_0.Args[0]
3433		if !(c&0x80 == 0) {
3434			break
3435		}
3436		v.reset(Op386ANDLconst)
3437		v.AuxInt = int32ToAuxInt(c & 0x7f)
3438		v.AddArg(x)
3439		return true
3440	}
3441	return false
3442}
3443func rewriteValue386_Op386MOVBLSXload(v *Value) bool {
3444	v_1 := v.Args[1]
3445	v_0 := v.Args[0]
3446	b := v.Block
3447	config := b.Func.Config
3448	// match: (MOVBLSXload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _))
3449	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
3450	// result: (MOVBLSX x)
3451	for {
3452		off := auxIntToInt32(v.AuxInt)
3453		sym := auxToSym(v.Aux)
3454		ptr := v_0
3455		if v_1.Op != Op386MOVBstore {
3456			break
3457		}
3458		off2 := auxIntToInt32(v_1.AuxInt)
3459		sym2 := auxToSym(v_1.Aux)
3460		x := v_1.Args[1]
3461		ptr2 := v_1.Args[0]
3462		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
3463			break
3464		}
3465		v.reset(Op386MOVBLSX)
3466		v.AddArg(x)
3467		return true
3468	}
3469	// match: (MOVBLSXload [off1] {sym1} (LEAL [off2] {sym2} base) mem)
3470	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
3471	// result: (MOVBLSXload [off1+off2] {mergeSym(sym1,sym2)} base mem)
3472	for {
3473		off1 := auxIntToInt32(v.AuxInt)
3474		sym1 := auxToSym(v.Aux)
3475		if v_0.Op != Op386LEAL {
3476			break
3477		}
3478		off2 := auxIntToInt32(v_0.AuxInt)
3479		sym2 := auxToSym(v_0.Aux)
3480		base := v_0.Args[0]
3481		mem := v_1
3482		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
3483			break
3484		}
3485		v.reset(Op386MOVBLSXload)
3486		v.AuxInt = int32ToAuxInt(off1 + off2)
3487		v.Aux = symToAux(mergeSym(sym1, sym2))
3488		v.AddArg2(base, mem)
3489		return true
3490	}
3491	return false
3492}
3493func rewriteValue386_Op386MOVBLZX(v *Value) bool {
3494	v_0 := v.Args[0]
3495	b := v.Block
3496	// match: (MOVBLZX x:(MOVBload [off] {sym} ptr mem))
3497	// cond: x.Uses == 1 && clobber(x)
3498	// result: @x.Block (MOVBload <v.Type> [off] {sym} ptr mem)
3499	for {
3500		x := v_0
3501		if x.Op != Op386MOVBload {
3502			break
3503		}
3504		off := auxIntToInt32(x.AuxInt)
3505		sym := auxToSym(x.Aux)
3506		mem := x.Args[1]
3507		ptr := x.Args[0]
3508		if !(x.Uses == 1 && clobber(x)) {
3509			break
3510		}
3511		b = x.Block
3512		v0 := b.NewValue0(x.Pos, Op386MOVBload, v.Type)
3513		v.copyOf(v0)
3514		v0.AuxInt = int32ToAuxInt(off)
3515		v0.Aux = symToAux(sym)
3516		v0.AddArg2(ptr, mem)
3517		return true
3518	}
3519	// match: (MOVBLZX (ANDLconst [c] x))
3520	// result: (ANDLconst [c & 0xff] x)
3521	for {
3522		if v_0.Op != Op386ANDLconst {
3523			break
3524		}
3525		c := auxIntToInt32(v_0.AuxInt)
3526		x := v_0.Args[0]
3527		v.reset(Op386ANDLconst)
3528		v.AuxInt = int32ToAuxInt(c & 0xff)
3529		v.AddArg(x)
3530		return true
3531	}
3532	return false
3533}
3534func rewriteValue386_Op386MOVBload(v *Value) bool {
3535	v_1 := v.Args[1]
3536	v_0 := v.Args[0]
3537	b := v.Block
3538	config := b.Func.Config
3539	// match: (MOVBload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _))
3540	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
3541	// result: (MOVBLZX x)
3542	for {
3543		off := auxIntToInt32(v.AuxInt)
3544		sym := auxToSym(v.Aux)
3545		ptr := v_0
3546		if v_1.Op != Op386MOVBstore {
3547			break
3548		}
3549		off2 := auxIntToInt32(v_1.AuxInt)
3550		sym2 := auxToSym(v_1.Aux)
3551		x := v_1.Args[1]
3552		ptr2 := v_1.Args[0]
3553		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
3554			break
3555		}
3556		v.reset(Op386MOVBLZX)
3557		v.AddArg(x)
3558		return true
3559	}
3560	// match: (MOVBload [off1] {sym} (ADDLconst [off2] ptr) mem)
3561	// cond: is32Bit(int64(off1)+int64(off2))
3562	// result: (MOVBload [off1+off2] {sym} ptr mem)
3563	for {
3564		off1 := auxIntToInt32(v.AuxInt)
3565		sym := auxToSym(v.Aux)
3566		if v_0.Op != Op386ADDLconst {
3567			break
3568		}
3569		off2 := auxIntToInt32(v_0.AuxInt)
3570		ptr := v_0.Args[0]
3571		mem := v_1
3572		if !(is32Bit(int64(off1) + int64(off2))) {
3573			break
3574		}
3575		v.reset(Op386MOVBload)
3576		v.AuxInt = int32ToAuxInt(off1 + off2)
3577		v.Aux = symToAux(sym)
3578		v.AddArg2(ptr, mem)
3579		return true
3580	}
3581	// match: (MOVBload [off1] {sym1} (LEAL [off2] {sym2} base) mem)
3582	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
3583	// result: (MOVBload [off1+off2] {mergeSym(sym1,sym2)} base mem)
3584	for {
3585		off1 := auxIntToInt32(v.AuxInt)
3586		sym1 := auxToSym(v.Aux)
3587		if v_0.Op != Op386LEAL {
3588			break
3589		}
3590		off2 := auxIntToInt32(v_0.AuxInt)
3591		sym2 := auxToSym(v_0.Aux)
3592		base := v_0.Args[0]
3593		mem := v_1
3594		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
3595			break
3596		}
3597		v.reset(Op386MOVBload)
3598		v.AuxInt = int32ToAuxInt(off1 + off2)
3599		v.Aux = symToAux(mergeSym(sym1, sym2))
3600		v.AddArg2(base, mem)
3601		return true
3602	}
3603	// match: (MOVBload [off] {sym} (SB) _)
3604	// cond: symIsRO(sym)
3605	// result: (MOVLconst [int32(read8(sym, int64(off)))])
3606	for {
3607		off := auxIntToInt32(v.AuxInt)
3608		sym := auxToSym(v.Aux)
3609		if v_0.Op != OpSB || !(symIsRO(sym)) {
3610			break
3611		}
3612		v.reset(Op386MOVLconst)
3613		v.AuxInt = int32ToAuxInt(int32(read8(sym, int64(off))))
3614		return true
3615	}
3616	return false
3617}
3618func rewriteValue386_Op386MOVBstore(v *Value) bool {
3619	v_2 := v.Args[2]
3620	v_1 := v.Args[1]
3621	v_0 := v.Args[0]
3622	b := v.Block
3623	config := b.Func.Config
3624	// match: (MOVBstore [off] {sym} ptr (MOVBLSX x) mem)
3625	// result: (MOVBstore [off] {sym} ptr x mem)
3626	for {
3627		off := auxIntToInt32(v.AuxInt)
3628		sym := auxToSym(v.Aux)
3629		ptr := v_0
3630		if v_1.Op != Op386MOVBLSX {
3631			break
3632		}
3633		x := v_1.Args[0]
3634		mem := v_2
3635		v.reset(Op386MOVBstore)
3636		v.AuxInt = int32ToAuxInt(off)
3637		v.Aux = symToAux(sym)
3638		v.AddArg3(ptr, x, mem)
3639		return true
3640	}
3641	// match: (MOVBstore [off] {sym} ptr (MOVBLZX x) mem)
3642	// result: (MOVBstore [off] {sym} ptr x mem)
3643	for {
3644		off := auxIntToInt32(v.AuxInt)
3645		sym := auxToSym(v.Aux)
3646		ptr := v_0
3647		if v_1.Op != Op386MOVBLZX {
3648			break
3649		}
3650		x := v_1.Args[0]
3651		mem := v_2
3652		v.reset(Op386MOVBstore)
3653		v.AuxInt = int32ToAuxInt(off)
3654		v.Aux = symToAux(sym)
3655		v.AddArg3(ptr, x, mem)
3656		return true
3657	}
3658	// match: (MOVBstore [off1] {sym} (ADDLconst [off2] ptr) val mem)
3659	// cond: is32Bit(int64(off1)+int64(off2))
3660	// result: (MOVBstore [off1+off2] {sym} ptr val mem)
3661	for {
3662		off1 := auxIntToInt32(v.AuxInt)
3663		sym := auxToSym(v.Aux)
3664		if v_0.Op != Op386ADDLconst {
3665			break
3666		}
3667		off2 := auxIntToInt32(v_0.AuxInt)
3668		ptr := v_0.Args[0]
3669		val := v_1
3670		mem := v_2
3671		if !(is32Bit(int64(off1) + int64(off2))) {
3672			break
3673		}
3674		v.reset(Op386MOVBstore)
3675		v.AuxInt = int32ToAuxInt(off1 + off2)
3676		v.Aux = symToAux(sym)
3677		v.AddArg3(ptr, val, mem)
3678		return true
3679	}
3680	// match: (MOVBstore [off] {sym} ptr (MOVLconst [c]) mem)
3681	// result: (MOVBstoreconst [makeValAndOff(c,off)] {sym} ptr mem)
3682	for {
3683		off := auxIntToInt32(v.AuxInt)
3684		sym := auxToSym(v.Aux)
3685		ptr := v_0
3686		if v_1.Op != Op386MOVLconst {
3687			break
3688		}
3689		c := auxIntToInt32(v_1.AuxInt)
3690		mem := v_2
3691		v.reset(Op386MOVBstoreconst)
3692		v.AuxInt = valAndOffToAuxInt(makeValAndOff(c, off))
3693		v.Aux = symToAux(sym)
3694		v.AddArg2(ptr, mem)
3695		return true
3696	}
3697	// match: (MOVBstore [off1] {sym1} (LEAL [off2] {sym2} base) val mem)
3698	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
3699	// result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} base val mem)
3700	for {
3701		off1 := auxIntToInt32(v.AuxInt)
3702		sym1 := auxToSym(v.Aux)
3703		if v_0.Op != Op386LEAL {
3704			break
3705		}
3706		off2 := auxIntToInt32(v_0.AuxInt)
3707		sym2 := auxToSym(v_0.Aux)
3708		base := v_0.Args[0]
3709		val := v_1
3710		mem := v_2
3711		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
3712			break
3713		}
3714		v.reset(Op386MOVBstore)
3715		v.AuxInt = int32ToAuxInt(off1 + off2)
3716		v.Aux = symToAux(mergeSym(sym1, sym2))
3717		v.AddArg3(base, val, mem)
3718		return true
3719	}
3720	return false
3721}
3722func rewriteValue386_Op386MOVBstoreconst(v *Value) bool {
3723	v_1 := v.Args[1]
3724	v_0 := v.Args[0]
3725	b := v.Block
3726	config := b.Func.Config
3727	// match: (MOVBstoreconst [sc] {s} (ADDLconst [off] ptr) mem)
3728	// cond: sc.canAdd32(off)
3729	// result: (MOVBstoreconst [sc.addOffset32(off)] {s} ptr mem)
3730	for {
3731		sc := auxIntToValAndOff(v.AuxInt)
3732		s := auxToSym(v.Aux)
3733		if v_0.Op != Op386ADDLconst {
3734			break
3735		}
3736		off := auxIntToInt32(v_0.AuxInt)
3737		ptr := v_0.Args[0]
3738		mem := v_1
3739		if !(sc.canAdd32(off)) {
3740			break
3741		}
3742		v.reset(Op386MOVBstoreconst)
3743		v.AuxInt = valAndOffToAuxInt(sc.addOffset32(off))
3744		v.Aux = symToAux(s)
3745		v.AddArg2(ptr, mem)
3746		return true
3747	}
3748	// match: (MOVBstoreconst [sc] {sym1} (LEAL [off] {sym2} ptr) mem)
3749	// cond: canMergeSym(sym1, sym2) && sc.canAdd32(off) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
3750	// result: (MOVBstoreconst [sc.addOffset32(off)] {mergeSym(sym1, sym2)} ptr mem)
3751	for {
3752		sc := auxIntToValAndOff(v.AuxInt)
3753		sym1 := auxToSym(v.Aux)
3754		if v_0.Op != Op386LEAL {
3755			break
3756		}
3757		off := auxIntToInt32(v_0.AuxInt)
3758		sym2 := auxToSym(v_0.Aux)
3759		ptr := v_0.Args[0]
3760		mem := v_1
3761		if !(canMergeSym(sym1, sym2) && sc.canAdd32(off) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
3762			break
3763		}
3764		v.reset(Op386MOVBstoreconst)
3765		v.AuxInt = valAndOffToAuxInt(sc.addOffset32(off))
3766		v.Aux = symToAux(mergeSym(sym1, sym2))
3767		v.AddArg2(ptr, mem)
3768		return true
3769	}
3770	return false
3771}
3772func rewriteValue386_Op386MOVLload(v *Value) bool {
3773	v_1 := v.Args[1]
3774	v_0 := v.Args[0]
3775	b := v.Block
3776	config := b.Func.Config
3777	// match: (MOVLload [off] {sym} ptr (MOVLstore [off2] {sym2} ptr2 x _))
3778	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
3779	// result: x
3780	for {
3781		off := auxIntToInt32(v.AuxInt)
3782		sym := auxToSym(v.Aux)
3783		ptr := v_0
3784		if v_1.Op != Op386MOVLstore {
3785			break
3786		}
3787		off2 := auxIntToInt32(v_1.AuxInt)
3788		sym2 := auxToSym(v_1.Aux)
3789		x := v_1.Args[1]
3790		ptr2 := v_1.Args[0]
3791		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
3792			break
3793		}
3794		v.copyOf(x)
3795		return true
3796	}
3797	// match: (MOVLload [off1] {sym} (ADDLconst [off2] ptr) mem)
3798	// cond: is32Bit(int64(off1)+int64(off2))
3799	// result: (MOVLload [off1+off2] {sym} ptr mem)
3800	for {
3801		off1 := auxIntToInt32(v.AuxInt)
3802		sym := auxToSym(v.Aux)
3803		if v_0.Op != Op386ADDLconst {
3804			break
3805		}
3806		off2 := auxIntToInt32(v_0.AuxInt)
3807		ptr := v_0.Args[0]
3808		mem := v_1
3809		if !(is32Bit(int64(off1) + int64(off2))) {
3810			break
3811		}
3812		v.reset(Op386MOVLload)
3813		v.AuxInt = int32ToAuxInt(off1 + off2)
3814		v.Aux = symToAux(sym)
3815		v.AddArg2(ptr, mem)
3816		return true
3817	}
3818	// match: (MOVLload [off1] {sym1} (LEAL [off2] {sym2} base) mem)
3819	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
3820	// result: (MOVLload [off1+off2] {mergeSym(sym1,sym2)} base mem)
3821	for {
3822		off1 := auxIntToInt32(v.AuxInt)
3823		sym1 := auxToSym(v.Aux)
3824		if v_0.Op != Op386LEAL {
3825			break
3826		}
3827		off2 := auxIntToInt32(v_0.AuxInt)
3828		sym2 := auxToSym(v_0.Aux)
3829		base := v_0.Args[0]
3830		mem := v_1
3831		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
3832			break
3833		}
3834		v.reset(Op386MOVLload)
3835		v.AuxInt = int32ToAuxInt(off1 + off2)
3836		v.Aux = symToAux(mergeSym(sym1, sym2))
3837		v.AddArg2(base, mem)
3838		return true
3839	}
3840	// match: (MOVLload [off] {sym} (SB) _)
3841	// cond: symIsRO(sym)
3842	// result: (MOVLconst [int32(read32(sym, int64(off), config.ctxt.Arch.ByteOrder))])
3843	for {
3844		off := auxIntToInt32(v.AuxInt)
3845		sym := auxToSym(v.Aux)
3846		if v_0.Op != OpSB || !(symIsRO(sym)) {
3847			break
3848		}
3849		v.reset(Op386MOVLconst)
3850		v.AuxInt = int32ToAuxInt(int32(read32(sym, int64(off), config.ctxt.Arch.ByteOrder)))
3851		return true
3852	}
3853	return false
3854}
3855func rewriteValue386_Op386MOVLstore(v *Value) bool {
3856	v_2 := v.Args[2]
3857	v_1 := v.Args[1]
3858	v_0 := v.Args[0]
3859	b := v.Block
3860	config := b.Func.Config
3861	// match: (MOVLstore [off1] {sym} (ADDLconst [off2] ptr) val mem)
3862	// cond: is32Bit(int64(off1)+int64(off2))
3863	// result: (MOVLstore [off1+off2] {sym} ptr val mem)
3864	for {
3865		off1 := auxIntToInt32(v.AuxInt)
3866		sym := auxToSym(v.Aux)
3867		if v_0.Op != Op386ADDLconst {
3868			break
3869		}
3870		off2 := auxIntToInt32(v_0.AuxInt)
3871		ptr := v_0.Args[0]
3872		val := v_1
3873		mem := v_2
3874		if !(is32Bit(int64(off1) + int64(off2))) {
3875			break
3876		}
3877		v.reset(Op386MOVLstore)
3878		v.AuxInt = int32ToAuxInt(off1 + off2)
3879		v.Aux = symToAux(sym)
3880		v.AddArg3(ptr, val, mem)
3881		return true
3882	}
3883	// match: (MOVLstore [off] {sym} ptr (MOVLconst [c]) mem)
3884	// result: (MOVLstoreconst [makeValAndOff(c,off)] {sym} ptr mem)
3885	for {
3886		off := auxIntToInt32(v.AuxInt)
3887		sym := auxToSym(v.Aux)
3888		ptr := v_0
3889		if v_1.Op != Op386MOVLconst {
3890			break
3891		}
3892		c := auxIntToInt32(v_1.AuxInt)
3893		mem := v_2
3894		v.reset(Op386MOVLstoreconst)
3895		v.AuxInt = valAndOffToAuxInt(makeValAndOff(c, off))
3896		v.Aux = symToAux(sym)
3897		v.AddArg2(ptr, mem)
3898		return true
3899	}
3900	// match: (MOVLstore [off1] {sym1} (LEAL [off2] {sym2} base) val mem)
3901	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
3902	// result: (MOVLstore [off1+off2] {mergeSym(sym1,sym2)} base val mem)
3903	for {
3904		off1 := auxIntToInt32(v.AuxInt)
3905		sym1 := auxToSym(v.Aux)
3906		if v_0.Op != Op386LEAL {
3907			break
3908		}
3909		off2 := auxIntToInt32(v_0.AuxInt)
3910		sym2 := auxToSym(v_0.Aux)
3911		base := v_0.Args[0]
3912		val := v_1
3913		mem := v_2
3914		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
3915			break
3916		}
3917		v.reset(Op386MOVLstore)
3918		v.AuxInt = int32ToAuxInt(off1 + off2)
3919		v.Aux = symToAux(mergeSym(sym1, sym2))
3920		v.AddArg3(base, val, mem)
3921		return true
3922	}
3923	// match: (MOVLstore {sym} [off] ptr y:(ADDLload x [off] {sym} ptr mem) mem)
3924	// cond: y.Uses==1 && clobber(y)
3925	// result: (ADDLmodify [off] {sym} ptr x mem)
3926	for {
3927		off := auxIntToInt32(v.AuxInt)
3928		sym := auxToSym(v.Aux)
3929		ptr := v_0
3930		y := v_1
3931		if y.Op != Op386ADDLload || auxIntToInt32(y.AuxInt) != off || auxToSym(y.Aux) != sym {
3932			break
3933		}
3934		mem := y.Args[2]
3935		x := y.Args[0]
3936		if ptr != y.Args[1] || mem != v_2 || !(y.Uses == 1 && clobber(y)) {
3937			break
3938		}
3939		v.reset(Op386ADDLmodify)
3940		v.AuxInt = int32ToAuxInt(off)
3941		v.Aux = symToAux(sym)
3942		v.AddArg3(ptr, x, mem)
3943		return true
3944	}
3945	// match: (MOVLstore {sym} [off] ptr y:(ANDLload x [off] {sym} ptr mem) mem)
3946	// cond: y.Uses==1 && clobber(y)
3947	// result: (ANDLmodify [off] {sym} ptr x mem)
3948	for {
3949		off := auxIntToInt32(v.AuxInt)
3950		sym := auxToSym(v.Aux)
3951		ptr := v_0
3952		y := v_1
3953		if y.Op != Op386ANDLload || auxIntToInt32(y.AuxInt) != off || auxToSym(y.Aux) != sym {
3954			break
3955		}
3956		mem := y.Args[2]
3957		x := y.Args[0]
3958		if ptr != y.Args[1] || mem != v_2 || !(y.Uses == 1 && clobber(y)) {
3959			break
3960		}
3961		v.reset(Op386ANDLmodify)
3962		v.AuxInt = int32ToAuxInt(off)
3963		v.Aux = symToAux(sym)
3964		v.AddArg3(ptr, x, mem)
3965		return true
3966	}
3967	// match: (MOVLstore {sym} [off] ptr y:(ORLload x [off] {sym} ptr mem) mem)
3968	// cond: y.Uses==1 && clobber(y)
3969	// result: (ORLmodify [off] {sym} ptr x mem)
3970	for {
3971		off := auxIntToInt32(v.AuxInt)
3972		sym := auxToSym(v.Aux)
3973		ptr := v_0
3974		y := v_1
3975		if y.Op != Op386ORLload || auxIntToInt32(y.AuxInt) != off || auxToSym(y.Aux) != sym {
3976			break
3977		}
3978		mem := y.Args[2]
3979		x := y.Args[0]
3980		if ptr != y.Args[1] || mem != v_2 || !(y.Uses == 1 && clobber(y)) {
3981			break
3982		}
3983		v.reset(Op386ORLmodify)
3984		v.AuxInt = int32ToAuxInt(off)
3985		v.Aux = symToAux(sym)
3986		v.AddArg3(ptr, x, mem)
3987		return true
3988	}
3989	// match: (MOVLstore {sym} [off] ptr y:(XORLload x [off] {sym} ptr mem) mem)
3990	// cond: y.Uses==1 && clobber(y)
3991	// result: (XORLmodify [off] {sym} ptr x mem)
3992	for {
3993		off := auxIntToInt32(v.AuxInt)
3994		sym := auxToSym(v.Aux)
3995		ptr := v_0
3996		y := v_1
3997		if y.Op != Op386XORLload || auxIntToInt32(y.AuxInt) != off || auxToSym(y.Aux) != sym {
3998			break
3999		}
4000		mem := y.Args[2]
4001		x := y.Args[0]
4002		if ptr != y.Args[1] || mem != v_2 || !(y.Uses == 1 && clobber(y)) {
4003			break
4004		}
4005		v.reset(Op386XORLmodify)
4006		v.AuxInt = int32ToAuxInt(off)
4007		v.Aux = symToAux(sym)
4008		v.AddArg3(ptr, x, mem)
4009		return true
4010	}
4011	// match: (MOVLstore {sym} [off] ptr y:(ADDL l:(MOVLload [off] {sym} ptr mem) x) mem)
4012	// cond: y.Uses==1 && l.Uses==1 && clobber(y, l)
4013	// result: (ADDLmodify [off] {sym} ptr x mem)
4014	for {
4015		off := auxIntToInt32(v.AuxInt)
4016		sym := auxToSym(v.Aux)
4017		ptr := v_0
4018		y := v_1
4019		if y.Op != Op386ADDL {
4020			break
4021		}
4022		_ = y.Args[1]
4023		y_0 := y.Args[0]
4024		y_1 := y.Args[1]
4025		for _i0 := 0; _i0 <= 1; _i0, y_0, y_1 = _i0+1, y_1, y_0 {
4026			l := y_0
4027			if l.Op != Op386MOVLload || auxIntToInt32(l.AuxInt) != off || auxToSym(l.Aux) != sym {
4028				continue
4029			}
4030			mem := l.Args[1]
4031			if ptr != l.Args[0] {
4032				continue
4033			}
4034			x := y_1
4035			if mem != v_2 || !(y.Uses == 1 && l.Uses == 1 && clobber(y, l)) {
4036				continue
4037			}
4038			v.reset(Op386ADDLmodify)
4039			v.AuxInt = int32ToAuxInt(off)
4040			v.Aux = symToAux(sym)
4041			v.AddArg3(ptr, x, mem)
4042			return true
4043		}
4044		break
4045	}
4046	// match: (MOVLstore {sym} [off] ptr y:(SUBL l:(MOVLload [off] {sym} ptr mem) x) mem)
4047	// cond: y.Uses==1 && l.Uses==1 && clobber(y, l)
4048	// result: (SUBLmodify [off] {sym} ptr x mem)
4049	for {
4050		off := auxIntToInt32(v.AuxInt)
4051		sym := auxToSym(v.Aux)
4052		ptr := v_0
4053		y := v_1
4054		if y.Op != Op386SUBL {
4055			break
4056		}
4057		x := y.Args[1]
4058		l := y.Args[0]
4059		if l.Op != Op386MOVLload || auxIntToInt32(l.AuxInt) != off || auxToSym(l.Aux) != sym {
4060			break
4061		}
4062		mem := l.Args[1]
4063		if ptr != l.Args[0] || mem != v_2 || !(y.Uses == 1 && l.Uses == 1 && clobber(y, l)) {
4064			break
4065		}
4066		v.reset(Op386SUBLmodify)
4067		v.AuxInt = int32ToAuxInt(off)
4068		v.Aux = symToAux(sym)
4069		v.AddArg3(ptr, x, mem)
4070		return true
4071	}
4072	// match: (MOVLstore {sym} [off] ptr y:(ANDL l:(MOVLload [off] {sym} ptr mem) x) mem)
4073	// cond: y.Uses==1 && l.Uses==1 && clobber(y, l)
4074	// result: (ANDLmodify [off] {sym} ptr x mem)
4075	for {
4076		off := auxIntToInt32(v.AuxInt)
4077		sym := auxToSym(v.Aux)
4078		ptr := v_0
4079		y := v_1
4080		if y.Op != Op386ANDL {
4081			break
4082		}
4083		_ = y.Args[1]
4084		y_0 := y.Args[0]
4085		y_1 := y.Args[1]
4086		for _i0 := 0; _i0 <= 1; _i0, y_0, y_1 = _i0+1, y_1, y_0 {
4087			l := y_0
4088			if l.Op != Op386MOVLload || auxIntToInt32(l.AuxInt) != off || auxToSym(l.Aux) != sym {
4089				continue
4090			}
4091			mem := l.Args[1]
4092			if ptr != l.Args[0] {
4093				continue
4094			}
4095			x := y_1
4096			if mem != v_2 || !(y.Uses == 1 && l.Uses == 1 && clobber(y, l)) {
4097				continue
4098			}
4099			v.reset(Op386ANDLmodify)
4100			v.AuxInt = int32ToAuxInt(off)
4101			v.Aux = symToAux(sym)
4102			v.AddArg3(ptr, x, mem)
4103			return true
4104		}
4105		break
4106	}
4107	// match: (MOVLstore {sym} [off] ptr y:(ORL l:(MOVLload [off] {sym} ptr mem) x) mem)
4108	// cond: y.Uses==1 && l.Uses==1 && clobber(y, l)
4109	// result: (ORLmodify [off] {sym} ptr x mem)
4110	for {
4111		off := auxIntToInt32(v.AuxInt)
4112		sym := auxToSym(v.Aux)
4113		ptr := v_0
4114		y := v_1
4115		if y.Op != Op386ORL {
4116			break
4117		}
4118		_ = y.Args[1]
4119		y_0 := y.Args[0]
4120		y_1 := y.Args[1]
4121		for _i0 := 0; _i0 <= 1; _i0, y_0, y_1 = _i0+1, y_1, y_0 {
4122			l := y_0
4123			if l.Op != Op386MOVLload || auxIntToInt32(l.AuxInt) != off || auxToSym(l.Aux) != sym {
4124				continue
4125			}
4126			mem := l.Args[1]
4127			if ptr != l.Args[0] {
4128				continue
4129			}
4130			x := y_1
4131			if mem != v_2 || !(y.Uses == 1 && l.Uses == 1 && clobber(y, l)) {
4132				continue
4133			}
4134			v.reset(Op386ORLmodify)
4135			v.AuxInt = int32ToAuxInt(off)
4136			v.Aux = symToAux(sym)
4137			v.AddArg3(ptr, x, mem)
4138			return true
4139		}
4140		break
4141	}
4142	// match: (MOVLstore {sym} [off] ptr y:(XORL l:(MOVLload [off] {sym} ptr mem) x) mem)
4143	// cond: y.Uses==1 && l.Uses==1 && clobber(y, l)
4144	// result: (XORLmodify [off] {sym} ptr x mem)
4145	for {
4146		off := auxIntToInt32(v.AuxInt)
4147		sym := auxToSym(v.Aux)
4148		ptr := v_0
4149		y := v_1
4150		if y.Op != Op386XORL {
4151			break
4152		}
4153		_ = y.Args[1]
4154		y_0 := y.Args[0]
4155		y_1 := y.Args[1]
4156		for _i0 := 0; _i0 <= 1; _i0, y_0, y_1 = _i0+1, y_1, y_0 {
4157			l := y_0
4158			if l.Op != Op386MOVLload || auxIntToInt32(l.AuxInt) != off || auxToSym(l.Aux) != sym {
4159				continue
4160			}
4161			mem := l.Args[1]
4162			if ptr != l.Args[0] {
4163				continue
4164			}
4165			x := y_1
4166			if mem != v_2 || !(y.Uses == 1 && l.Uses == 1 && clobber(y, l)) {
4167				continue
4168			}
4169			v.reset(Op386XORLmodify)
4170			v.AuxInt = int32ToAuxInt(off)
4171			v.Aux = symToAux(sym)
4172			v.AddArg3(ptr, x, mem)
4173			return true
4174		}
4175		break
4176	}
4177	// match: (MOVLstore {sym} [off] ptr y:(ADDLconst [c] l:(MOVLload [off] {sym} ptr mem)) mem)
4178	// cond: y.Uses==1 && l.Uses==1 && clobber(y, l)
4179	// result: (ADDLconstmodify [makeValAndOff(c,off)] {sym} ptr mem)
4180	for {
4181		off := auxIntToInt32(v.AuxInt)
4182		sym := auxToSym(v.Aux)
4183		ptr := v_0
4184		y := v_1
4185		if y.Op != Op386ADDLconst {
4186			break
4187		}
4188		c := auxIntToInt32(y.AuxInt)
4189		l := y.Args[0]
4190		if l.Op != Op386MOVLload || auxIntToInt32(l.AuxInt) != off || auxToSym(l.Aux) != sym {
4191			break
4192		}
4193		mem := l.Args[1]
4194		if ptr != l.Args[0] || mem != v_2 || !(y.Uses == 1 && l.Uses == 1 && clobber(y, l)) {
4195			break
4196		}
4197		v.reset(Op386ADDLconstmodify)
4198		v.AuxInt = valAndOffToAuxInt(makeValAndOff(c, off))
4199		v.Aux = symToAux(sym)
4200		v.AddArg2(ptr, mem)
4201		return true
4202	}
4203	// match: (MOVLstore {sym} [off] ptr y:(ANDLconst [c] l:(MOVLload [off] {sym} ptr mem)) mem)
4204	// cond: y.Uses==1 && l.Uses==1 && clobber(y, l)
4205	// result: (ANDLconstmodify [makeValAndOff(c,off)] {sym} ptr mem)
4206	for {
4207		off := auxIntToInt32(v.AuxInt)
4208		sym := auxToSym(v.Aux)
4209		ptr := v_0
4210		y := v_1
4211		if y.Op != Op386ANDLconst {
4212			break
4213		}
4214		c := auxIntToInt32(y.AuxInt)
4215		l := y.Args[0]
4216		if l.Op != Op386MOVLload || auxIntToInt32(l.AuxInt) != off || auxToSym(l.Aux) != sym {
4217			break
4218		}
4219		mem := l.Args[1]
4220		if ptr != l.Args[0] || mem != v_2 || !(y.Uses == 1 && l.Uses == 1 && clobber(y, l)) {
4221			break
4222		}
4223		v.reset(Op386ANDLconstmodify)
4224		v.AuxInt = valAndOffToAuxInt(makeValAndOff(c, off))
4225		v.Aux = symToAux(sym)
4226		v.AddArg2(ptr, mem)
4227		return true
4228	}
4229	// match: (MOVLstore {sym} [off] ptr y:(ORLconst [c] l:(MOVLload [off] {sym} ptr mem)) mem)
4230	// cond: y.Uses==1 && l.Uses==1 && clobber(y, l)
4231	// result: (ORLconstmodify [makeValAndOff(c,off)] {sym} ptr mem)
4232	for {
4233		off := auxIntToInt32(v.AuxInt)
4234		sym := auxToSym(v.Aux)
4235		ptr := v_0
4236		y := v_1
4237		if y.Op != Op386ORLconst {
4238			break
4239		}
4240		c := auxIntToInt32(y.AuxInt)
4241		l := y.Args[0]
4242		if l.Op != Op386MOVLload || auxIntToInt32(l.AuxInt) != off || auxToSym(l.Aux) != sym {
4243			break
4244		}
4245		mem := l.Args[1]
4246		if ptr != l.Args[0] || mem != v_2 || !(y.Uses == 1 && l.Uses == 1 && clobber(y, l)) {
4247			break
4248		}
4249		v.reset(Op386ORLconstmodify)
4250		v.AuxInt = valAndOffToAuxInt(makeValAndOff(c, off))
4251		v.Aux = symToAux(sym)
4252		v.AddArg2(ptr, mem)
4253		return true
4254	}
4255	// match: (MOVLstore {sym} [off] ptr y:(XORLconst [c] l:(MOVLload [off] {sym} ptr mem)) mem)
4256	// cond: y.Uses==1 && l.Uses==1 && clobber(y, l)
4257	// result: (XORLconstmodify [makeValAndOff(c,off)] {sym} ptr mem)
4258	for {
4259		off := auxIntToInt32(v.AuxInt)
4260		sym := auxToSym(v.Aux)
4261		ptr := v_0
4262		y := v_1
4263		if y.Op != Op386XORLconst {
4264			break
4265		}
4266		c := auxIntToInt32(y.AuxInt)
4267		l := y.Args[0]
4268		if l.Op != Op386MOVLload || auxIntToInt32(l.AuxInt) != off || auxToSym(l.Aux) != sym {
4269			break
4270		}
4271		mem := l.Args[1]
4272		if ptr != l.Args[0] || mem != v_2 || !(y.Uses == 1 && l.Uses == 1 && clobber(y, l)) {
4273			break
4274		}
4275		v.reset(Op386XORLconstmodify)
4276		v.AuxInt = valAndOffToAuxInt(makeValAndOff(c, off))
4277		v.Aux = symToAux(sym)
4278		v.AddArg2(ptr, mem)
4279		return true
4280	}
4281	return false
4282}
4283func rewriteValue386_Op386MOVLstoreconst(v *Value) bool {
4284	v_1 := v.Args[1]
4285	v_0 := v.Args[0]
4286	b := v.Block
4287	config := b.Func.Config
4288	// match: (MOVLstoreconst [sc] {s} (ADDLconst [off] ptr) mem)
4289	// cond: sc.canAdd32(off)
4290	// result: (MOVLstoreconst [sc.addOffset32(off)] {s} ptr mem)
4291	for {
4292		sc := auxIntToValAndOff(v.AuxInt)
4293		s := auxToSym(v.Aux)
4294		if v_0.Op != Op386ADDLconst {
4295			break
4296		}
4297		off := auxIntToInt32(v_0.AuxInt)
4298		ptr := v_0.Args[0]
4299		mem := v_1
4300		if !(sc.canAdd32(off)) {
4301			break
4302		}
4303		v.reset(Op386MOVLstoreconst)
4304		v.AuxInt = valAndOffToAuxInt(sc.addOffset32(off))
4305		v.Aux = symToAux(s)
4306		v.AddArg2(ptr, mem)
4307		return true
4308	}
4309	// match: (MOVLstoreconst [sc] {sym1} (LEAL [off] {sym2} ptr) mem)
4310	// cond: canMergeSym(sym1, sym2) && sc.canAdd32(off) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
4311	// result: (MOVLstoreconst [sc.addOffset32(off)] {mergeSym(sym1, sym2)} ptr mem)
4312	for {
4313		sc := auxIntToValAndOff(v.AuxInt)
4314		sym1 := auxToSym(v.Aux)
4315		if v_0.Op != Op386LEAL {
4316			break
4317		}
4318		off := auxIntToInt32(v_0.AuxInt)
4319		sym2 := auxToSym(v_0.Aux)
4320		ptr := v_0.Args[0]
4321		mem := v_1
4322		if !(canMergeSym(sym1, sym2) && sc.canAdd32(off) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
4323			break
4324		}
4325		v.reset(Op386MOVLstoreconst)
4326		v.AuxInt = valAndOffToAuxInt(sc.addOffset32(off))
4327		v.Aux = symToAux(mergeSym(sym1, sym2))
4328		v.AddArg2(ptr, mem)
4329		return true
4330	}
4331	return false
4332}
4333func rewriteValue386_Op386MOVSDconst(v *Value) bool {
4334	b := v.Block
4335	config := b.Func.Config
4336	typ := &b.Func.Config.Types
4337	// match: (MOVSDconst [c])
4338	// cond: config.ctxt.Flag_shared
4339	// result: (MOVSDconst2 (MOVSDconst1 [c]))
4340	for {
4341		c := auxIntToFloat64(v.AuxInt)
4342		if !(config.ctxt.Flag_shared) {
4343			break
4344		}
4345		v.reset(Op386MOVSDconst2)
4346		v0 := b.NewValue0(v.Pos, Op386MOVSDconst1, typ.UInt32)
4347		v0.AuxInt = float64ToAuxInt(c)
4348		v.AddArg(v0)
4349		return true
4350	}
4351	return false
4352}
4353func rewriteValue386_Op386MOVSDload(v *Value) bool {
4354	v_1 := v.Args[1]
4355	v_0 := v.Args[0]
4356	b := v.Block
4357	config := b.Func.Config
4358	// match: (MOVSDload [off1] {sym} (ADDLconst [off2] ptr) mem)
4359	// cond: is32Bit(int64(off1)+int64(off2))
4360	// result: (MOVSDload [off1+off2] {sym} ptr mem)
4361	for {
4362		off1 := auxIntToInt32(v.AuxInt)
4363		sym := auxToSym(v.Aux)
4364		if v_0.Op != Op386ADDLconst {
4365			break
4366		}
4367		off2 := auxIntToInt32(v_0.AuxInt)
4368		ptr := v_0.Args[0]
4369		mem := v_1
4370		if !(is32Bit(int64(off1) + int64(off2))) {
4371			break
4372		}
4373		v.reset(Op386MOVSDload)
4374		v.AuxInt = int32ToAuxInt(off1 + off2)
4375		v.Aux = symToAux(sym)
4376		v.AddArg2(ptr, mem)
4377		return true
4378	}
4379	// match: (MOVSDload [off1] {sym1} (LEAL [off2] {sym2} base) mem)
4380	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
4381	// result: (MOVSDload [off1+off2] {mergeSym(sym1,sym2)} base mem)
4382	for {
4383		off1 := auxIntToInt32(v.AuxInt)
4384		sym1 := auxToSym(v.Aux)
4385		if v_0.Op != Op386LEAL {
4386			break
4387		}
4388		off2 := auxIntToInt32(v_0.AuxInt)
4389		sym2 := auxToSym(v_0.Aux)
4390		base := v_0.Args[0]
4391		mem := v_1
4392		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
4393			break
4394		}
4395		v.reset(Op386MOVSDload)
4396		v.AuxInt = int32ToAuxInt(off1 + off2)
4397		v.Aux = symToAux(mergeSym(sym1, sym2))
4398		v.AddArg2(base, mem)
4399		return true
4400	}
4401	return false
4402}
4403func rewriteValue386_Op386MOVSDstore(v *Value) bool {
4404	v_2 := v.Args[2]
4405	v_1 := v.Args[1]
4406	v_0 := v.Args[0]
4407	b := v.Block
4408	config := b.Func.Config
4409	// match: (MOVSDstore [off1] {sym} (ADDLconst [off2] ptr) val mem)
4410	// cond: is32Bit(int64(off1)+int64(off2))
4411	// result: (MOVSDstore [off1+off2] {sym} ptr val mem)
4412	for {
4413		off1 := auxIntToInt32(v.AuxInt)
4414		sym := auxToSym(v.Aux)
4415		if v_0.Op != Op386ADDLconst {
4416			break
4417		}
4418		off2 := auxIntToInt32(v_0.AuxInt)
4419		ptr := v_0.Args[0]
4420		val := v_1
4421		mem := v_2
4422		if !(is32Bit(int64(off1) + int64(off2))) {
4423			break
4424		}
4425		v.reset(Op386MOVSDstore)
4426		v.AuxInt = int32ToAuxInt(off1 + off2)
4427		v.Aux = symToAux(sym)
4428		v.AddArg3(ptr, val, mem)
4429		return true
4430	}
4431	// match: (MOVSDstore [off1] {sym1} (LEAL [off2] {sym2} base) val mem)
4432	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
4433	// result: (MOVSDstore [off1+off2] {mergeSym(sym1,sym2)} base val mem)
4434	for {
4435		off1 := auxIntToInt32(v.AuxInt)
4436		sym1 := auxToSym(v.Aux)
4437		if v_0.Op != Op386LEAL {
4438			break
4439		}
4440		off2 := auxIntToInt32(v_0.AuxInt)
4441		sym2 := auxToSym(v_0.Aux)
4442		base := v_0.Args[0]
4443		val := v_1
4444		mem := v_2
4445		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
4446			break
4447		}
4448		v.reset(Op386MOVSDstore)
4449		v.AuxInt = int32ToAuxInt(off1 + off2)
4450		v.Aux = symToAux(mergeSym(sym1, sym2))
4451		v.AddArg3(base, val, mem)
4452		return true
4453	}
4454	return false
4455}
4456func rewriteValue386_Op386MOVSSconst(v *Value) bool {
4457	b := v.Block
4458	config := b.Func.Config
4459	typ := &b.Func.Config.Types
4460	// match: (MOVSSconst [c])
4461	// cond: config.ctxt.Flag_shared
4462	// result: (MOVSSconst2 (MOVSSconst1 [c]))
4463	for {
4464		c := auxIntToFloat32(v.AuxInt)
4465		if !(config.ctxt.Flag_shared) {
4466			break
4467		}
4468		v.reset(Op386MOVSSconst2)
4469		v0 := b.NewValue0(v.Pos, Op386MOVSSconst1, typ.UInt32)
4470		v0.AuxInt = float32ToAuxInt(c)
4471		v.AddArg(v0)
4472		return true
4473	}
4474	return false
4475}
4476func rewriteValue386_Op386MOVSSload(v *Value) bool {
4477	v_1 := v.Args[1]
4478	v_0 := v.Args[0]
4479	b := v.Block
4480	config := b.Func.Config
4481	// match: (MOVSSload [off1] {sym} (ADDLconst [off2] ptr) mem)
4482	// cond: is32Bit(int64(off1)+int64(off2))
4483	// result: (MOVSSload [off1+off2] {sym} ptr mem)
4484	for {
4485		off1 := auxIntToInt32(v.AuxInt)
4486		sym := auxToSym(v.Aux)
4487		if v_0.Op != Op386ADDLconst {
4488			break
4489		}
4490		off2 := auxIntToInt32(v_0.AuxInt)
4491		ptr := v_0.Args[0]
4492		mem := v_1
4493		if !(is32Bit(int64(off1) + int64(off2))) {
4494			break
4495		}
4496		v.reset(Op386MOVSSload)
4497		v.AuxInt = int32ToAuxInt(off1 + off2)
4498		v.Aux = symToAux(sym)
4499		v.AddArg2(ptr, mem)
4500		return true
4501	}
4502	// match: (MOVSSload [off1] {sym1} (LEAL [off2] {sym2} base) mem)
4503	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
4504	// result: (MOVSSload [off1+off2] {mergeSym(sym1,sym2)} base mem)
4505	for {
4506		off1 := auxIntToInt32(v.AuxInt)
4507		sym1 := auxToSym(v.Aux)
4508		if v_0.Op != Op386LEAL {
4509			break
4510		}
4511		off2 := auxIntToInt32(v_0.AuxInt)
4512		sym2 := auxToSym(v_0.Aux)
4513		base := v_0.Args[0]
4514		mem := v_1
4515		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
4516			break
4517		}
4518		v.reset(Op386MOVSSload)
4519		v.AuxInt = int32ToAuxInt(off1 + off2)
4520		v.Aux = symToAux(mergeSym(sym1, sym2))
4521		v.AddArg2(base, mem)
4522		return true
4523	}
4524	return false
4525}
4526func rewriteValue386_Op386MOVSSstore(v *Value) bool {
4527	v_2 := v.Args[2]
4528	v_1 := v.Args[1]
4529	v_0 := v.Args[0]
4530	b := v.Block
4531	config := b.Func.Config
4532	// match: (MOVSSstore [off1] {sym} (ADDLconst [off2] ptr) val mem)
4533	// cond: is32Bit(int64(off1)+int64(off2))
4534	// result: (MOVSSstore [off1+off2] {sym} ptr val mem)
4535	for {
4536		off1 := auxIntToInt32(v.AuxInt)
4537		sym := auxToSym(v.Aux)
4538		if v_0.Op != Op386ADDLconst {
4539			break
4540		}
4541		off2 := auxIntToInt32(v_0.AuxInt)
4542		ptr := v_0.Args[0]
4543		val := v_1
4544		mem := v_2
4545		if !(is32Bit(int64(off1) + int64(off2))) {
4546			break
4547		}
4548		v.reset(Op386MOVSSstore)
4549		v.AuxInt = int32ToAuxInt(off1 + off2)
4550		v.Aux = symToAux(sym)
4551		v.AddArg3(ptr, val, mem)
4552		return true
4553	}
4554	// match: (MOVSSstore [off1] {sym1} (LEAL [off2] {sym2} base) val mem)
4555	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
4556	// result: (MOVSSstore [off1+off2] {mergeSym(sym1,sym2)} base val mem)
4557	for {
4558		off1 := auxIntToInt32(v.AuxInt)
4559		sym1 := auxToSym(v.Aux)
4560		if v_0.Op != Op386LEAL {
4561			break
4562		}
4563		off2 := auxIntToInt32(v_0.AuxInt)
4564		sym2 := auxToSym(v_0.Aux)
4565		base := v_0.Args[0]
4566		val := v_1
4567		mem := v_2
4568		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
4569			break
4570		}
4571		v.reset(Op386MOVSSstore)
4572		v.AuxInt = int32ToAuxInt(off1 + off2)
4573		v.Aux = symToAux(mergeSym(sym1, sym2))
4574		v.AddArg3(base, val, mem)
4575		return true
4576	}
4577	return false
4578}
4579func rewriteValue386_Op386MOVWLSX(v *Value) bool {
4580	v_0 := v.Args[0]
4581	b := v.Block
4582	// match: (MOVWLSX x:(MOVWload [off] {sym} ptr mem))
4583	// cond: x.Uses == 1 && clobber(x)
4584	// result: @x.Block (MOVWLSXload <v.Type> [off] {sym} ptr mem)
4585	for {
4586		x := v_0
4587		if x.Op != Op386MOVWload {
4588			break
4589		}
4590		off := auxIntToInt32(x.AuxInt)
4591		sym := auxToSym(x.Aux)
4592		mem := x.Args[1]
4593		ptr := x.Args[0]
4594		if !(x.Uses == 1 && clobber(x)) {
4595			break
4596		}
4597		b = x.Block
4598		v0 := b.NewValue0(x.Pos, Op386MOVWLSXload, v.Type)
4599		v.copyOf(v0)
4600		v0.AuxInt = int32ToAuxInt(off)
4601		v0.Aux = symToAux(sym)
4602		v0.AddArg2(ptr, mem)
4603		return true
4604	}
4605	// match: (MOVWLSX (ANDLconst [c] x))
4606	// cond: c & 0x8000 == 0
4607	// result: (ANDLconst [c & 0x7fff] x)
4608	for {
4609		if v_0.Op != Op386ANDLconst {
4610			break
4611		}
4612		c := auxIntToInt32(v_0.AuxInt)
4613		x := v_0.Args[0]
4614		if !(c&0x8000 == 0) {
4615			break
4616		}
4617		v.reset(Op386ANDLconst)
4618		v.AuxInt = int32ToAuxInt(c & 0x7fff)
4619		v.AddArg(x)
4620		return true
4621	}
4622	return false
4623}
4624func rewriteValue386_Op386MOVWLSXload(v *Value) bool {
4625	v_1 := v.Args[1]
4626	v_0 := v.Args[0]
4627	b := v.Block
4628	config := b.Func.Config
4629	// match: (MOVWLSXload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _))
4630	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
4631	// result: (MOVWLSX x)
4632	for {
4633		off := auxIntToInt32(v.AuxInt)
4634		sym := auxToSym(v.Aux)
4635		ptr := v_0
4636		if v_1.Op != Op386MOVWstore {
4637			break
4638		}
4639		off2 := auxIntToInt32(v_1.AuxInt)
4640		sym2 := auxToSym(v_1.Aux)
4641		x := v_1.Args[1]
4642		ptr2 := v_1.Args[0]
4643		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
4644			break
4645		}
4646		v.reset(Op386MOVWLSX)
4647		v.AddArg(x)
4648		return true
4649	}
4650	// match: (MOVWLSXload [off1] {sym1} (LEAL [off2] {sym2} base) mem)
4651	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
4652	// result: (MOVWLSXload [off1+off2] {mergeSym(sym1,sym2)} base mem)
4653	for {
4654		off1 := auxIntToInt32(v.AuxInt)
4655		sym1 := auxToSym(v.Aux)
4656		if v_0.Op != Op386LEAL {
4657			break
4658		}
4659		off2 := auxIntToInt32(v_0.AuxInt)
4660		sym2 := auxToSym(v_0.Aux)
4661		base := v_0.Args[0]
4662		mem := v_1
4663		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
4664			break
4665		}
4666		v.reset(Op386MOVWLSXload)
4667		v.AuxInt = int32ToAuxInt(off1 + off2)
4668		v.Aux = symToAux(mergeSym(sym1, sym2))
4669		v.AddArg2(base, mem)
4670		return true
4671	}
4672	return false
4673}
4674func rewriteValue386_Op386MOVWLZX(v *Value) bool {
4675	v_0 := v.Args[0]
4676	b := v.Block
4677	// match: (MOVWLZX x:(MOVWload [off] {sym} ptr mem))
4678	// cond: x.Uses == 1 && clobber(x)
4679	// result: @x.Block (MOVWload <v.Type> [off] {sym} ptr mem)
4680	for {
4681		x := v_0
4682		if x.Op != Op386MOVWload {
4683			break
4684		}
4685		off := auxIntToInt32(x.AuxInt)
4686		sym := auxToSym(x.Aux)
4687		mem := x.Args[1]
4688		ptr := x.Args[0]
4689		if !(x.Uses == 1 && clobber(x)) {
4690			break
4691		}
4692		b = x.Block
4693		v0 := b.NewValue0(x.Pos, Op386MOVWload, v.Type)
4694		v.copyOf(v0)
4695		v0.AuxInt = int32ToAuxInt(off)
4696		v0.Aux = symToAux(sym)
4697		v0.AddArg2(ptr, mem)
4698		return true
4699	}
4700	// match: (MOVWLZX (ANDLconst [c] x))
4701	// result: (ANDLconst [c & 0xffff] x)
4702	for {
4703		if v_0.Op != Op386ANDLconst {
4704			break
4705		}
4706		c := auxIntToInt32(v_0.AuxInt)
4707		x := v_0.Args[0]
4708		v.reset(Op386ANDLconst)
4709		v.AuxInt = int32ToAuxInt(c & 0xffff)
4710		v.AddArg(x)
4711		return true
4712	}
4713	return false
4714}
4715func rewriteValue386_Op386MOVWload(v *Value) bool {
4716	v_1 := v.Args[1]
4717	v_0 := v.Args[0]
4718	b := v.Block
4719	config := b.Func.Config
4720	// match: (MOVWload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _))
4721	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
4722	// result: (MOVWLZX x)
4723	for {
4724		off := auxIntToInt32(v.AuxInt)
4725		sym := auxToSym(v.Aux)
4726		ptr := v_0
4727		if v_1.Op != Op386MOVWstore {
4728			break
4729		}
4730		off2 := auxIntToInt32(v_1.AuxInt)
4731		sym2 := auxToSym(v_1.Aux)
4732		x := v_1.Args[1]
4733		ptr2 := v_1.Args[0]
4734		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
4735			break
4736		}
4737		v.reset(Op386MOVWLZX)
4738		v.AddArg(x)
4739		return true
4740	}
4741	// match: (MOVWload [off1] {sym} (ADDLconst [off2] ptr) mem)
4742	// cond: is32Bit(int64(off1)+int64(off2))
4743	// result: (MOVWload [off1+off2] {sym} ptr mem)
4744	for {
4745		off1 := auxIntToInt32(v.AuxInt)
4746		sym := auxToSym(v.Aux)
4747		if v_0.Op != Op386ADDLconst {
4748			break
4749		}
4750		off2 := auxIntToInt32(v_0.AuxInt)
4751		ptr := v_0.Args[0]
4752		mem := v_1
4753		if !(is32Bit(int64(off1) + int64(off2))) {
4754			break
4755		}
4756		v.reset(Op386MOVWload)
4757		v.AuxInt = int32ToAuxInt(off1 + off2)
4758		v.Aux = symToAux(sym)
4759		v.AddArg2(ptr, mem)
4760		return true
4761	}
4762	// match: (MOVWload [off1] {sym1} (LEAL [off2] {sym2} base) mem)
4763	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
4764	// result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} base mem)
4765	for {
4766		off1 := auxIntToInt32(v.AuxInt)
4767		sym1 := auxToSym(v.Aux)
4768		if v_0.Op != Op386LEAL {
4769			break
4770		}
4771		off2 := auxIntToInt32(v_0.AuxInt)
4772		sym2 := auxToSym(v_0.Aux)
4773		base := v_0.Args[0]
4774		mem := v_1
4775		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
4776			break
4777		}
4778		v.reset(Op386MOVWload)
4779		v.AuxInt = int32ToAuxInt(off1 + off2)
4780		v.Aux = symToAux(mergeSym(sym1, sym2))
4781		v.AddArg2(base, mem)
4782		return true
4783	}
4784	// match: (MOVWload [off] {sym} (SB) _)
4785	// cond: symIsRO(sym)
4786	// result: (MOVLconst [int32(read16(sym, int64(off), config.ctxt.Arch.ByteOrder))])
4787	for {
4788		off := auxIntToInt32(v.AuxInt)
4789		sym := auxToSym(v.Aux)
4790		if v_0.Op != OpSB || !(symIsRO(sym)) {
4791			break
4792		}
4793		v.reset(Op386MOVLconst)
4794		v.AuxInt = int32ToAuxInt(int32(read16(sym, int64(off), config.ctxt.Arch.ByteOrder)))
4795		return true
4796	}
4797	return false
4798}
4799func rewriteValue386_Op386MOVWstore(v *Value) bool {
4800	v_2 := v.Args[2]
4801	v_1 := v.Args[1]
4802	v_0 := v.Args[0]
4803	b := v.Block
4804	config := b.Func.Config
4805	// match: (MOVWstore [off] {sym} ptr (MOVWLSX x) mem)
4806	// result: (MOVWstore [off] {sym} ptr x mem)
4807	for {
4808		off := auxIntToInt32(v.AuxInt)
4809		sym := auxToSym(v.Aux)
4810		ptr := v_0
4811		if v_1.Op != Op386MOVWLSX {
4812			break
4813		}
4814		x := v_1.Args[0]
4815		mem := v_2
4816		v.reset(Op386MOVWstore)
4817		v.AuxInt = int32ToAuxInt(off)
4818		v.Aux = symToAux(sym)
4819		v.AddArg3(ptr, x, mem)
4820		return true
4821	}
4822	// match: (MOVWstore [off] {sym} ptr (MOVWLZX x) mem)
4823	// result: (MOVWstore [off] {sym} ptr x mem)
4824	for {
4825		off := auxIntToInt32(v.AuxInt)
4826		sym := auxToSym(v.Aux)
4827		ptr := v_0
4828		if v_1.Op != Op386MOVWLZX {
4829			break
4830		}
4831		x := v_1.Args[0]
4832		mem := v_2
4833		v.reset(Op386MOVWstore)
4834		v.AuxInt = int32ToAuxInt(off)
4835		v.Aux = symToAux(sym)
4836		v.AddArg3(ptr, x, mem)
4837		return true
4838	}
4839	// match: (MOVWstore [off1] {sym} (ADDLconst [off2] ptr) val mem)
4840	// cond: is32Bit(int64(off1)+int64(off2))
4841	// result: (MOVWstore [off1+off2] {sym} ptr val mem)
4842	for {
4843		off1 := auxIntToInt32(v.AuxInt)
4844		sym := auxToSym(v.Aux)
4845		if v_0.Op != Op386ADDLconst {
4846			break
4847		}
4848		off2 := auxIntToInt32(v_0.AuxInt)
4849		ptr := v_0.Args[0]
4850		val := v_1
4851		mem := v_2
4852		if !(is32Bit(int64(off1) + int64(off2))) {
4853			break
4854		}
4855		v.reset(Op386MOVWstore)
4856		v.AuxInt = int32ToAuxInt(off1 + off2)
4857		v.Aux = symToAux(sym)
4858		v.AddArg3(ptr, val, mem)
4859		return true
4860	}
4861	// match: (MOVWstore [off] {sym} ptr (MOVLconst [c]) mem)
4862	// result: (MOVWstoreconst [makeValAndOff(c,off)] {sym} ptr mem)
4863	for {
4864		off := auxIntToInt32(v.AuxInt)
4865		sym := auxToSym(v.Aux)
4866		ptr := v_0
4867		if v_1.Op != Op386MOVLconst {
4868			break
4869		}
4870		c := auxIntToInt32(v_1.AuxInt)
4871		mem := v_2
4872		v.reset(Op386MOVWstoreconst)
4873		v.AuxInt = valAndOffToAuxInt(makeValAndOff(c, off))
4874		v.Aux = symToAux(sym)
4875		v.AddArg2(ptr, mem)
4876		return true
4877	}
4878	// match: (MOVWstore [off1] {sym1} (LEAL [off2] {sym2} base) val mem)
4879	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
4880	// result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} base val mem)
4881	for {
4882		off1 := auxIntToInt32(v.AuxInt)
4883		sym1 := auxToSym(v.Aux)
4884		if v_0.Op != Op386LEAL {
4885			break
4886		}
4887		off2 := auxIntToInt32(v_0.AuxInt)
4888		sym2 := auxToSym(v_0.Aux)
4889		base := v_0.Args[0]
4890		val := v_1
4891		mem := v_2
4892		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
4893			break
4894		}
4895		v.reset(Op386MOVWstore)
4896		v.AuxInt = int32ToAuxInt(off1 + off2)
4897		v.Aux = symToAux(mergeSym(sym1, sym2))
4898		v.AddArg3(base, val, mem)
4899		return true
4900	}
4901	return false
4902}
4903func rewriteValue386_Op386MOVWstoreconst(v *Value) bool {
4904	v_1 := v.Args[1]
4905	v_0 := v.Args[0]
4906	b := v.Block
4907	config := b.Func.Config
4908	// match: (MOVWstoreconst [sc] {s} (ADDLconst [off] ptr) mem)
4909	// cond: sc.canAdd32(off)
4910	// result: (MOVWstoreconst [sc.addOffset32(off)] {s} ptr mem)
4911	for {
4912		sc := auxIntToValAndOff(v.AuxInt)
4913		s := auxToSym(v.Aux)
4914		if v_0.Op != Op386ADDLconst {
4915			break
4916		}
4917		off := auxIntToInt32(v_0.AuxInt)
4918		ptr := v_0.Args[0]
4919		mem := v_1
4920		if !(sc.canAdd32(off)) {
4921			break
4922		}
4923		v.reset(Op386MOVWstoreconst)
4924		v.AuxInt = valAndOffToAuxInt(sc.addOffset32(off))
4925		v.Aux = symToAux(s)
4926		v.AddArg2(ptr, mem)
4927		return true
4928	}
4929	// match: (MOVWstoreconst [sc] {sym1} (LEAL [off] {sym2} ptr) mem)
4930	// cond: canMergeSym(sym1, sym2) && sc.canAdd32(off) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
4931	// result: (MOVWstoreconst [sc.addOffset32(off)] {mergeSym(sym1, sym2)} ptr mem)
4932	for {
4933		sc := auxIntToValAndOff(v.AuxInt)
4934		sym1 := auxToSym(v.Aux)
4935		if v_0.Op != Op386LEAL {
4936			break
4937		}
4938		off := auxIntToInt32(v_0.AuxInt)
4939		sym2 := auxToSym(v_0.Aux)
4940		ptr := v_0.Args[0]
4941		mem := v_1
4942		if !(canMergeSym(sym1, sym2) && sc.canAdd32(off) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
4943			break
4944		}
4945		v.reset(Op386MOVWstoreconst)
4946		v.AuxInt = valAndOffToAuxInt(sc.addOffset32(off))
4947		v.Aux = symToAux(mergeSym(sym1, sym2))
4948		v.AddArg2(ptr, mem)
4949		return true
4950	}
4951	return false
4952}
4953func rewriteValue386_Op386MULL(v *Value) bool {
4954	v_1 := v.Args[1]
4955	v_0 := v.Args[0]
4956	// match: (MULL x (MOVLconst [c]))
4957	// result: (MULLconst [c] x)
4958	for {
4959		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
4960			x := v_0
4961			if v_1.Op != Op386MOVLconst {
4962				continue
4963			}
4964			c := auxIntToInt32(v_1.AuxInt)
4965			v.reset(Op386MULLconst)
4966			v.AuxInt = int32ToAuxInt(c)
4967			v.AddArg(x)
4968			return true
4969		}
4970		break
4971	}
4972	// match: (MULL x l:(MOVLload [off] {sym} ptr mem))
4973	// cond: canMergeLoadClobber(v, l, x) && clobber(l)
4974	// result: (MULLload x [off] {sym} ptr mem)
4975	for {
4976		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
4977			x := v_0
4978			l := v_1
4979			if l.Op != Op386MOVLload {
4980				continue
4981			}
4982			off := auxIntToInt32(l.AuxInt)
4983			sym := auxToSym(l.Aux)
4984			mem := l.Args[1]
4985			ptr := l.Args[0]
4986			if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
4987				continue
4988			}
4989			v.reset(Op386MULLload)
4990			v.AuxInt = int32ToAuxInt(off)
4991			v.Aux = symToAux(sym)
4992			v.AddArg3(x, ptr, mem)
4993			return true
4994		}
4995		break
4996	}
4997	return false
4998}
4999func rewriteValue386_Op386MULLconst(v *Value) bool {
5000	v_0 := v.Args[0]
5001	b := v.Block
5002	// match: (MULLconst [c] (MULLconst [d] x))
5003	// result: (MULLconst [c * d] x)
5004	for {
5005		c := auxIntToInt32(v.AuxInt)
5006		if v_0.Op != Op386MULLconst {
5007			break
5008		}
5009		d := auxIntToInt32(v_0.AuxInt)
5010		x := v_0.Args[0]
5011		v.reset(Op386MULLconst)
5012		v.AuxInt = int32ToAuxInt(c * d)
5013		v.AddArg(x)
5014		return true
5015	}
5016	// match: (MULLconst [-9] x)
5017	// result: (NEGL (LEAL8 <v.Type> x x))
5018	for {
5019		if auxIntToInt32(v.AuxInt) != -9 {
5020			break
5021		}
5022		x := v_0
5023		v.reset(Op386NEGL)
5024		v0 := b.NewValue0(v.Pos, Op386LEAL8, v.Type)
5025		v0.AddArg2(x, x)
5026		v.AddArg(v0)
5027		return true
5028	}
5029	// match: (MULLconst [-5] x)
5030	// result: (NEGL (LEAL4 <v.Type> x x))
5031	for {
5032		if auxIntToInt32(v.AuxInt) != -5 {
5033			break
5034		}
5035		x := v_0
5036		v.reset(Op386NEGL)
5037		v0 := b.NewValue0(v.Pos, Op386LEAL4, v.Type)
5038		v0.AddArg2(x, x)
5039		v.AddArg(v0)
5040		return true
5041	}
5042	// match: (MULLconst [-3] x)
5043	// result: (NEGL (LEAL2 <v.Type> x x))
5044	for {
5045		if auxIntToInt32(v.AuxInt) != -3 {
5046			break
5047		}
5048		x := v_0
5049		v.reset(Op386NEGL)
5050		v0 := b.NewValue0(v.Pos, Op386LEAL2, v.Type)
5051		v0.AddArg2(x, x)
5052		v.AddArg(v0)
5053		return true
5054	}
5055	// match: (MULLconst [-1] x)
5056	// result: (NEGL x)
5057	for {
5058		if auxIntToInt32(v.AuxInt) != -1 {
5059			break
5060		}
5061		x := v_0
5062		v.reset(Op386NEGL)
5063		v.AddArg(x)
5064		return true
5065	}
5066	// match: (MULLconst [0] _)
5067	// result: (MOVLconst [0])
5068	for {
5069		if auxIntToInt32(v.AuxInt) != 0 {
5070			break
5071		}
5072		v.reset(Op386MOVLconst)
5073		v.AuxInt = int32ToAuxInt(0)
5074		return true
5075	}
5076	// match: (MULLconst [1] x)
5077	// result: x
5078	for {
5079		if auxIntToInt32(v.AuxInt) != 1 {
5080			break
5081		}
5082		x := v_0
5083		v.copyOf(x)
5084		return true
5085	}
5086	// match: (MULLconst [3] x)
5087	// result: (LEAL2 x x)
5088	for {
5089		if auxIntToInt32(v.AuxInt) != 3 {
5090			break
5091		}
5092		x := v_0
5093		v.reset(Op386LEAL2)
5094		v.AddArg2(x, x)
5095		return true
5096	}
5097	// match: (MULLconst [5] x)
5098	// result: (LEAL4 x x)
5099	for {
5100		if auxIntToInt32(v.AuxInt) != 5 {
5101			break
5102		}
5103		x := v_0
5104		v.reset(Op386LEAL4)
5105		v.AddArg2(x, x)
5106		return true
5107	}
5108	// match: (MULLconst [7] x)
5109	// result: (LEAL2 x (LEAL2 <v.Type> x x))
5110	for {
5111		if auxIntToInt32(v.AuxInt) != 7 {
5112			break
5113		}
5114		x := v_0
5115		v.reset(Op386LEAL2)
5116		v0 := b.NewValue0(v.Pos, Op386LEAL2, v.Type)
5117		v0.AddArg2(x, x)
5118		v.AddArg2(x, v0)
5119		return true
5120	}
5121	// match: (MULLconst [9] x)
5122	// result: (LEAL8 x x)
5123	for {
5124		if auxIntToInt32(v.AuxInt) != 9 {
5125			break
5126		}
5127		x := v_0
5128		v.reset(Op386LEAL8)
5129		v.AddArg2(x, x)
5130		return true
5131	}
5132	// match: (MULLconst [11] x)
5133	// result: (LEAL2 x (LEAL4 <v.Type> x x))
5134	for {
5135		if auxIntToInt32(v.AuxInt) != 11 {
5136			break
5137		}
5138		x := v_0
5139		v.reset(Op386LEAL2)
5140		v0 := b.NewValue0(v.Pos, Op386LEAL4, v.Type)
5141		v0.AddArg2(x, x)
5142		v.AddArg2(x, v0)
5143		return true
5144	}
5145	// match: (MULLconst [13] x)
5146	// result: (LEAL4 x (LEAL2 <v.Type> x x))
5147	for {
5148		if auxIntToInt32(v.AuxInt) != 13 {
5149			break
5150		}
5151		x := v_0
5152		v.reset(Op386LEAL4)
5153		v0 := b.NewValue0(v.Pos, Op386LEAL2, v.Type)
5154		v0.AddArg2(x, x)
5155		v.AddArg2(x, v0)
5156		return true
5157	}
5158	// match: (MULLconst [19] x)
5159	// result: (LEAL2 x (LEAL8 <v.Type> x x))
5160	for {
5161		if auxIntToInt32(v.AuxInt) != 19 {
5162			break
5163		}
5164		x := v_0
5165		v.reset(Op386LEAL2)
5166		v0 := b.NewValue0(v.Pos, Op386LEAL8, v.Type)
5167		v0.AddArg2(x, x)
5168		v.AddArg2(x, v0)
5169		return true
5170	}
5171	// match: (MULLconst [21] x)
5172	// result: (LEAL4 x (LEAL4 <v.Type> x x))
5173	for {
5174		if auxIntToInt32(v.AuxInt) != 21 {
5175			break
5176		}
5177		x := v_0
5178		v.reset(Op386LEAL4)
5179		v0 := b.NewValue0(v.Pos, Op386LEAL4, v.Type)
5180		v0.AddArg2(x, x)
5181		v.AddArg2(x, v0)
5182		return true
5183	}
5184	// match: (MULLconst [25] x)
5185	// result: (LEAL8 x (LEAL2 <v.Type> x x))
5186	for {
5187		if auxIntToInt32(v.AuxInt) != 25 {
5188			break
5189		}
5190		x := v_0
5191		v.reset(Op386LEAL8)
5192		v0 := b.NewValue0(v.Pos, Op386LEAL2, v.Type)
5193		v0.AddArg2(x, x)
5194		v.AddArg2(x, v0)
5195		return true
5196	}
5197	// match: (MULLconst [27] x)
5198	// result: (LEAL8 (LEAL2 <v.Type> x x) (LEAL2 <v.Type> x x))
5199	for {
5200		if auxIntToInt32(v.AuxInt) != 27 {
5201			break
5202		}
5203		x := v_0
5204		v.reset(Op386LEAL8)
5205		v0 := b.NewValue0(v.Pos, Op386LEAL2, v.Type)
5206		v0.AddArg2(x, x)
5207		v.AddArg2(v0, v0)
5208		return true
5209	}
5210	// match: (MULLconst [37] x)
5211	// result: (LEAL4 x (LEAL8 <v.Type> x x))
5212	for {
5213		if auxIntToInt32(v.AuxInt) != 37 {
5214			break
5215		}
5216		x := v_0
5217		v.reset(Op386LEAL4)
5218		v0 := b.NewValue0(v.Pos, Op386LEAL8, v.Type)
5219		v0.AddArg2(x, x)
5220		v.AddArg2(x, v0)
5221		return true
5222	}
5223	// match: (MULLconst [41] x)
5224	// result: (LEAL8 x (LEAL4 <v.Type> x x))
5225	for {
5226		if auxIntToInt32(v.AuxInt) != 41 {
5227			break
5228		}
5229		x := v_0
5230		v.reset(Op386LEAL8)
5231		v0 := b.NewValue0(v.Pos, Op386LEAL4, v.Type)
5232		v0.AddArg2(x, x)
5233		v.AddArg2(x, v0)
5234		return true
5235	}
5236	// match: (MULLconst [45] x)
5237	// result: (LEAL8 (LEAL4 <v.Type> x x) (LEAL4 <v.Type> x x))
5238	for {
5239		if auxIntToInt32(v.AuxInt) != 45 {
5240			break
5241		}
5242		x := v_0
5243		v.reset(Op386LEAL8)
5244		v0 := b.NewValue0(v.Pos, Op386LEAL4, v.Type)
5245		v0.AddArg2(x, x)
5246		v.AddArg2(v0, v0)
5247		return true
5248	}
5249	// match: (MULLconst [73] x)
5250	// result: (LEAL8 x (LEAL8 <v.Type> x x))
5251	for {
5252		if auxIntToInt32(v.AuxInt) != 73 {
5253			break
5254		}
5255		x := v_0
5256		v.reset(Op386LEAL8)
5257		v0 := b.NewValue0(v.Pos, Op386LEAL8, v.Type)
5258		v0.AddArg2(x, x)
5259		v.AddArg2(x, v0)
5260		return true
5261	}
5262	// match: (MULLconst [81] x)
5263	// result: (LEAL8 (LEAL8 <v.Type> x x) (LEAL8 <v.Type> x x))
5264	for {
5265		if auxIntToInt32(v.AuxInt) != 81 {
5266			break
5267		}
5268		x := v_0
5269		v.reset(Op386LEAL8)
5270		v0 := b.NewValue0(v.Pos, Op386LEAL8, v.Type)
5271		v0.AddArg2(x, x)
5272		v.AddArg2(v0, v0)
5273		return true
5274	}
5275	// match: (MULLconst [c] x)
5276	// cond: isPowerOfTwo32(c+1) && c >= 15
5277	// result: (SUBL (SHLLconst <v.Type> [int32(log32(c+1))] x) x)
5278	for {
5279		c := auxIntToInt32(v.AuxInt)
5280		x := v_0
5281		if !(isPowerOfTwo32(c+1) && c >= 15) {
5282			break
5283		}
5284		v.reset(Op386SUBL)
5285		v0 := b.NewValue0(v.Pos, Op386SHLLconst, v.Type)
5286		v0.AuxInt = int32ToAuxInt(int32(log32(c + 1)))
5287		v0.AddArg(x)
5288		v.AddArg2(v0, x)
5289		return true
5290	}
5291	// match: (MULLconst [c] x)
5292	// cond: isPowerOfTwo32(c-1) && c >= 17
5293	// result: (LEAL1 (SHLLconst <v.Type> [int32(log32(c-1))] x) x)
5294	for {
5295		c := auxIntToInt32(v.AuxInt)
5296		x := v_0
5297		if !(isPowerOfTwo32(c-1) && c >= 17) {
5298			break
5299		}
5300		v.reset(Op386LEAL1)
5301		v0 := b.NewValue0(v.Pos, Op386SHLLconst, v.Type)
5302		v0.AuxInt = int32ToAuxInt(int32(log32(c - 1)))
5303		v0.AddArg(x)
5304		v.AddArg2(v0, x)
5305		return true
5306	}
5307	// match: (MULLconst [c] x)
5308	// cond: isPowerOfTwo32(c-2) && c >= 34
5309	// result: (LEAL2 (SHLLconst <v.Type> [int32(log32(c-2))] x) x)
5310	for {
5311		c := auxIntToInt32(v.AuxInt)
5312		x := v_0
5313		if !(isPowerOfTwo32(c-2) && c >= 34) {
5314			break
5315		}
5316		v.reset(Op386LEAL2)
5317		v0 := b.NewValue0(v.Pos, Op386SHLLconst, v.Type)
5318		v0.AuxInt = int32ToAuxInt(int32(log32(c - 2)))
5319		v0.AddArg(x)
5320		v.AddArg2(v0, x)
5321		return true
5322	}
5323	// match: (MULLconst [c] x)
5324	// cond: isPowerOfTwo32(c-4) && c >= 68
5325	// result: (LEAL4 (SHLLconst <v.Type> [int32(log32(c-4))] x) x)
5326	for {
5327		c := auxIntToInt32(v.AuxInt)
5328		x := v_0
5329		if !(isPowerOfTwo32(c-4) && c >= 68) {
5330			break
5331		}
5332		v.reset(Op386LEAL4)
5333		v0 := b.NewValue0(v.Pos, Op386SHLLconst, v.Type)
5334		v0.AuxInt = int32ToAuxInt(int32(log32(c - 4)))
5335		v0.AddArg(x)
5336		v.AddArg2(v0, x)
5337		return true
5338	}
5339	// match: (MULLconst [c] x)
5340	// cond: isPowerOfTwo32(c-8) && c >= 136
5341	// result: (LEAL8 (SHLLconst <v.Type> [int32(log32(c-8))] x) x)
5342	for {
5343		c := auxIntToInt32(v.AuxInt)
5344		x := v_0
5345		if !(isPowerOfTwo32(c-8) && c >= 136) {
5346			break
5347		}
5348		v.reset(Op386LEAL8)
5349		v0 := b.NewValue0(v.Pos, Op386SHLLconst, v.Type)
5350		v0.AuxInt = int32ToAuxInt(int32(log32(c - 8)))
5351		v0.AddArg(x)
5352		v.AddArg2(v0, x)
5353		return true
5354	}
5355	// match: (MULLconst [c] x)
5356	// cond: c%3 == 0 && isPowerOfTwo32(c/3)
5357	// result: (SHLLconst [int32(log32(c/3))] (LEAL2 <v.Type> x x))
5358	for {
5359		c := auxIntToInt32(v.AuxInt)
5360		x := v_0
5361		if !(c%3 == 0 && isPowerOfTwo32(c/3)) {
5362			break
5363		}
5364		v.reset(Op386SHLLconst)
5365		v.AuxInt = int32ToAuxInt(int32(log32(c / 3)))
5366		v0 := b.NewValue0(v.Pos, Op386LEAL2, v.Type)
5367		v0.AddArg2(x, x)
5368		v.AddArg(v0)
5369		return true
5370	}
5371	// match: (MULLconst [c] x)
5372	// cond: c%5 == 0 && isPowerOfTwo32(c/5)
5373	// result: (SHLLconst [int32(log32(c/5))] (LEAL4 <v.Type> x x))
5374	for {
5375		c := auxIntToInt32(v.AuxInt)
5376		x := v_0
5377		if !(c%5 == 0 && isPowerOfTwo32(c/5)) {
5378			break
5379		}
5380		v.reset(Op386SHLLconst)
5381		v.AuxInt = int32ToAuxInt(int32(log32(c / 5)))
5382		v0 := b.NewValue0(v.Pos, Op386LEAL4, v.Type)
5383		v0.AddArg2(x, x)
5384		v.AddArg(v0)
5385		return true
5386	}
5387	// match: (MULLconst [c] x)
5388	// cond: c%9 == 0 && isPowerOfTwo32(c/9)
5389	// result: (SHLLconst [int32(log32(c/9))] (LEAL8 <v.Type> x x))
5390	for {
5391		c := auxIntToInt32(v.AuxInt)
5392		x := v_0
5393		if !(c%9 == 0 && isPowerOfTwo32(c/9)) {
5394			break
5395		}
5396		v.reset(Op386SHLLconst)
5397		v.AuxInt = int32ToAuxInt(int32(log32(c / 9)))
5398		v0 := b.NewValue0(v.Pos, Op386LEAL8, v.Type)
5399		v0.AddArg2(x, x)
5400		v.AddArg(v0)
5401		return true
5402	}
5403	// match: (MULLconst [c] (MOVLconst [d]))
5404	// result: (MOVLconst [c*d])
5405	for {
5406		c := auxIntToInt32(v.AuxInt)
5407		if v_0.Op != Op386MOVLconst {
5408			break
5409		}
5410		d := auxIntToInt32(v_0.AuxInt)
5411		v.reset(Op386MOVLconst)
5412		v.AuxInt = int32ToAuxInt(c * d)
5413		return true
5414	}
5415	return false
5416}
5417func rewriteValue386_Op386MULLload(v *Value) bool {
5418	v_2 := v.Args[2]
5419	v_1 := v.Args[1]
5420	v_0 := v.Args[0]
5421	b := v.Block
5422	config := b.Func.Config
5423	// match: (MULLload [off1] {sym} val (ADDLconst [off2] base) mem)
5424	// cond: is32Bit(int64(off1)+int64(off2))
5425	// result: (MULLload [off1+off2] {sym} val base mem)
5426	for {
5427		off1 := auxIntToInt32(v.AuxInt)
5428		sym := auxToSym(v.Aux)
5429		val := v_0
5430		if v_1.Op != Op386ADDLconst {
5431			break
5432		}
5433		off2 := auxIntToInt32(v_1.AuxInt)
5434		base := v_1.Args[0]
5435		mem := v_2
5436		if !(is32Bit(int64(off1) + int64(off2))) {
5437			break
5438		}
5439		v.reset(Op386MULLload)
5440		v.AuxInt = int32ToAuxInt(off1 + off2)
5441		v.Aux = symToAux(sym)
5442		v.AddArg3(val, base, mem)
5443		return true
5444	}
5445	// match: (MULLload [off1] {sym1} val (LEAL [off2] {sym2} base) mem)
5446	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
5447	// result: (MULLload [off1+off2] {mergeSym(sym1,sym2)} val base mem)
5448	for {
5449		off1 := auxIntToInt32(v.AuxInt)
5450		sym1 := auxToSym(v.Aux)
5451		val := v_0
5452		if v_1.Op != Op386LEAL {
5453			break
5454		}
5455		off2 := auxIntToInt32(v_1.AuxInt)
5456		sym2 := auxToSym(v_1.Aux)
5457		base := v_1.Args[0]
5458		mem := v_2
5459		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
5460			break
5461		}
5462		v.reset(Op386MULLload)
5463		v.AuxInt = int32ToAuxInt(off1 + off2)
5464		v.Aux = symToAux(mergeSym(sym1, sym2))
5465		v.AddArg3(val, base, mem)
5466		return true
5467	}
5468	return false
5469}
5470func rewriteValue386_Op386MULSD(v *Value) bool {
5471	v_1 := v.Args[1]
5472	v_0 := v.Args[0]
5473	// match: (MULSD x l:(MOVSDload [off] {sym} ptr mem))
5474	// cond: canMergeLoadClobber(v, l, x) && clobber(l)
5475	// result: (MULSDload x [off] {sym} ptr mem)
5476	for {
5477		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
5478			x := v_0
5479			l := v_1
5480			if l.Op != Op386MOVSDload {
5481				continue
5482			}
5483			off := auxIntToInt32(l.AuxInt)
5484			sym := auxToSym(l.Aux)
5485			mem := l.Args[1]
5486			ptr := l.Args[0]
5487			if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
5488				continue
5489			}
5490			v.reset(Op386MULSDload)
5491			v.AuxInt = int32ToAuxInt(off)
5492			v.Aux = symToAux(sym)
5493			v.AddArg3(x, ptr, mem)
5494			return true
5495		}
5496		break
5497	}
5498	return false
5499}
5500func rewriteValue386_Op386MULSDload(v *Value) bool {
5501	v_2 := v.Args[2]
5502	v_1 := v.Args[1]
5503	v_0 := v.Args[0]
5504	b := v.Block
5505	config := b.Func.Config
5506	// match: (MULSDload [off1] {sym} val (ADDLconst [off2] base) mem)
5507	// cond: is32Bit(int64(off1)+int64(off2))
5508	// result: (MULSDload [off1+off2] {sym} val base mem)
5509	for {
5510		off1 := auxIntToInt32(v.AuxInt)
5511		sym := auxToSym(v.Aux)
5512		val := v_0
5513		if v_1.Op != Op386ADDLconst {
5514			break
5515		}
5516		off2 := auxIntToInt32(v_1.AuxInt)
5517		base := v_1.Args[0]
5518		mem := v_2
5519		if !(is32Bit(int64(off1) + int64(off2))) {
5520			break
5521		}
5522		v.reset(Op386MULSDload)
5523		v.AuxInt = int32ToAuxInt(off1 + off2)
5524		v.Aux = symToAux(sym)
5525		v.AddArg3(val, base, mem)
5526		return true
5527	}
5528	// match: (MULSDload [off1] {sym1} val (LEAL [off2] {sym2} base) mem)
5529	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
5530	// result: (MULSDload [off1+off2] {mergeSym(sym1,sym2)} val base mem)
5531	for {
5532		off1 := auxIntToInt32(v.AuxInt)
5533		sym1 := auxToSym(v.Aux)
5534		val := v_0
5535		if v_1.Op != Op386LEAL {
5536			break
5537		}
5538		off2 := auxIntToInt32(v_1.AuxInt)
5539		sym2 := auxToSym(v_1.Aux)
5540		base := v_1.Args[0]
5541		mem := v_2
5542		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
5543			break
5544		}
5545		v.reset(Op386MULSDload)
5546		v.AuxInt = int32ToAuxInt(off1 + off2)
5547		v.Aux = symToAux(mergeSym(sym1, sym2))
5548		v.AddArg3(val, base, mem)
5549		return true
5550	}
5551	return false
5552}
5553func rewriteValue386_Op386MULSS(v *Value) bool {
5554	v_1 := v.Args[1]
5555	v_0 := v.Args[0]
5556	// match: (MULSS x l:(MOVSSload [off] {sym} ptr mem))
5557	// cond: canMergeLoadClobber(v, l, x) && clobber(l)
5558	// result: (MULSSload x [off] {sym} ptr mem)
5559	for {
5560		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
5561			x := v_0
5562			l := v_1
5563			if l.Op != Op386MOVSSload {
5564				continue
5565			}
5566			off := auxIntToInt32(l.AuxInt)
5567			sym := auxToSym(l.Aux)
5568			mem := l.Args[1]
5569			ptr := l.Args[0]
5570			if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
5571				continue
5572			}
5573			v.reset(Op386MULSSload)
5574			v.AuxInt = int32ToAuxInt(off)
5575			v.Aux = symToAux(sym)
5576			v.AddArg3(x, ptr, mem)
5577			return true
5578		}
5579		break
5580	}
5581	return false
5582}
5583func rewriteValue386_Op386MULSSload(v *Value) bool {
5584	v_2 := v.Args[2]
5585	v_1 := v.Args[1]
5586	v_0 := v.Args[0]
5587	b := v.Block
5588	config := b.Func.Config
5589	// match: (MULSSload [off1] {sym} val (ADDLconst [off2] base) mem)
5590	// cond: is32Bit(int64(off1)+int64(off2))
5591	// result: (MULSSload [off1+off2] {sym} val base mem)
5592	for {
5593		off1 := auxIntToInt32(v.AuxInt)
5594		sym := auxToSym(v.Aux)
5595		val := v_0
5596		if v_1.Op != Op386ADDLconst {
5597			break
5598		}
5599		off2 := auxIntToInt32(v_1.AuxInt)
5600		base := v_1.Args[0]
5601		mem := v_2
5602		if !(is32Bit(int64(off1) + int64(off2))) {
5603			break
5604		}
5605		v.reset(Op386MULSSload)
5606		v.AuxInt = int32ToAuxInt(off1 + off2)
5607		v.Aux = symToAux(sym)
5608		v.AddArg3(val, base, mem)
5609		return true
5610	}
5611	// match: (MULSSload [off1] {sym1} val (LEAL [off2] {sym2} base) mem)
5612	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
5613	// result: (MULSSload [off1+off2] {mergeSym(sym1,sym2)} val base mem)
5614	for {
5615		off1 := auxIntToInt32(v.AuxInt)
5616		sym1 := auxToSym(v.Aux)
5617		val := v_0
5618		if v_1.Op != Op386LEAL {
5619			break
5620		}
5621		off2 := auxIntToInt32(v_1.AuxInt)
5622		sym2 := auxToSym(v_1.Aux)
5623		base := v_1.Args[0]
5624		mem := v_2
5625		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
5626			break
5627		}
5628		v.reset(Op386MULSSload)
5629		v.AuxInt = int32ToAuxInt(off1 + off2)
5630		v.Aux = symToAux(mergeSym(sym1, sym2))
5631		v.AddArg3(val, base, mem)
5632		return true
5633	}
5634	return false
5635}
5636func rewriteValue386_Op386NEGL(v *Value) bool {
5637	v_0 := v.Args[0]
5638	// match: (NEGL (MOVLconst [c]))
5639	// result: (MOVLconst [-c])
5640	for {
5641		if v_0.Op != Op386MOVLconst {
5642			break
5643		}
5644		c := auxIntToInt32(v_0.AuxInt)
5645		v.reset(Op386MOVLconst)
5646		v.AuxInt = int32ToAuxInt(-c)
5647		return true
5648	}
5649	return false
5650}
5651func rewriteValue386_Op386NOTL(v *Value) bool {
5652	v_0 := v.Args[0]
5653	// match: (NOTL (MOVLconst [c]))
5654	// result: (MOVLconst [^c])
5655	for {
5656		if v_0.Op != Op386MOVLconst {
5657			break
5658		}
5659		c := auxIntToInt32(v_0.AuxInt)
5660		v.reset(Op386MOVLconst)
5661		v.AuxInt = int32ToAuxInt(^c)
5662		return true
5663	}
5664	return false
5665}
5666func rewriteValue386_Op386ORL(v *Value) bool {
5667	v_1 := v.Args[1]
5668	v_0 := v.Args[0]
5669	// match: (ORL x (MOVLconst [c]))
5670	// result: (ORLconst [c] x)
5671	for {
5672		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
5673			x := v_0
5674			if v_1.Op != Op386MOVLconst {
5675				continue
5676			}
5677			c := auxIntToInt32(v_1.AuxInt)
5678			v.reset(Op386ORLconst)
5679			v.AuxInt = int32ToAuxInt(c)
5680			v.AddArg(x)
5681			return true
5682		}
5683		break
5684	}
5685	// match: (ORL x l:(MOVLload [off] {sym} ptr mem))
5686	// cond: canMergeLoadClobber(v, l, x) && clobber(l)
5687	// result: (ORLload x [off] {sym} ptr mem)
5688	for {
5689		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
5690			x := v_0
5691			l := v_1
5692			if l.Op != Op386MOVLload {
5693				continue
5694			}
5695			off := auxIntToInt32(l.AuxInt)
5696			sym := auxToSym(l.Aux)
5697			mem := l.Args[1]
5698			ptr := l.Args[0]
5699			if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
5700				continue
5701			}
5702			v.reset(Op386ORLload)
5703			v.AuxInt = int32ToAuxInt(off)
5704			v.Aux = symToAux(sym)
5705			v.AddArg3(x, ptr, mem)
5706			return true
5707		}
5708		break
5709	}
5710	// match: (ORL x x)
5711	// result: x
5712	for {
5713		x := v_0
5714		if x != v_1 {
5715			break
5716		}
5717		v.copyOf(x)
5718		return true
5719	}
5720	return false
5721}
5722func rewriteValue386_Op386ORLconst(v *Value) bool {
5723	v_0 := v.Args[0]
5724	// match: (ORLconst [c] x)
5725	// cond: c==0
5726	// result: x
5727	for {
5728		c := auxIntToInt32(v.AuxInt)
5729		x := v_0
5730		if !(c == 0) {
5731			break
5732		}
5733		v.copyOf(x)
5734		return true
5735	}
5736	// match: (ORLconst [c] _)
5737	// cond: c==-1
5738	// result: (MOVLconst [-1])
5739	for {
5740		c := auxIntToInt32(v.AuxInt)
5741		if !(c == -1) {
5742			break
5743		}
5744		v.reset(Op386MOVLconst)
5745		v.AuxInt = int32ToAuxInt(-1)
5746		return true
5747	}
5748	// match: (ORLconst [c] (MOVLconst [d]))
5749	// result: (MOVLconst [c|d])
5750	for {
5751		c := auxIntToInt32(v.AuxInt)
5752		if v_0.Op != Op386MOVLconst {
5753			break
5754		}
5755		d := auxIntToInt32(v_0.AuxInt)
5756		v.reset(Op386MOVLconst)
5757		v.AuxInt = int32ToAuxInt(c | d)
5758		return true
5759	}
5760	return false
5761}
5762func rewriteValue386_Op386ORLconstmodify(v *Value) bool {
5763	v_1 := v.Args[1]
5764	v_0 := v.Args[0]
5765	b := v.Block
5766	config := b.Func.Config
5767	// match: (ORLconstmodify [valoff1] {sym} (ADDLconst [off2] base) mem)
5768	// cond: valoff1.canAdd32(off2)
5769	// result: (ORLconstmodify [valoff1.addOffset32(off2)] {sym} base mem)
5770	for {
5771		valoff1 := auxIntToValAndOff(v.AuxInt)
5772		sym := auxToSym(v.Aux)
5773		if v_0.Op != Op386ADDLconst {
5774			break
5775		}
5776		off2 := auxIntToInt32(v_0.AuxInt)
5777		base := v_0.Args[0]
5778		mem := v_1
5779		if !(valoff1.canAdd32(off2)) {
5780			break
5781		}
5782		v.reset(Op386ORLconstmodify)
5783		v.AuxInt = valAndOffToAuxInt(valoff1.addOffset32(off2))
5784		v.Aux = symToAux(sym)
5785		v.AddArg2(base, mem)
5786		return true
5787	}
5788	// match: (ORLconstmodify [valoff1] {sym1} (LEAL [off2] {sym2} base) mem)
5789	// cond: valoff1.canAdd32(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
5790	// result: (ORLconstmodify [valoff1.addOffset32(off2)] {mergeSym(sym1,sym2)} base mem)
5791	for {
5792		valoff1 := auxIntToValAndOff(v.AuxInt)
5793		sym1 := auxToSym(v.Aux)
5794		if v_0.Op != Op386LEAL {
5795			break
5796		}
5797		off2 := auxIntToInt32(v_0.AuxInt)
5798		sym2 := auxToSym(v_0.Aux)
5799		base := v_0.Args[0]
5800		mem := v_1
5801		if !(valoff1.canAdd32(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
5802			break
5803		}
5804		v.reset(Op386ORLconstmodify)
5805		v.AuxInt = valAndOffToAuxInt(valoff1.addOffset32(off2))
5806		v.Aux = symToAux(mergeSym(sym1, sym2))
5807		v.AddArg2(base, mem)
5808		return true
5809	}
5810	return false
5811}
5812func rewriteValue386_Op386ORLload(v *Value) bool {
5813	v_2 := v.Args[2]
5814	v_1 := v.Args[1]
5815	v_0 := v.Args[0]
5816	b := v.Block
5817	config := b.Func.Config
5818	// match: (ORLload [off1] {sym} val (ADDLconst [off2] base) mem)
5819	// cond: is32Bit(int64(off1)+int64(off2))
5820	// result: (ORLload [off1+off2] {sym} val base mem)
5821	for {
5822		off1 := auxIntToInt32(v.AuxInt)
5823		sym := auxToSym(v.Aux)
5824		val := v_0
5825		if v_1.Op != Op386ADDLconst {
5826			break
5827		}
5828		off2 := auxIntToInt32(v_1.AuxInt)
5829		base := v_1.Args[0]
5830		mem := v_2
5831		if !(is32Bit(int64(off1) + int64(off2))) {
5832			break
5833		}
5834		v.reset(Op386ORLload)
5835		v.AuxInt = int32ToAuxInt(off1 + off2)
5836		v.Aux = symToAux(sym)
5837		v.AddArg3(val, base, mem)
5838		return true
5839	}
5840	// match: (ORLload [off1] {sym1} val (LEAL [off2] {sym2} base) mem)
5841	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
5842	// result: (ORLload [off1+off2] {mergeSym(sym1,sym2)} val base mem)
5843	for {
5844		off1 := auxIntToInt32(v.AuxInt)
5845		sym1 := auxToSym(v.Aux)
5846		val := v_0
5847		if v_1.Op != Op386LEAL {
5848			break
5849		}
5850		off2 := auxIntToInt32(v_1.AuxInt)
5851		sym2 := auxToSym(v_1.Aux)
5852		base := v_1.Args[0]
5853		mem := v_2
5854		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
5855			break
5856		}
5857		v.reset(Op386ORLload)
5858		v.AuxInt = int32ToAuxInt(off1 + off2)
5859		v.Aux = symToAux(mergeSym(sym1, sym2))
5860		v.AddArg3(val, base, mem)
5861		return true
5862	}
5863	return false
5864}
5865func rewriteValue386_Op386ORLmodify(v *Value) bool {
5866	v_2 := v.Args[2]
5867	v_1 := v.Args[1]
5868	v_0 := v.Args[0]
5869	b := v.Block
5870	config := b.Func.Config
5871	// match: (ORLmodify [off1] {sym} (ADDLconst [off2] base) val mem)
5872	// cond: is32Bit(int64(off1)+int64(off2))
5873	// result: (ORLmodify [off1+off2] {sym} base val mem)
5874	for {
5875		off1 := auxIntToInt32(v.AuxInt)
5876		sym := auxToSym(v.Aux)
5877		if v_0.Op != Op386ADDLconst {
5878			break
5879		}
5880		off2 := auxIntToInt32(v_0.AuxInt)
5881		base := v_0.Args[0]
5882		val := v_1
5883		mem := v_2
5884		if !(is32Bit(int64(off1) + int64(off2))) {
5885			break
5886		}
5887		v.reset(Op386ORLmodify)
5888		v.AuxInt = int32ToAuxInt(off1 + off2)
5889		v.Aux = symToAux(sym)
5890		v.AddArg3(base, val, mem)
5891		return true
5892	}
5893	// match: (ORLmodify [off1] {sym1} (LEAL [off2] {sym2} base) val mem)
5894	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
5895	// result: (ORLmodify [off1+off2] {mergeSym(sym1,sym2)} base val mem)
5896	for {
5897		off1 := auxIntToInt32(v.AuxInt)
5898		sym1 := auxToSym(v.Aux)
5899		if v_0.Op != Op386LEAL {
5900			break
5901		}
5902		off2 := auxIntToInt32(v_0.AuxInt)
5903		sym2 := auxToSym(v_0.Aux)
5904		base := v_0.Args[0]
5905		val := v_1
5906		mem := v_2
5907		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
5908			break
5909		}
5910		v.reset(Op386ORLmodify)
5911		v.AuxInt = int32ToAuxInt(off1 + off2)
5912		v.Aux = symToAux(mergeSym(sym1, sym2))
5913		v.AddArg3(base, val, mem)
5914		return true
5915	}
5916	return false
5917}
5918func rewriteValue386_Op386ROLB(v *Value) bool {
5919	v_1 := v.Args[1]
5920	v_0 := v.Args[0]
5921	// match: (ROLB x (MOVLconst [c]))
5922	// result: (ROLBconst [int8(c&7)] x)
5923	for {
5924		x := v_0
5925		if v_1.Op != Op386MOVLconst {
5926			break
5927		}
5928		c := auxIntToInt32(v_1.AuxInt)
5929		v.reset(Op386ROLBconst)
5930		v.AuxInt = int8ToAuxInt(int8(c & 7))
5931		v.AddArg(x)
5932		return true
5933	}
5934	return false
5935}
5936func rewriteValue386_Op386ROLBconst(v *Value) bool {
5937	v_0 := v.Args[0]
5938	// match: (ROLBconst [0] x)
5939	// result: x
5940	for {
5941		if auxIntToInt8(v.AuxInt) != 0 {
5942			break
5943		}
5944		x := v_0
5945		v.copyOf(x)
5946		return true
5947	}
5948	return false
5949}
5950func rewriteValue386_Op386ROLL(v *Value) bool {
5951	v_1 := v.Args[1]
5952	v_0 := v.Args[0]
5953	// match: (ROLL x (MOVLconst [c]))
5954	// result: (ROLLconst [c&31] x)
5955	for {
5956		x := v_0
5957		if v_1.Op != Op386MOVLconst {
5958			break
5959		}
5960		c := auxIntToInt32(v_1.AuxInt)
5961		v.reset(Op386ROLLconst)
5962		v.AuxInt = int32ToAuxInt(c & 31)
5963		v.AddArg(x)
5964		return true
5965	}
5966	return false
5967}
5968func rewriteValue386_Op386ROLLconst(v *Value) bool {
5969	v_0 := v.Args[0]
5970	// match: (ROLLconst [0] x)
5971	// result: x
5972	for {
5973		if auxIntToInt32(v.AuxInt) != 0 {
5974			break
5975		}
5976		x := v_0
5977		v.copyOf(x)
5978		return true
5979	}
5980	return false
5981}
5982func rewriteValue386_Op386ROLW(v *Value) bool {
5983	v_1 := v.Args[1]
5984	v_0 := v.Args[0]
5985	// match: (ROLW x (MOVLconst [c]))
5986	// result: (ROLWconst [int16(c&15)] x)
5987	for {
5988		x := v_0
5989		if v_1.Op != Op386MOVLconst {
5990			break
5991		}
5992		c := auxIntToInt32(v_1.AuxInt)
5993		v.reset(Op386ROLWconst)
5994		v.AuxInt = int16ToAuxInt(int16(c & 15))
5995		v.AddArg(x)
5996		return true
5997	}
5998	return false
5999}
6000func rewriteValue386_Op386ROLWconst(v *Value) bool {
6001	v_0 := v.Args[0]
6002	// match: (ROLWconst [0] x)
6003	// result: x
6004	for {
6005		if auxIntToInt16(v.AuxInt) != 0 {
6006			break
6007		}
6008		x := v_0
6009		v.copyOf(x)
6010		return true
6011	}
6012	return false
6013}
6014func rewriteValue386_Op386SARB(v *Value) bool {
6015	v_1 := v.Args[1]
6016	v_0 := v.Args[0]
6017	// match: (SARB x (MOVLconst [c]))
6018	// result: (SARBconst [int8(min(int64(c&31),7))] x)
6019	for {
6020		x := v_0
6021		if v_1.Op != Op386MOVLconst {
6022			break
6023		}
6024		c := auxIntToInt32(v_1.AuxInt)
6025		v.reset(Op386SARBconst)
6026		v.AuxInt = int8ToAuxInt(int8(min(int64(c&31), 7)))
6027		v.AddArg(x)
6028		return true
6029	}
6030	return false
6031}
6032func rewriteValue386_Op386SARBconst(v *Value) bool {
6033	v_0 := v.Args[0]
6034	// match: (SARBconst x [0])
6035	// result: x
6036	for {
6037		if auxIntToInt8(v.AuxInt) != 0 {
6038			break
6039		}
6040		x := v_0
6041		v.copyOf(x)
6042		return true
6043	}
6044	// match: (SARBconst [c] (MOVLconst [d]))
6045	// result: (MOVLconst [d>>uint64(c)])
6046	for {
6047		c := auxIntToInt8(v.AuxInt)
6048		if v_0.Op != Op386MOVLconst {
6049			break
6050		}
6051		d := auxIntToInt32(v_0.AuxInt)
6052		v.reset(Op386MOVLconst)
6053		v.AuxInt = int32ToAuxInt(d >> uint64(c))
6054		return true
6055	}
6056	return false
6057}
6058func rewriteValue386_Op386SARL(v *Value) bool {
6059	v_1 := v.Args[1]
6060	v_0 := v.Args[0]
6061	// match: (SARL x (MOVLconst [c]))
6062	// result: (SARLconst [c&31] x)
6063	for {
6064		x := v_0
6065		if v_1.Op != Op386MOVLconst {
6066			break
6067		}
6068		c := auxIntToInt32(v_1.AuxInt)
6069		v.reset(Op386SARLconst)
6070		v.AuxInt = int32ToAuxInt(c & 31)
6071		v.AddArg(x)
6072		return true
6073	}
6074	// match: (SARL x (ANDLconst [31] y))
6075	// result: (SARL x y)
6076	for {
6077		x := v_0
6078		if v_1.Op != Op386ANDLconst || auxIntToInt32(v_1.AuxInt) != 31 {
6079			break
6080		}
6081		y := v_1.Args[0]
6082		v.reset(Op386SARL)
6083		v.AddArg2(x, y)
6084		return true
6085	}
6086	return false
6087}
6088func rewriteValue386_Op386SARLconst(v *Value) bool {
6089	v_0 := v.Args[0]
6090	// match: (SARLconst x [0])
6091	// result: x
6092	for {
6093		if auxIntToInt32(v.AuxInt) != 0 {
6094			break
6095		}
6096		x := v_0
6097		v.copyOf(x)
6098		return true
6099	}
6100	// match: (SARLconst [c] (MOVLconst [d]))
6101	// result: (MOVLconst [d>>uint64(c)])
6102	for {
6103		c := auxIntToInt32(v.AuxInt)
6104		if v_0.Op != Op386MOVLconst {
6105			break
6106		}
6107		d := auxIntToInt32(v_0.AuxInt)
6108		v.reset(Op386MOVLconst)
6109		v.AuxInt = int32ToAuxInt(d >> uint64(c))
6110		return true
6111	}
6112	return false
6113}
6114func rewriteValue386_Op386SARW(v *Value) bool {
6115	v_1 := v.Args[1]
6116	v_0 := v.Args[0]
6117	// match: (SARW x (MOVLconst [c]))
6118	// result: (SARWconst [int16(min(int64(c&31),15))] x)
6119	for {
6120		x := v_0
6121		if v_1.Op != Op386MOVLconst {
6122			break
6123		}
6124		c := auxIntToInt32(v_1.AuxInt)
6125		v.reset(Op386SARWconst)
6126		v.AuxInt = int16ToAuxInt(int16(min(int64(c&31), 15)))
6127		v.AddArg(x)
6128		return true
6129	}
6130	return false
6131}
6132func rewriteValue386_Op386SARWconst(v *Value) bool {
6133	v_0 := v.Args[0]
6134	// match: (SARWconst x [0])
6135	// result: x
6136	for {
6137		if auxIntToInt16(v.AuxInt) != 0 {
6138			break
6139		}
6140		x := v_0
6141		v.copyOf(x)
6142		return true
6143	}
6144	// match: (SARWconst [c] (MOVLconst [d]))
6145	// result: (MOVLconst [d>>uint64(c)])
6146	for {
6147		c := auxIntToInt16(v.AuxInt)
6148		if v_0.Op != Op386MOVLconst {
6149			break
6150		}
6151		d := auxIntToInt32(v_0.AuxInt)
6152		v.reset(Op386MOVLconst)
6153		v.AuxInt = int32ToAuxInt(d >> uint64(c))
6154		return true
6155	}
6156	return false
6157}
6158func rewriteValue386_Op386SBBL(v *Value) bool {
6159	v_2 := v.Args[2]
6160	v_1 := v.Args[1]
6161	v_0 := v.Args[0]
6162	// match: (SBBL x (MOVLconst [c]) f)
6163	// result: (SBBLconst [c] x f)
6164	for {
6165		x := v_0
6166		if v_1.Op != Op386MOVLconst {
6167			break
6168		}
6169		c := auxIntToInt32(v_1.AuxInt)
6170		f := v_2
6171		v.reset(Op386SBBLconst)
6172		v.AuxInt = int32ToAuxInt(c)
6173		v.AddArg2(x, f)
6174		return true
6175	}
6176	return false
6177}
6178func rewriteValue386_Op386SBBLcarrymask(v *Value) bool {
6179	v_0 := v.Args[0]
6180	// match: (SBBLcarrymask (FlagEQ))
6181	// result: (MOVLconst [0])
6182	for {
6183		if v_0.Op != Op386FlagEQ {
6184			break
6185		}
6186		v.reset(Op386MOVLconst)
6187		v.AuxInt = int32ToAuxInt(0)
6188		return true
6189	}
6190	// match: (SBBLcarrymask (FlagLT_ULT))
6191	// result: (MOVLconst [-1])
6192	for {
6193		if v_0.Op != Op386FlagLT_ULT {
6194			break
6195		}
6196		v.reset(Op386MOVLconst)
6197		v.AuxInt = int32ToAuxInt(-1)
6198		return true
6199	}
6200	// match: (SBBLcarrymask (FlagLT_UGT))
6201	// result: (MOVLconst [0])
6202	for {
6203		if v_0.Op != Op386FlagLT_UGT {
6204			break
6205		}
6206		v.reset(Op386MOVLconst)
6207		v.AuxInt = int32ToAuxInt(0)
6208		return true
6209	}
6210	// match: (SBBLcarrymask (FlagGT_ULT))
6211	// result: (MOVLconst [-1])
6212	for {
6213		if v_0.Op != Op386FlagGT_ULT {
6214			break
6215		}
6216		v.reset(Op386MOVLconst)
6217		v.AuxInt = int32ToAuxInt(-1)
6218		return true
6219	}
6220	// match: (SBBLcarrymask (FlagGT_UGT))
6221	// result: (MOVLconst [0])
6222	for {
6223		if v_0.Op != Op386FlagGT_UGT {
6224			break
6225		}
6226		v.reset(Op386MOVLconst)
6227		v.AuxInt = int32ToAuxInt(0)
6228		return true
6229	}
6230	return false
6231}
6232func rewriteValue386_Op386SETA(v *Value) bool {
6233	v_0 := v.Args[0]
6234	// match: (SETA (InvertFlags x))
6235	// result: (SETB x)
6236	for {
6237		if v_0.Op != Op386InvertFlags {
6238			break
6239		}
6240		x := v_0.Args[0]
6241		v.reset(Op386SETB)
6242		v.AddArg(x)
6243		return true
6244	}
6245	// match: (SETA (FlagEQ))
6246	// result: (MOVLconst [0])
6247	for {
6248		if v_0.Op != Op386FlagEQ {
6249			break
6250		}
6251		v.reset(Op386MOVLconst)
6252		v.AuxInt = int32ToAuxInt(0)
6253		return true
6254	}
6255	// match: (SETA (FlagLT_ULT))
6256	// result: (MOVLconst [0])
6257	for {
6258		if v_0.Op != Op386FlagLT_ULT {
6259			break
6260		}
6261		v.reset(Op386MOVLconst)
6262		v.AuxInt = int32ToAuxInt(0)
6263		return true
6264	}
6265	// match: (SETA (FlagLT_UGT))
6266	// result: (MOVLconst [1])
6267	for {
6268		if v_0.Op != Op386FlagLT_UGT {
6269			break
6270		}
6271		v.reset(Op386MOVLconst)
6272		v.AuxInt = int32ToAuxInt(1)
6273		return true
6274	}
6275	// match: (SETA (FlagGT_ULT))
6276	// result: (MOVLconst [0])
6277	for {
6278		if v_0.Op != Op386FlagGT_ULT {
6279			break
6280		}
6281		v.reset(Op386MOVLconst)
6282		v.AuxInt = int32ToAuxInt(0)
6283		return true
6284	}
6285	// match: (SETA (FlagGT_UGT))
6286	// result: (MOVLconst [1])
6287	for {
6288		if v_0.Op != Op386FlagGT_UGT {
6289			break
6290		}
6291		v.reset(Op386MOVLconst)
6292		v.AuxInt = int32ToAuxInt(1)
6293		return true
6294	}
6295	return false
6296}
6297func rewriteValue386_Op386SETAE(v *Value) bool {
6298	v_0 := v.Args[0]
6299	// match: (SETAE (InvertFlags x))
6300	// result: (SETBE x)
6301	for {
6302		if v_0.Op != Op386InvertFlags {
6303			break
6304		}
6305		x := v_0.Args[0]
6306		v.reset(Op386SETBE)
6307		v.AddArg(x)
6308		return true
6309	}
6310	// match: (SETAE (FlagEQ))
6311	// result: (MOVLconst [1])
6312	for {
6313		if v_0.Op != Op386FlagEQ {
6314			break
6315		}
6316		v.reset(Op386MOVLconst)
6317		v.AuxInt = int32ToAuxInt(1)
6318		return true
6319	}
6320	// match: (SETAE (FlagLT_ULT))
6321	// result: (MOVLconst [0])
6322	for {
6323		if v_0.Op != Op386FlagLT_ULT {
6324			break
6325		}
6326		v.reset(Op386MOVLconst)
6327		v.AuxInt = int32ToAuxInt(0)
6328		return true
6329	}
6330	// match: (SETAE (FlagLT_UGT))
6331	// result: (MOVLconst [1])
6332	for {
6333		if v_0.Op != Op386FlagLT_UGT {
6334			break
6335		}
6336		v.reset(Op386MOVLconst)
6337		v.AuxInt = int32ToAuxInt(1)
6338		return true
6339	}
6340	// match: (SETAE (FlagGT_ULT))
6341	// result: (MOVLconst [0])
6342	for {
6343		if v_0.Op != Op386FlagGT_ULT {
6344			break
6345		}
6346		v.reset(Op386MOVLconst)
6347		v.AuxInt = int32ToAuxInt(0)
6348		return true
6349	}
6350	// match: (SETAE (FlagGT_UGT))
6351	// result: (MOVLconst [1])
6352	for {
6353		if v_0.Op != Op386FlagGT_UGT {
6354			break
6355		}
6356		v.reset(Op386MOVLconst)
6357		v.AuxInt = int32ToAuxInt(1)
6358		return true
6359	}
6360	return false
6361}
6362func rewriteValue386_Op386SETB(v *Value) bool {
6363	v_0 := v.Args[0]
6364	// match: (SETB (InvertFlags x))
6365	// result: (SETA x)
6366	for {
6367		if v_0.Op != Op386InvertFlags {
6368			break
6369		}
6370		x := v_0.Args[0]
6371		v.reset(Op386SETA)
6372		v.AddArg(x)
6373		return true
6374	}
6375	// match: (SETB (FlagEQ))
6376	// result: (MOVLconst [0])
6377	for {
6378		if v_0.Op != Op386FlagEQ {
6379			break
6380		}
6381		v.reset(Op386MOVLconst)
6382		v.AuxInt = int32ToAuxInt(0)
6383		return true
6384	}
6385	// match: (SETB (FlagLT_ULT))
6386	// result: (MOVLconst [1])
6387	for {
6388		if v_0.Op != Op386FlagLT_ULT {
6389			break
6390		}
6391		v.reset(Op386MOVLconst)
6392		v.AuxInt = int32ToAuxInt(1)
6393		return true
6394	}
6395	// match: (SETB (FlagLT_UGT))
6396	// result: (MOVLconst [0])
6397	for {
6398		if v_0.Op != Op386FlagLT_UGT {
6399			break
6400		}
6401		v.reset(Op386MOVLconst)
6402		v.AuxInt = int32ToAuxInt(0)
6403		return true
6404	}
6405	// match: (SETB (FlagGT_ULT))
6406	// result: (MOVLconst [1])
6407	for {
6408		if v_0.Op != Op386FlagGT_ULT {
6409			break
6410		}
6411		v.reset(Op386MOVLconst)
6412		v.AuxInt = int32ToAuxInt(1)
6413		return true
6414	}
6415	// match: (SETB (FlagGT_UGT))
6416	// result: (MOVLconst [0])
6417	for {
6418		if v_0.Op != Op386FlagGT_UGT {
6419			break
6420		}
6421		v.reset(Op386MOVLconst)
6422		v.AuxInt = int32ToAuxInt(0)
6423		return true
6424	}
6425	return false
6426}
6427func rewriteValue386_Op386SETBE(v *Value) bool {
6428	v_0 := v.Args[0]
6429	// match: (SETBE (InvertFlags x))
6430	// result: (SETAE x)
6431	for {
6432		if v_0.Op != Op386InvertFlags {
6433			break
6434		}
6435		x := v_0.Args[0]
6436		v.reset(Op386SETAE)
6437		v.AddArg(x)
6438		return true
6439	}
6440	// match: (SETBE (FlagEQ))
6441	// result: (MOVLconst [1])
6442	for {
6443		if v_0.Op != Op386FlagEQ {
6444			break
6445		}
6446		v.reset(Op386MOVLconst)
6447		v.AuxInt = int32ToAuxInt(1)
6448		return true
6449	}
6450	// match: (SETBE (FlagLT_ULT))
6451	// result: (MOVLconst [1])
6452	for {
6453		if v_0.Op != Op386FlagLT_ULT {
6454			break
6455		}
6456		v.reset(Op386MOVLconst)
6457		v.AuxInt = int32ToAuxInt(1)
6458		return true
6459	}
6460	// match: (SETBE (FlagLT_UGT))
6461	// result: (MOVLconst [0])
6462	for {
6463		if v_0.Op != Op386FlagLT_UGT {
6464			break
6465		}
6466		v.reset(Op386MOVLconst)
6467		v.AuxInt = int32ToAuxInt(0)
6468		return true
6469	}
6470	// match: (SETBE (FlagGT_ULT))
6471	// result: (MOVLconst [1])
6472	for {
6473		if v_0.Op != Op386FlagGT_ULT {
6474			break
6475		}
6476		v.reset(Op386MOVLconst)
6477		v.AuxInt = int32ToAuxInt(1)
6478		return true
6479	}
6480	// match: (SETBE (FlagGT_UGT))
6481	// result: (MOVLconst [0])
6482	for {
6483		if v_0.Op != Op386FlagGT_UGT {
6484			break
6485		}
6486		v.reset(Op386MOVLconst)
6487		v.AuxInt = int32ToAuxInt(0)
6488		return true
6489	}
6490	return false
6491}
6492func rewriteValue386_Op386SETEQ(v *Value) bool {
6493	v_0 := v.Args[0]
6494	// match: (SETEQ (InvertFlags x))
6495	// result: (SETEQ x)
6496	for {
6497		if v_0.Op != Op386InvertFlags {
6498			break
6499		}
6500		x := v_0.Args[0]
6501		v.reset(Op386SETEQ)
6502		v.AddArg(x)
6503		return true
6504	}
6505	// match: (SETEQ (FlagEQ))
6506	// result: (MOVLconst [1])
6507	for {
6508		if v_0.Op != Op386FlagEQ {
6509			break
6510		}
6511		v.reset(Op386MOVLconst)
6512		v.AuxInt = int32ToAuxInt(1)
6513		return true
6514	}
6515	// match: (SETEQ (FlagLT_ULT))
6516	// result: (MOVLconst [0])
6517	for {
6518		if v_0.Op != Op386FlagLT_ULT {
6519			break
6520		}
6521		v.reset(Op386MOVLconst)
6522		v.AuxInt = int32ToAuxInt(0)
6523		return true
6524	}
6525	// match: (SETEQ (FlagLT_UGT))
6526	// result: (MOVLconst [0])
6527	for {
6528		if v_0.Op != Op386FlagLT_UGT {
6529			break
6530		}
6531		v.reset(Op386MOVLconst)
6532		v.AuxInt = int32ToAuxInt(0)
6533		return true
6534	}
6535	// match: (SETEQ (FlagGT_ULT))
6536	// result: (MOVLconst [0])
6537	for {
6538		if v_0.Op != Op386FlagGT_ULT {
6539			break
6540		}
6541		v.reset(Op386MOVLconst)
6542		v.AuxInt = int32ToAuxInt(0)
6543		return true
6544	}
6545	// match: (SETEQ (FlagGT_UGT))
6546	// result: (MOVLconst [0])
6547	for {
6548		if v_0.Op != Op386FlagGT_UGT {
6549			break
6550		}
6551		v.reset(Op386MOVLconst)
6552		v.AuxInt = int32ToAuxInt(0)
6553		return true
6554	}
6555	return false
6556}
6557func rewriteValue386_Op386SETG(v *Value) bool {
6558	v_0 := v.Args[0]
6559	// match: (SETG (InvertFlags x))
6560	// result: (SETL x)
6561	for {
6562		if v_0.Op != Op386InvertFlags {
6563			break
6564		}
6565		x := v_0.Args[0]
6566		v.reset(Op386SETL)
6567		v.AddArg(x)
6568		return true
6569	}
6570	// match: (SETG (FlagEQ))
6571	// result: (MOVLconst [0])
6572	for {
6573		if v_0.Op != Op386FlagEQ {
6574			break
6575		}
6576		v.reset(Op386MOVLconst)
6577		v.AuxInt = int32ToAuxInt(0)
6578		return true
6579	}
6580	// match: (SETG (FlagLT_ULT))
6581	// result: (MOVLconst [0])
6582	for {
6583		if v_0.Op != Op386FlagLT_ULT {
6584			break
6585		}
6586		v.reset(Op386MOVLconst)
6587		v.AuxInt = int32ToAuxInt(0)
6588		return true
6589	}
6590	// match: (SETG (FlagLT_UGT))
6591	// result: (MOVLconst [0])
6592	for {
6593		if v_0.Op != Op386FlagLT_UGT {
6594			break
6595		}
6596		v.reset(Op386MOVLconst)
6597		v.AuxInt = int32ToAuxInt(0)
6598		return true
6599	}
6600	// match: (SETG (FlagGT_ULT))
6601	// result: (MOVLconst [1])
6602	for {
6603		if v_0.Op != Op386FlagGT_ULT {
6604			break
6605		}
6606		v.reset(Op386MOVLconst)
6607		v.AuxInt = int32ToAuxInt(1)
6608		return true
6609	}
6610	// match: (SETG (FlagGT_UGT))
6611	// result: (MOVLconst [1])
6612	for {
6613		if v_0.Op != Op386FlagGT_UGT {
6614			break
6615		}
6616		v.reset(Op386MOVLconst)
6617		v.AuxInt = int32ToAuxInt(1)
6618		return true
6619	}
6620	return false
6621}
6622func rewriteValue386_Op386SETGE(v *Value) bool {
6623	v_0 := v.Args[0]
6624	// match: (SETGE (InvertFlags x))
6625	// result: (SETLE x)
6626	for {
6627		if v_0.Op != Op386InvertFlags {
6628			break
6629		}
6630		x := v_0.Args[0]
6631		v.reset(Op386SETLE)
6632		v.AddArg(x)
6633		return true
6634	}
6635	// match: (SETGE (FlagEQ))
6636	// result: (MOVLconst [1])
6637	for {
6638		if v_0.Op != Op386FlagEQ {
6639			break
6640		}
6641		v.reset(Op386MOVLconst)
6642		v.AuxInt = int32ToAuxInt(1)
6643		return true
6644	}
6645	// match: (SETGE (FlagLT_ULT))
6646	// result: (MOVLconst [0])
6647	for {
6648		if v_0.Op != Op386FlagLT_ULT {
6649			break
6650		}
6651		v.reset(Op386MOVLconst)
6652		v.AuxInt = int32ToAuxInt(0)
6653		return true
6654	}
6655	// match: (SETGE (FlagLT_UGT))
6656	// result: (MOVLconst [0])
6657	for {
6658		if v_0.Op != Op386FlagLT_UGT {
6659			break
6660		}
6661		v.reset(Op386MOVLconst)
6662		v.AuxInt = int32ToAuxInt(0)
6663		return true
6664	}
6665	// match: (SETGE (FlagGT_ULT))
6666	// result: (MOVLconst [1])
6667	for {
6668		if v_0.Op != Op386FlagGT_ULT {
6669			break
6670		}
6671		v.reset(Op386MOVLconst)
6672		v.AuxInt = int32ToAuxInt(1)
6673		return true
6674	}
6675	// match: (SETGE (FlagGT_UGT))
6676	// result: (MOVLconst [1])
6677	for {
6678		if v_0.Op != Op386FlagGT_UGT {
6679			break
6680		}
6681		v.reset(Op386MOVLconst)
6682		v.AuxInt = int32ToAuxInt(1)
6683		return true
6684	}
6685	return false
6686}
6687func rewriteValue386_Op386SETL(v *Value) bool {
6688	v_0 := v.Args[0]
6689	// match: (SETL (InvertFlags x))
6690	// result: (SETG x)
6691	for {
6692		if v_0.Op != Op386InvertFlags {
6693			break
6694		}
6695		x := v_0.Args[0]
6696		v.reset(Op386SETG)
6697		v.AddArg(x)
6698		return true
6699	}
6700	// match: (SETL (FlagEQ))
6701	// result: (MOVLconst [0])
6702	for {
6703		if v_0.Op != Op386FlagEQ {
6704			break
6705		}
6706		v.reset(Op386MOVLconst)
6707		v.AuxInt = int32ToAuxInt(0)
6708		return true
6709	}
6710	// match: (SETL (FlagLT_ULT))
6711	// result: (MOVLconst [1])
6712	for {
6713		if v_0.Op != Op386FlagLT_ULT {
6714			break
6715		}
6716		v.reset(Op386MOVLconst)
6717		v.AuxInt = int32ToAuxInt(1)
6718		return true
6719	}
6720	// match: (SETL (FlagLT_UGT))
6721	// result: (MOVLconst [1])
6722	for {
6723		if v_0.Op != Op386FlagLT_UGT {
6724			break
6725		}
6726		v.reset(Op386MOVLconst)
6727		v.AuxInt = int32ToAuxInt(1)
6728		return true
6729	}
6730	// match: (SETL (FlagGT_ULT))
6731	// result: (MOVLconst [0])
6732	for {
6733		if v_0.Op != Op386FlagGT_ULT {
6734			break
6735		}
6736		v.reset(Op386MOVLconst)
6737		v.AuxInt = int32ToAuxInt(0)
6738		return true
6739	}
6740	// match: (SETL (FlagGT_UGT))
6741	// result: (MOVLconst [0])
6742	for {
6743		if v_0.Op != Op386FlagGT_UGT {
6744			break
6745		}
6746		v.reset(Op386MOVLconst)
6747		v.AuxInt = int32ToAuxInt(0)
6748		return true
6749	}
6750	return false
6751}
6752func rewriteValue386_Op386SETLE(v *Value) bool {
6753	v_0 := v.Args[0]
6754	// match: (SETLE (InvertFlags x))
6755	// result: (SETGE x)
6756	for {
6757		if v_0.Op != Op386InvertFlags {
6758			break
6759		}
6760		x := v_0.Args[0]
6761		v.reset(Op386SETGE)
6762		v.AddArg(x)
6763		return true
6764	}
6765	// match: (SETLE (FlagEQ))
6766	// result: (MOVLconst [1])
6767	for {
6768		if v_0.Op != Op386FlagEQ {
6769			break
6770		}
6771		v.reset(Op386MOVLconst)
6772		v.AuxInt = int32ToAuxInt(1)
6773		return true
6774	}
6775	// match: (SETLE (FlagLT_ULT))
6776	// result: (MOVLconst [1])
6777	for {
6778		if v_0.Op != Op386FlagLT_ULT {
6779			break
6780		}
6781		v.reset(Op386MOVLconst)
6782		v.AuxInt = int32ToAuxInt(1)
6783		return true
6784	}
6785	// match: (SETLE (FlagLT_UGT))
6786	// result: (MOVLconst [1])
6787	for {
6788		if v_0.Op != Op386FlagLT_UGT {
6789			break
6790		}
6791		v.reset(Op386MOVLconst)
6792		v.AuxInt = int32ToAuxInt(1)
6793		return true
6794	}
6795	// match: (SETLE (FlagGT_ULT))
6796	// result: (MOVLconst [0])
6797	for {
6798		if v_0.Op != Op386FlagGT_ULT {
6799			break
6800		}
6801		v.reset(Op386MOVLconst)
6802		v.AuxInt = int32ToAuxInt(0)
6803		return true
6804	}
6805	// match: (SETLE (FlagGT_UGT))
6806	// result: (MOVLconst [0])
6807	for {
6808		if v_0.Op != Op386FlagGT_UGT {
6809			break
6810		}
6811		v.reset(Op386MOVLconst)
6812		v.AuxInt = int32ToAuxInt(0)
6813		return true
6814	}
6815	return false
6816}
6817func rewriteValue386_Op386SETNE(v *Value) bool {
6818	v_0 := v.Args[0]
6819	// match: (SETNE (InvertFlags x))
6820	// result: (SETNE x)
6821	for {
6822		if v_0.Op != Op386InvertFlags {
6823			break
6824		}
6825		x := v_0.Args[0]
6826		v.reset(Op386SETNE)
6827		v.AddArg(x)
6828		return true
6829	}
6830	// match: (SETNE (FlagEQ))
6831	// result: (MOVLconst [0])
6832	for {
6833		if v_0.Op != Op386FlagEQ {
6834			break
6835		}
6836		v.reset(Op386MOVLconst)
6837		v.AuxInt = int32ToAuxInt(0)
6838		return true
6839	}
6840	// match: (SETNE (FlagLT_ULT))
6841	// result: (MOVLconst [1])
6842	for {
6843		if v_0.Op != Op386FlagLT_ULT {
6844			break
6845		}
6846		v.reset(Op386MOVLconst)
6847		v.AuxInt = int32ToAuxInt(1)
6848		return true
6849	}
6850	// match: (SETNE (FlagLT_UGT))
6851	// result: (MOVLconst [1])
6852	for {
6853		if v_0.Op != Op386FlagLT_UGT {
6854			break
6855		}
6856		v.reset(Op386MOVLconst)
6857		v.AuxInt = int32ToAuxInt(1)
6858		return true
6859	}
6860	// match: (SETNE (FlagGT_ULT))
6861	// result: (MOVLconst [1])
6862	for {
6863		if v_0.Op != Op386FlagGT_ULT {
6864			break
6865		}
6866		v.reset(Op386MOVLconst)
6867		v.AuxInt = int32ToAuxInt(1)
6868		return true
6869	}
6870	// match: (SETNE (FlagGT_UGT))
6871	// result: (MOVLconst [1])
6872	for {
6873		if v_0.Op != Op386FlagGT_UGT {
6874			break
6875		}
6876		v.reset(Op386MOVLconst)
6877		v.AuxInt = int32ToAuxInt(1)
6878		return true
6879	}
6880	return false
6881}
6882func rewriteValue386_Op386SHLL(v *Value) bool {
6883	v_1 := v.Args[1]
6884	v_0 := v.Args[0]
6885	// match: (SHLL x (MOVLconst [c]))
6886	// result: (SHLLconst [c&31] x)
6887	for {
6888		x := v_0
6889		if v_1.Op != Op386MOVLconst {
6890			break
6891		}
6892		c := auxIntToInt32(v_1.AuxInt)
6893		v.reset(Op386SHLLconst)
6894		v.AuxInt = int32ToAuxInt(c & 31)
6895		v.AddArg(x)
6896		return true
6897	}
6898	// match: (SHLL x (ANDLconst [31] y))
6899	// result: (SHLL x y)
6900	for {
6901		x := v_0
6902		if v_1.Op != Op386ANDLconst || auxIntToInt32(v_1.AuxInt) != 31 {
6903			break
6904		}
6905		y := v_1.Args[0]
6906		v.reset(Op386SHLL)
6907		v.AddArg2(x, y)
6908		return true
6909	}
6910	return false
6911}
6912func rewriteValue386_Op386SHLLconst(v *Value) bool {
6913	v_0 := v.Args[0]
6914	// match: (SHLLconst x [0])
6915	// result: x
6916	for {
6917		if auxIntToInt32(v.AuxInt) != 0 {
6918			break
6919		}
6920		x := v_0
6921		v.copyOf(x)
6922		return true
6923	}
6924	return false
6925}
6926func rewriteValue386_Op386SHRB(v *Value) bool {
6927	v_1 := v.Args[1]
6928	v_0 := v.Args[0]
6929	// match: (SHRB x (MOVLconst [c]))
6930	// cond: c&31 < 8
6931	// result: (SHRBconst [int8(c&31)] x)
6932	for {
6933		x := v_0
6934		if v_1.Op != Op386MOVLconst {
6935			break
6936		}
6937		c := auxIntToInt32(v_1.AuxInt)
6938		if !(c&31 < 8) {
6939			break
6940		}
6941		v.reset(Op386SHRBconst)
6942		v.AuxInt = int8ToAuxInt(int8(c & 31))
6943		v.AddArg(x)
6944		return true
6945	}
6946	// match: (SHRB _ (MOVLconst [c]))
6947	// cond: c&31 >= 8
6948	// result: (MOVLconst [0])
6949	for {
6950		if v_1.Op != Op386MOVLconst {
6951			break
6952		}
6953		c := auxIntToInt32(v_1.AuxInt)
6954		if !(c&31 >= 8) {
6955			break
6956		}
6957		v.reset(Op386MOVLconst)
6958		v.AuxInt = int32ToAuxInt(0)
6959		return true
6960	}
6961	return false
6962}
6963func rewriteValue386_Op386SHRBconst(v *Value) bool {
6964	v_0 := v.Args[0]
6965	// match: (SHRBconst x [0])
6966	// result: x
6967	for {
6968		if auxIntToInt8(v.AuxInt) != 0 {
6969			break
6970		}
6971		x := v_0
6972		v.copyOf(x)
6973		return true
6974	}
6975	return false
6976}
6977func rewriteValue386_Op386SHRL(v *Value) bool {
6978	v_1 := v.Args[1]
6979	v_0 := v.Args[0]
6980	// match: (SHRL x (MOVLconst [c]))
6981	// result: (SHRLconst [c&31] x)
6982	for {
6983		x := v_0
6984		if v_1.Op != Op386MOVLconst {
6985			break
6986		}
6987		c := auxIntToInt32(v_1.AuxInt)
6988		v.reset(Op386SHRLconst)
6989		v.AuxInt = int32ToAuxInt(c & 31)
6990		v.AddArg(x)
6991		return true
6992	}
6993	// match: (SHRL x (ANDLconst [31] y))
6994	// result: (SHRL x y)
6995	for {
6996		x := v_0
6997		if v_1.Op != Op386ANDLconst || auxIntToInt32(v_1.AuxInt) != 31 {
6998			break
6999		}
7000		y := v_1.Args[0]
7001		v.reset(Op386SHRL)
7002		v.AddArg2(x, y)
7003		return true
7004	}
7005	return false
7006}
7007func rewriteValue386_Op386SHRLconst(v *Value) bool {
7008	v_0 := v.Args[0]
7009	// match: (SHRLconst x [0])
7010	// result: x
7011	for {
7012		if auxIntToInt32(v.AuxInt) != 0 {
7013			break
7014		}
7015		x := v_0
7016		v.copyOf(x)
7017		return true
7018	}
7019	return false
7020}
7021func rewriteValue386_Op386SHRW(v *Value) bool {
7022	v_1 := v.Args[1]
7023	v_0 := v.Args[0]
7024	// match: (SHRW x (MOVLconst [c]))
7025	// cond: c&31 < 16
7026	// result: (SHRWconst [int16(c&31)] x)
7027	for {
7028		x := v_0
7029		if v_1.Op != Op386MOVLconst {
7030			break
7031		}
7032		c := auxIntToInt32(v_1.AuxInt)
7033		if !(c&31 < 16) {
7034			break
7035		}
7036		v.reset(Op386SHRWconst)
7037		v.AuxInt = int16ToAuxInt(int16(c & 31))
7038		v.AddArg(x)
7039		return true
7040	}
7041	// match: (SHRW _ (MOVLconst [c]))
7042	// cond: c&31 >= 16
7043	// result: (MOVLconst [0])
7044	for {
7045		if v_1.Op != Op386MOVLconst {
7046			break
7047		}
7048		c := auxIntToInt32(v_1.AuxInt)
7049		if !(c&31 >= 16) {
7050			break
7051		}
7052		v.reset(Op386MOVLconst)
7053		v.AuxInt = int32ToAuxInt(0)
7054		return true
7055	}
7056	return false
7057}
7058func rewriteValue386_Op386SHRWconst(v *Value) bool {
7059	v_0 := v.Args[0]
7060	// match: (SHRWconst x [0])
7061	// result: x
7062	for {
7063		if auxIntToInt16(v.AuxInt) != 0 {
7064			break
7065		}
7066		x := v_0
7067		v.copyOf(x)
7068		return true
7069	}
7070	return false
7071}
7072func rewriteValue386_Op386SUBL(v *Value) bool {
7073	v_1 := v.Args[1]
7074	v_0 := v.Args[0]
7075	b := v.Block
7076	// match: (SUBL x (MOVLconst [c]))
7077	// result: (SUBLconst x [c])
7078	for {
7079		x := v_0
7080		if v_1.Op != Op386MOVLconst {
7081			break
7082		}
7083		c := auxIntToInt32(v_1.AuxInt)
7084		v.reset(Op386SUBLconst)
7085		v.AuxInt = int32ToAuxInt(c)
7086		v.AddArg(x)
7087		return true
7088	}
7089	// match: (SUBL (MOVLconst [c]) x)
7090	// result: (NEGL (SUBLconst <v.Type> x [c]))
7091	for {
7092		if v_0.Op != Op386MOVLconst {
7093			break
7094		}
7095		c := auxIntToInt32(v_0.AuxInt)
7096		x := v_1
7097		v.reset(Op386NEGL)
7098		v0 := b.NewValue0(v.Pos, Op386SUBLconst, v.Type)
7099		v0.AuxInt = int32ToAuxInt(c)
7100		v0.AddArg(x)
7101		v.AddArg(v0)
7102		return true
7103	}
7104	// match: (SUBL x l:(MOVLload [off] {sym} ptr mem))
7105	// cond: canMergeLoadClobber(v, l, x) && clobber(l)
7106	// result: (SUBLload x [off] {sym} ptr mem)
7107	for {
7108		x := v_0
7109		l := v_1
7110		if l.Op != Op386MOVLload {
7111			break
7112		}
7113		off := auxIntToInt32(l.AuxInt)
7114		sym := auxToSym(l.Aux)
7115		mem := l.Args[1]
7116		ptr := l.Args[0]
7117		if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
7118			break
7119		}
7120		v.reset(Op386SUBLload)
7121		v.AuxInt = int32ToAuxInt(off)
7122		v.Aux = symToAux(sym)
7123		v.AddArg3(x, ptr, mem)
7124		return true
7125	}
7126	// match: (SUBL x x)
7127	// result: (MOVLconst [0])
7128	for {
7129		x := v_0
7130		if x != v_1 {
7131			break
7132		}
7133		v.reset(Op386MOVLconst)
7134		v.AuxInt = int32ToAuxInt(0)
7135		return true
7136	}
7137	return false
7138}
7139func rewriteValue386_Op386SUBLcarry(v *Value) bool {
7140	v_1 := v.Args[1]
7141	v_0 := v.Args[0]
7142	// match: (SUBLcarry x (MOVLconst [c]))
7143	// result: (SUBLconstcarry [c] x)
7144	for {
7145		x := v_0
7146		if v_1.Op != Op386MOVLconst {
7147			break
7148		}
7149		c := auxIntToInt32(v_1.AuxInt)
7150		v.reset(Op386SUBLconstcarry)
7151		v.AuxInt = int32ToAuxInt(c)
7152		v.AddArg(x)
7153		return true
7154	}
7155	return false
7156}
7157func rewriteValue386_Op386SUBLconst(v *Value) bool {
7158	v_0 := v.Args[0]
7159	// match: (SUBLconst [c] x)
7160	// cond: c==0
7161	// result: x
7162	for {
7163		c := auxIntToInt32(v.AuxInt)
7164		x := v_0
7165		if !(c == 0) {
7166			break
7167		}
7168		v.copyOf(x)
7169		return true
7170	}
7171	// match: (SUBLconst [c] x)
7172	// result: (ADDLconst [-c] x)
7173	for {
7174		c := auxIntToInt32(v.AuxInt)
7175		x := v_0
7176		v.reset(Op386ADDLconst)
7177		v.AuxInt = int32ToAuxInt(-c)
7178		v.AddArg(x)
7179		return true
7180	}
7181}
7182func rewriteValue386_Op386SUBLload(v *Value) bool {
7183	v_2 := v.Args[2]
7184	v_1 := v.Args[1]
7185	v_0 := v.Args[0]
7186	b := v.Block
7187	config := b.Func.Config
7188	// match: (SUBLload [off1] {sym} val (ADDLconst [off2] base) mem)
7189	// cond: is32Bit(int64(off1)+int64(off2))
7190	// result: (SUBLload [off1+off2] {sym} val base mem)
7191	for {
7192		off1 := auxIntToInt32(v.AuxInt)
7193		sym := auxToSym(v.Aux)
7194		val := v_0
7195		if v_1.Op != Op386ADDLconst {
7196			break
7197		}
7198		off2 := auxIntToInt32(v_1.AuxInt)
7199		base := v_1.Args[0]
7200		mem := v_2
7201		if !(is32Bit(int64(off1) + int64(off2))) {
7202			break
7203		}
7204		v.reset(Op386SUBLload)
7205		v.AuxInt = int32ToAuxInt(off1 + off2)
7206		v.Aux = symToAux(sym)
7207		v.AddArg3(val, base, mem)
7208		return true
7209	}
7210	// match: (SUBLload [off1] {sym1} val (LEAL [off2] {sym2} base) mem)
7211	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
7212	// result: (SUBLload [off1+off2] {mergeSym(sym1,sym2)} val base mem)
7213	for {
7214		off1 := auxIntToInt32(v.AuxInt)
7215		sym1 := auxToSym(v.Aux)
7216		val := v_0
7217		if v_1.Op != Op386LEAL {
7218			break
7219		}
7220		off2 := auxIntToInt32(v_1.AuxInt)
7221		sym2 := auxToSym(v_1.Aux)
7222		base := v_1.Args[0]
7223		mem := v_2
7224		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
7225			break
7226		}
7227		v.reset(Op386SUBLload)
7228		v.AuxInt = int32ToAuxInt(off1 + off2)
7229		v.Aux = symToAux(mergeSym(sym1, sym2))
7230		v.AddArg3(val, base, mem)
7231		return true
7232	}
7233	return false
7234}
7235func rewriteValue386_Op386SUBLmodify(v *Value) bool {
7236	v_2 := v.Args[2]
7237	v_1 := v.Args[1]
7238	v_0 := v.Args[0]
7239	b := v.Block
7240	config := b.Func.Config
7241	// match: (SUBLmodify [off1] {sym} (ADDLconst [off2] base) val mem)
7242	// cond: is32Bit(int64(off1)+int64(off2))
7243	// result: (SUBLmodify [off1+off2] {sym} base val mem)
7244	for {
7245		off1 := auxIntToInt32(v.AuxInt)
7246		sym := auxToSym(v.Aux)
7247		if v_0.Op != Op386ADDLconst {
7248			break
7249		}
7250		off2 := auxIntToInt32(v_0.AuxInt)
7251		base := v_0.Args[0]
7252		val := v_1
7253		mem := v_2
7254		if !(is32Bit(int64(off1) + int64(off2))) {
7255			break
7256		}
7257		v.reset(Op386SUBLmodify)
7258		v.AuxInt = int32ToAuxInt(off1 + off2)
7259		v.Aux = symToAux(sym)
7260		v.AddArg3(base, val, mem)
7261		return true
7262	}
7263	// match: (SUBLmodify [off1] {sym1} (LEAL [off2] {sym2} base) val mem)
7264	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
7265	// result: (SUBLmodify [off1+off2] {mergeSym(sym1,sym2)} base val mem)
7266	for {
7267		off1 := auxIntToInt32(v.AuxInt)
7268		sym1 := auxToSym(v.Aux)
7269		if v_0.Op != Op386LEAL {
7270			break
7271		}
7272		off2 := auxIntToInt32(v_0.AuxInt)
7273		sym2 := auxToSym(v_0.Aux)
7274		base := v_0.Args[0]
7275		val := v_1
7276		mem := v_2
7277		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
7278			break
7279		}
7280		v.reset(Op386SUBLmodify)
7281		v.AuxInt = int32ToAuxInt(off1 + off2)
7282		v.Aux = symToAux(mergeSym(sym1, sym2))
7283		v.AddArg3(base, val, mem)
7284		return true
7285	}
7286	return false
7287}
7288func rewriteValue386_Op386SUBSD(v *Value) bool {
7289	v_1 := v.Args[1]
7290	v_0 := v.Args[0]
7291	// match: (SUBSD x l:(MOVSDload [off] {sym} ptr mem))
7292	// cond: canMergeLoadClobber(v, l, x) && clobber(l)
7293	// result: (SUBSDload x [off] {sym} ptr mem)
7294	for {
7295		x := v_0
7296		l := v_1
7297		if l.Op != Op386MOVSDload {
7298			break
7299		}
7300		off := auxIntToInt32(l.AuxInt)
7301		sym := auxToSym(l.Aux)
7302		mem := l.Args[1]
7303		ptr := l.Args[0]
7304		if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
7305			break
7306		}
7307		v.reset(Op386SUBSDload)
7308		v.AuxInt = int32ToAuxInt(off)
7309		v.Aux = symToAux(sym)
7310		v.AddArg3(x, ptr, mem)
7311		return true
7312	}
7313	return false
7314}
7315func rewriteValue386_Op386SUBSDload(v *Value) bool {
7316	v_2 := v.Args[2]
7317	v_1 := v.Args[1]
7318	v_0 := v.Args[0]
7319	b := v.Block
7320	config := b.Func.Config
7321	// match: (SUBSDload [off1] {sym} val (ADDLconst [off2] base) mem)
7322	// cond: is32Bit(int64(off1)+int64(off2))
7323	// result: (SUBSDload [off1+off2] {sym} val base mem)
7324	for {
7325		off1 := auxIntToInt32(v.AuxInt)
7326		sym := auxToSym(v.Aux)
7327		val := v_0
7328		if v_1.Op != Op386ADDLconst {
7329			break
7330		}
7331		off2 := auxIntToInt32(v_1.AuxInt)
7332		base := v_1.Args[0]
7333		mem := v_2
7334		if !(is32Bit(int64(off1) + int64(off2))) {
7335			break
7336		}
7337		v.reset(Op386SUBSDload)
7338		v.AuxInt = int32ToAuxInt(off1 + off2)
7339		v.Aux = symToAux(sym)
7340		v.AddArg3(val, base, mem)
7341		return true
7342	}
7343	// match: (SUBSDload [off1] {sym1} val (LEAL [off2] {sym2} base) mem)
7344	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
7345	// result: (SUBSDload [off1+off2] {mergeSym(sym1,sym2)} val base mem)
7346	for {
7347		off1 := auxIntToInt32(v.AuxInt)
7348		sym1 := auxToSym(v.Aux)
7349		val := v_0
7350		if v_1.Op != Op386LEAL {
7351			break
7352		}
7353		off2 := auxIntToInt32(v_1.AuxInt)
7354		sym2 := auxToSym(v_1.Aux)
7355		base := v_1.Args[0]
7356		mem := v_2
7357		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
7358			break
7359		}
7360		v.reset(Op386SUBSDload)
7361		v.AuxInt = int32ToAuxInt(off1 + off2)
7362		v.Aux = symToAux(mergeSym(sym1, sym2))
7363		v.AddArg3(val, base, mem)
7364		return true
7365	}
7366	return false
7367}
7368func rewriteValue386_Op386SUBSS(v *Value) bool {
7369	v_1 := v.Args[1]
7370	v_0 := v.Args[0]
7371	// match: (SUBSS x l:(MOVSSload [off] {sym} ptr mem))
7372	// cond: canMergeLoadClobber(v, l, x) && clobber(l)
7373	// result: (SUBSSload x [off] {sym} ptr mem)
7374	for {
7375		x := v_0
7376		l := v_1
7377		if l.Op != Op386MOVSSload {
7378			break
7379		}
7380		off := auxIntToInt32(l.AuxInt)
7381		sym := auxToSym(l.Aux)
7382		mem := l.Args[1]
7383		ptr := l.Args[0]
7384		if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
7385			break
7386		}
7387		v.reset(Op386SUBSSload)
7388		v.AuxInt = int32ToAuxInt(off)
7389		v.Aux = symToAux(sym)
7390		v.AddArg3(x, ptr, mem)
7391		return true
7392	}
7393	return false
7394}
7395func rewriteValue386_Op386SUBSSload(v *Value) bool {
7396	v_2 := v.Args[2]
7397	v_1 := v.Args[1]
7398	v_0 := v.Args[0]
7399	b := v.Block
7400	config := b.Func.Config
7401	// match: (SUBSSload [off1] {sym} val (ADDLconst [off2] base) mem)
7402	// cond: is32Bit(int64(off1)+int64(off2))
7403	// result: (SUBSSload [off1+off2] {sym} val base mem)
7404	for {
7405		off1 := auxIntToInt32(v.AuxInt)
7406		sym := auxToSym(v.Aux)
7407		val := v_0
7408		if v_1.Op != Op386ADDLconst {
7409			break
7410		}
7411		off2 := auxIntToInt32(v_1.AuxInt)
7412		base := v_1.Args[0]
7413		mem := v_2
7414		if !(is32Bit(int64(off1) + int64(off2))) {
7415			break
7416		}
7417		v.reset(Op386SUBSSload)
7418		v.AuxInt = int32ToAuxInt(off1 + off2)
7419		v.Aux = symToAux(sym)
7420		v.AddArg3(val, base, mem)
7421		return true
7422	}
7423	// match: (SUBSSload [off1] {sym1} val (LEAL [off2] {sym2} base) mem)
7424	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
7425	// result: (SUBSSload [off1+off2] {mergeSym(sym1,sym2)} val base mem)
7426	for {
7427		off1 := auxIntToInt32(v.AuxInt)
7428		sym1 := auxToSym(v.Aux)
7429		val := v_0
7430		if v_1.Op != Op386LEAL {
7431			break
7432		}
7433		off2 := auxIntToInt32(v_1.AuxInt)
7434		sym2 := auxToSym(v_1.Aux)
7435		base := v_1.Args[0]
7436		mem := v_2
7437		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
7438			break
7439		}
7440		v.reset(Op386SUBSSload)
7441		v.AuxInt = int32ToAuxInt(off1 + off2)
7442		v.Aux = symToAux(mergeSym(sym1, sym2))
7443		v.AddArg3(val, base, mem)
7444		return true
7445	}
7446	return false
7447}
7448func rewriteValue386_Op386XORL(v *Value) bool {
7449	v_1 := v.Args[1]
7450	v_0 := v.Args[0]
7451	// match: (XORL x (MOVLconst [c]))
7452	// result: (XORLconst [c] x)
7453	for {
7454		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
7455			x := v_0
7456			if v_1.Op != Op386MOVLconst {
7457				continue
7458			}
7459			c := auxIntToInt32(v_1.AuxInt)
7460			v.reset(Op386XORLconst)
7461			v.AuxInt = int32ToAuxInt(c)
7462			v.AddArg(x)
7463			return true
7464		}
7465		break
7466	}
7467	// match: (XORL x l:(MOVLload [off] {sym} ptr mem))
7468	// cond: canMergeLoadClobber(v, l, x) && clobber(l)
7469	// result: (XORLload x [off] {sym} ptr mem)
7470	for {
7471		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
7472			x := v_0
7473			l := v_1
7474			if l.Op != Op386MOVLload {
7475				continue
7476			}
7477			off := auxIntToInt32(l.AuxInt)
7478			sym := auxToSym(l.Aux)
7479			mem := l.Args[1]
7480			ptr := l.Args[0]
7481			if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
7482				continue
7483			}
7484			v.reset(Op386XORLload)
7485			v.AuxInt = int32ToAuxInt(off)
7486			v.Aux = symToAux(sym)
7487			v.AddArg3(x, ptr, mem)
7488			return true
7489		}
7490		break
7491	}
7492	// match: (XORL x x)
7493	// result: (MOVLconst [0])
7494	for {
7495		x := v_0
7496		if x != v_1 {
7497			break
7498		}
7499		v.reset(Op386MOVLconst)
7500		v.AuxInt = int32ToAuxInt(0)
7501		return true
7502	}
7503	return false
7504}
7505func rewriteValue386_Op386XORLconst(v *Value) bool {
7506	v_0 := v.Args[0]
7507	// match: (XORLconst [c] (XORLconst [d] x))
7508	// result: (XORLconst [c ^ d] x)
7509	for {
7510		c := auxIntToInt32(v.AuxInt)
7511		if v_0.Op != Op386XORLconst {
7512			break
7513		}
7514		d := auxIntToInt32(v_0.AuxInt)
7515		x := v_0.Args[0]
7516		v.reset(Op386XORLconst)
7517		v.AuxInt = int32ToAuxInt(c ^ d)
7518		v.AddArg(x)
7519		return true
7520	}
7521	// match: (XORLconst [c] x)
7522	// cond: c==0
7523	// result: x
7524	for {
7525		c := auxIntToInt32(v.AuxInt)
7526		x := v_0
7527		if !(c == 0) {
7528			break
7529		}
7530		v.copyOf(x)
7531		return true
7532	}
7533	// match: (XORLconst [c] (MOVLconst [d]))
7534	// result: (MOVLconst [c^d])
7535	for {
7536		c := auxIntToInt32(v.AuxInt)
7537		if v_0.Op != Op386MOVLconst {
7538			break
7539		}
7540		d := auxIntToInt32(v_0.AuxInt)
7541		v.reset(Op386MOVLconst)
7542		v.AuxInt = int32ToAuxInt(c ^ d)
7543		return true
7544	}
7545	return false
7546}
7547func rewriteValue386_Op386XORLconstmodify(v *Value) bool {
7548	v_1 := v.Args[1]
7549	v_0 := v.Args[0]
7550	b := v.Block
7551	config := b.Func.Config
7552	// match: (XORLconstmodify [valoff1] {sym} (ADDLconst [off2] base) mem)
7553	// cond: valoff1.canAdd32(off2)
7554	// result: (XORLconstmodify [valoff1.addOffset32(off2)] {sym} base mem)
7555	for {
7556		valoff1 := auxIntToValAndOff(v.AuxInt)
7557		sym := auxToSym(v.Aux)
7558		if v_0.Op != Op386ADDLconst {
7559			break
7560		}
7561		off2 := auxIntToInt32(v_0.AuxInt)
7562		base := v_0.Args[0]
7563		mem := v_1
7564		if !(valoff1.canAdd32(off2)) {
7565			break
7566		}
7567		v.reset(Op386XORLconstmodify)
7568		v.AuxInt = valAndOffToAuxInt(valoff1.addOffset32(off2))
7569		v.Aux = symToAux(sym)
7570		v.AddArg2(base, mem)
7571		return true
7572	}
7573	// match: (XORLconstmodify [valoff1] {sym1} (LEAL [off2] {sym2} base) mem)
7574	// cond: valoff1.canAdd32(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
7575	// result: (XORLconstmodify [valoff1.addOffset32(off2)] {mergeSym(sym1,sym2)} base mem)
7576	for {
7577		valoff1 := auxIntToValAndOff(v.AuxInt)
7578		sym1 := auxToSym(v.Aux)
7579		if v_0.Op != Op386LEAL {
7580			break
7581		}
7582		off2 := auxIntToInt32(v_0.AuxInt)
7583		sym2 := auxToSym(v_0.Aux)
7584		base := v_0.Args[0]
7585		mem := v_1
7586		if !(valoff1.canAdd32(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
7587			break
7588		}
7589		v.reset(Op386XORLconstmodify)
7590		v.AuxInt = valAndOffToAuxInt(valoff1.addOffset32(off2))
7591		v.Aux = symToAux(mergeSym(sym1, sym2))
7592		v.AddArg2(base, mem)
7593		return true
7594	}
7595	return false
7596}
7597func rewriteValue386_Op386XORLload(v *Value) bool {
7598	v_2 := v.Args[2]
7599	v_1 := v.Args[1]
7600	v_0 := v.Args[0]
7601	b := v.Block
7602	config := b.Func.Config
7603	// match: (XORLload [off1] {sym} val (ADDLconst [off2] base) mem)
7604	// cond: is32Bit(int64(off1)+int64(off2))
7605	// result: (XORLload [off1+off2] {sym} val base mem)
7606	for {
7607		off1 := auxIntToInt32(v.AuxInt)
7608		sym := auxToSym(v.Aux)
7609		val := v_0
7610		if v_1.Op != Op386ADDLconst {
7611			break
7612		}
7613		off2 := auxIntToInt32(v_1.AuxInt)
7614		base := v_1.Args[0]
7615		mem := v_2
7616		if !(is32Bit(int64(off1) + int64(off2))) {
7617			break
7618		}
7619		v.reset(Op386XORLload)
7620		v.AuxInt = int32ToAuxInt(off1 + off2)
7621		v.Aux = symToAux(sym)
7622		v.AddArg3(val, base, mem)
7623		return true
7624	}
7625	// match: (XORLload [off1] {sym1} val (LEAL [off2] {sym2} base) mem)
7626	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
7627	// result: (XORLload [off1+off2] {mergeSym(sym1,sym2)} val base mem)
7628	for {
7629		off1 := auxIntToInt32(v.AuxInt)
7630		sym1 := auxToSym(v.Aux)
7631		val := v_0
7632		if v_1.Op != Op386LEAL {
7633			break
7634		}
7635		off2 := auxIntToInt32(v_1.AuxInt)
7636		sym2 := auxToSym(v_1.Aux)
7637		base := v_1.Args[0]
7638		mem := v_2
7639		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
7640			break
7641		}
7642		v.reset(Op386XORLload)
7643		v.AuxInt = int32ToAuxInt(off1 + off2)
7644		v.Aux = symToAux(mergeSym(sym1, sym2))
7645		v.AddArg3(val, base, mem)
7646		return true
7647	}
7648	return false
7649}
7650func rewriteValue386_Op386XORLmodify(v *Value) bool {
7651	v_2 := v.Args[2]
7652	v_1 := v.Args[1]
7653	v_0 := v.Args[0]
7654	b := v.Block
7655	config := b.Func.Config
7656	// match: (XORLmodify [off1] {sym} (ADDLconst [off2] base) val mem)
7657	// cond: is32Bit(int64(off1)+int64(off2))
7658	// result: (XORLmodify [off1+off2] {sym} base val mem)
7659	for {
7660		off1 := auxIntToInt32(v.AuxInt)
7661		sym := auxToSym(v.Aux)
7662		if v_0.Op != Op386ADDLconst {
7663			break
7664		}
7665		off2 := auxIntToInt32(v_0.AuxInt)
7666		base := v_0.Args[0]
7667		val := v_1
7668		mem := v_2
7669		if !(is32Bit(int64(off1) + int64(off2))) {
7670			break
7671		}
7672		v.reset(Op386XORLmodify)
7673		v.AuxInt = int32ToAuxInt(off1 + off2)
7674		v.Aux = symToAux(sym)
7675		v.AddArg3(base, val, mem)
7676		return true
7677	}
7678	// match: (XORLmodify [off1] {sym1} (LEAL [off2] {sym2} base) val mem)
7679	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)
7680	// result: (XORLmodify [off1+off2] {mergeSym(sym1,sym2)} base val mem)
7681	for {
7682		off1 := auxIntToInt32(v.AuxInt)
7683		sym1 := auxToSym(v.Aux)
7684		if v_0.Op != Op386LEAL {
7685			break
7686		}
7687		off2 := auxIntToInt32(v_0.AuxInt)
7688		sym2 := auxToSym(v_0.Aux)
7689		base := v_0.Args[0]
7690		val := v_1
7691		mem := v_2
7692		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
7693			break
7694		}
7695		v.reset(Op386XORLmodify)
7696		v.AuxInt = int32ToAuxInt(off1 + off2)
7697		v.Aux = symToAux(mergeSym(sym1, sym2))
7698		v.AddArg3(base, val, mem)
7699		return true
7700	}
7701	return false
7702}
7703func rewriteValue386_OpAddr(v *Value) bool {
7704	v_0 := v.Args[0]
7705	// match: (Addr {sym} base)
7706	// result: (LEAL {sym} base)
7707	for {
7708		sym := auxToSym(v.Aux)
7709		base := v_0
7710		v.reset(Op386LEAL)
7711		v.Aux = symToAux(sym)
7712		v.AddArg(base)
7713		return true
7714	}
7715}
7716func rewriteValue386_OpBswap16(v *Value) bool {
7717	v_0 := v.Args[0]
7718	// match: (Bswap16 x)
7719	// result: (ROLWconst [8] x)
7720	for {
7721		x := v_0
7722		v.reset(Op386ROLWconst)
7723		v.AuxInt = int16ToAuxInt(8)
7724		v.AddArg(x)
7725		return true
7726	}
7727}
7728func rewriteValue386_OpConst16(v *Value) bool {
7729	// match: (Const16 [c])
7730	// result: (MOVLconst [int32(c)])
7731	for {
7732		c := auxIntToInt16(v.AuxInt)
7733		v.reset(Op386MOVLconst)
7734		v.AuxInt = int32ToAuxInt(int32(c))
7735		return true
7736	}
7737}
7738func rewriteValue386_OpConst8(v *Value) bool {
7739	// match: (Const8 [c])
7740	// result: (MOVLconst [int32(c)])
7741	for {
7742		c := auxIntToInt8(v.AuxInt)
7743		v.reset(Op386MOVLconst)
7744		v.AuxInt = int32ToAuxInt(int32(c))
7745		return true
7746	}
7747}
7748func rewriteValue386_OpConstBool(v *Value) bool {
7749	// match: (ConstBool [c])
7750	// result: (MOVLconst [b2i32(c)])
7751	for {
7752		c := auxIntToBool(v.AuxInt)
7753		v.reset(Op386MOVLconst)
7754		v.AuxInt = int32ToAuxInt(b2i32(c))
7755		return true
7756	}
7757}
7758func rewriteValue386_OpConstNil(v *Value) bool {
7759	// match: (ConstNil)
7760	// result: (MOVLconst [0])
7761	for {
7762		v.reset(Op386MOVLconst)
7763		v.AuxInt = int32ToAuxInt(0)
7764		return true
7765	}
7766}
7767func rewriteValue386_OpCtz16(v *Value) bool {
7768	v_0 := v.Args[0]
7769	b := v.Block
7770	typ := &b.Func.Config.Types
7771	// match: (Ctz16 x)
7772	// result: (BSFL (ORLconst <typ.UInt32> [0x10000] x))
7773	for {
7774		x := v_0
7775		v.reset(Op386BSFL)
7776		v0 := b.NewValue0(v.Pos, Op386ORLconst, typ.UInt32)
7777		v0.AuxInt = int32ToAuxInt(0x10000)
7778		v0.AddArg(x)
7779		v.AddArg(v0)
7780		return true
7781	}
7782}
7783func rewriteValue386_OpCtz8(v *Value) bool {
7784	v_0 := v.Args[0]
7785	b := v.Block
7786	typ := &b.Func.Config.Types
7787	// match: (Ctz8 x)
7788	// result: (BSFL (ORLconst <typ.UInt32> [0x100] x))
7789	for {
7790		x := v_0
7791		v.reset(Op386BSFL)
7792		v0 := b.NewValue0(v.Pos, Op386ORLconst, typ.UInt32)
7793		v0.AuxInt = int32ToAuxInt(0x100)
7794		v0.AddArg(x)
7795		v.AddArg(v0)
7796		return true
7797	}
7798}
7799func rewriteValue386_OpDiv8(v *Value) bool {
7800	v_1 := v.Args[1]
7801	v_0 := v.Args[0]
7802	b := v.Block
7803	typ := &b.Func.Config.Types
7804	// match: (Div8 x y)
7805	// result: (DIVW (SignExt8to16 x) (SignExt8to16 y))
7806	for {
7807		x := v_0
7808		y := v_1
7809		v.reset(Op386DIVW)
7810		v0 := b.NewValue0(v.Pos, OpSignExt8to16, typ.Int16)
7811		v0.AddArg(x)
7812		v1 := b.NewValue0(v.Pos, OpSignExt8to16, typ.Int16)
7813		v1.AddArg(y)
7814		v.AddArg2(v0, v1)
7815		return true
7816	}
7817}
7818func rewriteValue386_OpDiv8u(v *Value) bool {
7819	v_1 := v.Args[1]
7820	v_0 := v.Args[0]
7821	b := v.Block
7822	typ := &b.Func.Config.Types
7823	// match: (Div8u x y)
7824	// result: (DIVWU (ZeroExt8to16 x) (ZeroExt8to16 y))
7825	for {
7826		x := v_0
7827		y := v_1
7828		v.reset(Op386DIVWU)
7829		v0 := b.NewValue0(v.Pos, OpZeroExt8to16, typ.UInt16)
7830		v0.AddArg(x)
7831		v1 := b.NewValue0(v.Pos, OpZeroExt8to16, typ.UInt16)
7832		v1.AddArg(y)
7833		v.AddArg2(v0, v1)
7834		return true
7835	}
7836}
7837func rewriteValue386_OpEq16(v *Value) bool {
7838	v_1 := v.Args[1]
7839	v_0 := v.Args[0]
7840	b := v.Block
7841	// match: (Eq16 x y)
7842	// result: (SETEQ (CMPW x y))
7843	for {
7844		x := v_0
7845		y := v_1
7846		v.reset(Op386SETEQ)
7847		v0 := b.NewValue0(v.Pos, Op386CMPW, types.TypeFlags)
7848		v0.AddArg2(x, y)
7849		v.AddArg(v0)
7850		return true
7851	}
7852}
7853func rewriteValue386_OpEq32(v *Value) bool {
7854	v_1 := v.Args[1]
7855	v_0 := v.Args[0]
7856	b := v.Block
7857	// match: (Eq32 x y)
7858	// result: (SETEQ (CMPL x y))
7859	for {
7860		x := v_0
7861		y := v_1
7862		v.reset(Op386SETEQ)
7863		v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags)
7864		v0.AddArg2(x, y)
7865		v.AddArg(v0)
7866		return true
7867	}
7868}
7869func rewriteValue386_OpEq32F(v *Value) bool {
7870	v_1 := v.Args[1]
7871	v_0 := v.Args[0]
7872	b := v.Block
7873	// match: (Eq32F x y)
7874	// result: (SETEQF (UCOMISS x y))
7875	for {
7876		x := v_0
7877		y := v_1
7878		v.reset(Op386SETEQF)
7879		v0 := b.NewValue0(v.Pos, Op386UCOMISS, types.TypeFlags)
7880		v0.AddArg2(x, y)
7881		v.AddArg(v0)
7882		return true
7883	}
7884}
7885func rewriteValue386_OpEq64F(v *Value) bool {
7886	v_1 := v.Args[1]
7887	v_0 := v.Args[0]
7888	b := v.Block
7889	// match: (Eq64F x y)
7890	// result: (SETEQF (UCOMISD x y))
7891	for {
7892		x := v_0
7893		y := v_1
7894		v.reset(Op386SETEQF)
7895		v0 := b.NewValue0(v.Pos, Op386UCOMISD, types.TypeFlags)
7896		v0.AddArg2(x, y)
7897		v.AddArg(v0)
7898		return true
7899	}
7900}
7901func rewriteValue386_OpEq8(v *Value) bool {
7902	v_1 := v.Args[1]
7903	v_0 := v.Args[0]
7904	b := v.Block
7905	// match: (Eq8 x y)
7906	// result: (SETEQ (CMPB x y))
7907	for {
7908		x := v_0
7909		y := v_1
7910		v.reset(Op386SETEQ)
7911		v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags)
7912		v0.AddArg2(x, y)
7913		v.AddArg(v0)
7914		return true
7915	}
7916}
7917func rewriteValue386_OpEqB(v *Value) bool {
7918	v_1 := v.Args[1]
7919	v_0 := v.Args[0]
7920	b := v.Block
7921	// match: (EqB x y)
7922	// result: (SETEQ (CMPB x y))
7923	for {
7924		x := v_0
7925		y := v_1
7926		v.reset(Op386SETEQ)
7927		v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags)
7928		v0.AddArg2(x, y)
7929		v.AddArg(v0)
7930		return true
7931	}
7932}
7933func rewriteValue386_OpEqPtr(v *Value) bool {
7934	v_1 := v.Args[1]
7935	v_0 := v.Args[0]
7936	b := v.Block
7937	// match: (EqPtr x y)
7938	// result: (SETEQ (CMPL x y))
7939	for {
7940		x := v_0
7941		y := v_1
7942		v.reset(Op386SETEQ)
7943		v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags)
7944		v0.AddArg2(x, y)
7945		v.AddArg(v0)
7946		return true
7947	}
7948}
7949func rewriteValue386_OpIsInBounds(v *Value) bool {
7950	v_1 := v.Args[1]
7951	v_0 := v.Args[0]
7952	b := v.Block
7953	// match: (IsInBounds idx len)
7954	// result: (SETB (CMPL idx len))
7955	for {
7956		idx := v_0
7957		len := v_1
7958		v.reset(Op386SETB)
7959		v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags)
7960		v0.AddArg2(idx, len)
7961		v.AddArg(v0)
7962		return true
7963	}
7964}
7965func rewriteValue386_OpIsNonNil(v *Value) bool {
7966	v_0 := v.Args[0]
7967	b := v.Block
7968	// match: (IsNonNil p)
7969	// result: (SETNE (TESTL p p))
7970	for {
7971		p := v_0
7972		v.reset(Op386SETNE)
7973		v0 := b.NewValue0(v.Pos, Op386TESTL, types.TypeFlags)
7974		v0.AddArg2(p, p)
7975		v.AddArg(v0)
7976		return true
7977	}
7978}
7979func rewriteValue386_OpIsSliceInBounds(v *Value) bool {
7980	v_1 := v.Args[1]
7981	v_0 := v.Args[0]
7982	b := v.Block
7983	// match: (IsSliceInBounds idx len)
7984	// result: (SETBE (CMPL idx len))
7985	for {
7986		idx := v_0
7987		len := v_1
7988		v.reset(Op386SETBE)
7989		v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags)
7990		v0.AddArg2(idx, len)
7991		v.AddArg(v0)
7992		return true
7993	}
7994}
7995func rewriteValue386_OpLeq16(v *Value) bool {
7996	v_1 := v.Args[1]
7997	v_0 := v.Args[0]
7998	b := v.Block
7999	// match: (Leq16 x y)
8000	// result: (SETLE (CMPW x y))
8001	for {
8002		x := v_0
8003		y := v_1
8004		v.reset(Op386SETLE)
8005		v0 := b.NewValue0(v.Pos, Op386CMPW, types.TypeFlags)
8006		v0.AddArg2(x, y)
8007		v.AddArg(v0)
8008		return true
8009	}
8010}
8011func rewriteValue386_OpLeq16U(v *Value) bool {
8012	v_1 := v.Args[1]
8013	v_0 := v.Args[0]
8014	b := v.Block
8015	// match: (Leq16U x y)
8016	// result: (SETBE (CMPW x y))
8017	for {
8018		x := v_0
8019		y := v_1
8020		v.reset(Op386SETBE)
8021		v0 := b.NewValue0(v.Pos, Op386CMPW, types.TypeFlags)
8022		v0.AddArg2(x, y)
8023		v.AddArg(v0)
8024		return true
8025	}
8026}
8027func rewriteValue386_OpLeq32(v *Value) bool {
8028	v_1 := v.Args[1]
8029	v_0 := v.Args[0]
8030	b := v.Block
8031	// match: (Leq32 x y)
8032	// result: (SETLE (CMPL x y))
8033	for {
8034		x := v_0
8035		y := v_1
8036		v.reset(Op386SETLE)
8037		v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags)
8038		v0.AddArg2(x, y)
8039		v.AddArg(v0)
8040		return true
8041	}
8042}
8043func rewriteValue386_OpLeq32F(v *Value) bool {
8044	v_1 := v.Args[1]
8045	v_0 := v.Args[0]
8046	b := v.Block
8047	// match: (Leq32F x y)
8048	// result: (SETGEF (UCOMISS y x))
8049	for {
8050		x := v_0
8051		y := v_1
8052		v.reset(Op386SETGEF)
8053		v0 := b.NewValue0(v.Pos, Op386UCOMISS, types.TypeFlags)
8054		v0.AddArg2(y, x)
8055		v.AddArg(v0)
8056		return true
8057	}
8058}
8059func rewriteValue386_OpLeq32U(v *Value) bool {
8060	v_1 := v.Args[1]
8061	v_0 := v.Args[0]
8062	b := v.Block
8063	// match: (Leq32U x y)
8064	// result: (SETBE (CMPL x y))
8065	for {
8066		x := v_0
8067		y := v_1
8068		v.reset(Op386SETBE)
8069		v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags)
8070		v0.AddArg2(x, y)
8071		v.AddArg(v0)
8072		return true
8073	}
8074}
8075func rewriteValue386_OpLeq64F(v *Value) bool {
8076	v_1 := v.Args[1]
8077	v_0 := v.Args[0]
8078	b := v.Block
8079	// match: (Leq64F x y)
8080	// result: (SETGEF (UCOMISD y x))
8081	for {
8082		x := v_0
8083		y := v_1
8084		v.reset(Op386SETGEF)
8085		v0 := b.NewValue0(v.Pos, Op386UCOMISD, types.TypeFlags)
8086		v0.AddArg2(y, x)
8087		v.AddArg(v0)
8088		return true
8089	}
8090}
8091func rewriteValue386_OpLeq8(v *Value) bool {
8092	v_1 := v.Args[1]
8093	v_0 := v.Args[0]
8094	b := v.Block
8095	// match: (Leq8 x y)
8096	// result: (SETLE (CMPB x y))
8097	for {
8098		x := v_0
8099		y := v_1
8100		v.reset(Op386SETLE)
8101		v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags)
8102		v0.AddArg2(x, y)
8103		v.AddArg(v0)
8104		return true
8105	}
8106}
8107func rewriteValue386_OpLeq8U(v *Value) bool {
8108	v_1 := v.Args[1]
8109	v_0 := v.Args[0]
8110	b := v.Block
8111	// match: (Leq8U x y)
8112	// result: (SETBE (CMPB x y))
8113	for {
8114		x := v_0
8115		y := v_1
8116		v.reset(Op386SETBE)
8117		v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags)
8118		v0.AddArg2(x, y)
8119		v.AddArg(v0)
8120		return true
8121	}
8122}
8123func rewriteValue386_OpLess16(v *Value) bool {
8124	v_1 := v.Args[1]
8125	v_0 := v.Args[0]
8126	b := v.Block
8127	// match: (Less16 x y)
8128	// result: (SETL (CMPW x y))
8129	for {
8130		x := v_0
8131		y := v_1
8132		v.reset(Op386SETL)
8133		v0 := b.NewValue0(v.Pos, Op386CMPW, types.TypeFlags)
8134		v0.AddArg2(x, y)
8135		v.AddArg(v0)
8136		return true
8137	}
8138}
8139func rewriteValue386_OpLess16U(v *Value) bool {
8140	v_1 := v.Args[1]
8141	v_0 := v.Args[0]
8142	b := v.Block
8143	// match: (Less16U x y)
8144	// result: (SETB (CMPW x y))
8145	for {
8146		x := v_0
8147		y := v_1
8148		v.reset(Op386SETB)
8149		v0 := b.NewValue0(v.Pos, Op386CMPW, types.TypeFlags)
8150		v0.AddArg2(x, y)
8151		v.AddArg(v0)
8152		return true
8153	}
8154}
8155func rewriteValue386_OpLess32(v *Value) bool {
8156	v_1 := v.Args[1]
8157	v_0 := v.Args[0]
8158	b := v.Block
8159	// match: (Less32 x y)
8160	// result: (SETL (CMPL x y))
8161	for {
8162		x := v_0
8163		y := v_1
8164		v.reset(Op386SETL)
8165		v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags)
8166		v0.AddArg2(x, y)
8167		v.AddArg(v0)
8168		return true
8169	}
8170}
8171func rewriteValue386_OpLess32F(v *Value) bool {
8172	v_1 := v.Args[1]
8173	v_0 := v.Args[0]
8174	b := v.Block
8175	// match: (Less32F x y)
8176	// result: (SETGF (UCOMISS y x))
8177	for {
8178		x := v_0
8179		y := v_1
8180		v.reset(Op386SETGF)
8181		v0 := b.NewValue0(v.Pos, Op386UCOMISS, types.TypeFlags)
8182		v0.AddArg2(y, x)
8183		v.AddArg(v0)
8184		return true
8185	}
8186}
8187func rewriteValue386_OpLess32U(v *Value) bool {
8188	v_1 := v.Args[1]
8189	v_0 := v.Args[0]
8190	b := v.Block
8191	// match: (Less32U x y)
8192	// result: (SETB (CMPL x y))
8193	for {
8194		x := v_0
8195		y := v_1
8196		v.reset(Op386SETB)
8197		v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags)
8198		v0.AddArg2(x, y)
8199		v.AddArg(v0)
8200		return true
8201	}
8202}
8203func rewriteValue386_OpLess64F(v *Value) bool {
8204	v_1 := v.Args[1]
8205	v_0 := v.Args[0]
8206	b := v.Block
8207	// match: (Less64F x y)
8208	// result: (SETGF (UCOMISD y x))
8209	for {
8210		x := v_0
8211		y := v_1
8212		v.reset(Op386SETGF)
8213		v0 := b.NewValue0(v.Pos, Op386UCOMISD, types.TypeFlags)
8214		v0.AddArg2(y, x)
8215		v.AddArg(v0)
8216		return true
8217	}
8218}
8219func rewriteValue386_OpLess8(v *Value) bool {
8220	v_1 := v.Args[1]
8221	v_0 := v.Args[0]
8222	b := v.Block
8223	// match: (Less8 x y)
8224	// result: (SETL (CMPB x y))
8225	for {
8226		x := v_0
8227		y := v_1
8228		v.reset(Op386SETL)
8229		v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags)
8230		v0.AddArg2(x, y)
8231		v.AddArg(v0)
8232		return true
8233	}
8234}
8235func rewriteValue386_OpLess8U(v *Value) bool {
8236	v_1 := v.Args[1]
8237	v_0 := v.Args[0]
8238	b := v.Block
8239	// match: (Less8U x y)
8240	// result: (SETB (CMPB x y))
8241	for {
8242		x := v_0
8243		y := v_1
8244		v.reset(Op386SETB)
8245		v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags)
8246		v0.AddArg2(x, y)
8247		v.AddArg(v0)
8248		return true
8249	}
8250}
8251func rewriteValue386_OpLoad(v *Value) bool {
8252	v_1 := v.Args[1]
8253	v_0 := v.Args[0]
8254	// match: (Load <t> ptr mem)
8255	// cond: (is32BitInt(t) || isPtr(t))
8256	// result: (MOVLload ptr mem)
8257	for {
8258		t := v.Type
8259		ptr := v_0
8260		mem := v_1
8261		if !(is32BitInt(t) || isPtr(t)) {
8262			break
8263		}
8264		v.reset(Op386MOVLload)
8265		v.AddArg2(ptr, mem)
8266		return true
8267	}
8268	// match: (Load <t> ptr mem)
8269	// cond: is16BitInt(t)
8270	// result: (MOVWload ptr mem)
8271	for {
8272		t := v.Type
8273		ptr := v_0
8274		mem := v_1
8275		if !(is16BitInt(t)) {
8276			break
8277		}
8278		v.reset(Op386MOVWload)
8279		v.AddArg2(ptr, mem)
8280		return true
8281	}
8282	// match: (Load <t> ptr mem)
8283	// cond: (t.IsBoolean() || is8BitInt(t))
8284	// result: (MOVBload ptr mem)
8285	for {
8286		t := v.Type
8287		ptr := v_0
8288		mem := v_1
8289		if !(t.IsBoolean() || is8BitInt(t)) {
8290			break
8291		}
8292		v.reset(Op386MOVBload)
8293		v.AddArg2(ptr, mem)
8294		return true
8295	}
8296	// match: (Load <t> ptr mem)
8297	// cond: is32BitFloat(t)
8298	// result: (MOVSSload ptr mem)
8299	for {
8300		t := v.Type
8301		ptr := v_0
8302		mem := v_1
8303		if !(is32BitFloat(t)) {
8304			break
8305		}
8306		v.reset(Op386MOVSSload)
8307		v.AddArg2(ptr, mem)
8308		return true
8309	}
8310	// match: (Load <t> ptr mem)
8311	// cond: is64BitFloat(t)
8312	// result: (MOVSDload ptr mem)
8313	for {
8314		t := v.Type
8315		ptr := v_0
8316		mem := v_1
8317		if !(is64BitFloat(t)) {
8318			break
8319		}
8320		v.reset(Op386MOVSDload)
8321		v.AddArg2(ptr, mem)
8322		return true
8323	}
8324	return false
8325}
8326func rewriteValue386_OpLocalAddr(v *Value) bool {
8327	v_1 := v.Args[1]
8328	v_0 := v.Args[0]
8329	b := v.Block
8330	typ := &b.Func.Config.Types
8331	// match: (LocalAddr <t> {sym} base mem)
8332	// cond: t.Elem().HasPointers()
8333	// result: (LEAL {sym} (SPanchored base mem))
8334	for {
8335		t := v.Type
8336		sym := auxToSym(v.Aux)
8337		base := v_0
8338		mem := v_1
8339		if !(t.Elem().HasPointers()) {
8340			break
8341		}
8342		v.reset(Op386LEAL)
8343		v.Aux = symToAux(sym)
8344		v0 := b.NewValue0(v.Pos, OpSPanchored, typ.Uintptr)
8345		v0.AddArg2(base, mem)
8346		v.AddArg(v0)
8347		return true
8348	}
8349	// match: (LocalAddr <t> {sym} base _)
8350	// cond: !t.Elem().HasPointers()
8351	// result: (LEAL {sym} base)
8352	for {
8353		t := v.Type
8354		sym := auxToSym(v.Aux)
8355		base := v_0
8356		if !(!t.Elem().HasPointers()) {
8357			break
8358		}
8359		v.reset(Op386LEAL)
8360		v.Aux = symToAux(sym)
8361		v.AddArg(base)
8362		return true
8363	}
8364	return false
8365}
8366func rewriteValue386_OpLsh16x16(v *Value) bool {
8367	v_1 := v.Args[1]
8368	v_0 := v.Args[0]
8369	b := v.Block
8370	// match: (Lsh16x16 <t> x y)
8371	// cond: !shiftIsBounded(v)
8372	// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPWconst y [32])))
8373	for {
8374		t := v.Type
8375		x := v_0
8376		y := v_1
8377		if !(!shiftIsBounded(v)) {
8378			break
8379		}
8380		v.reset(Op386ANDL)
8381		v0 := b.NewValue0(v.Pos, Op386SHLL, t)
8382		v0.AddArg2(x, y)
8383		v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t)
8384		v2 := b.NewValue0(v.Pos, Op386CMPWconst, types.TypeFlags)
8385		v2.AuxInt = int16ToAuxInt(32)
8386		v2.AddArg(y)
8387		v1.AddArg(v2)
8388		v.AddArg2(v0, v1)
8389		return true
8390	}
8391	// match: (Lsh16x16 <t> x y)
8392	// cond: shiftIsBounded(v)
8393	// result: (SHLL <t> x y)
8394	for {
8395		t := v.Type
8396		x := v_0
8397		y := v_1
8398		if !(shiftIsBounded(v)) {
8399			break
8400		}
8401		v.reset(Op386SHLL)
8402		v.Type = t
8403		v.AddArg2(x, y)
8404		return true
8405	}
8406	return false
8407}
8408func rewriteValue386_OpLsh16x32(v *Value) bool {
8409	v_1 := v.Args[1]
8410	v_0 := v.Args[0]
8411	b := v.Block
8412	// match: (Lsh16x32 <t> x y)
8413	// cond: !shiftIsBounded(v)
8414	// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPLconst y [32])))
8415	for {
8416		t := v.Type
8417		x := v_0
8418		y := v_1
8419		if !(!shiftIsBounded(v)) {
8420			break
8421		}
8422		v.reset(Op386ANDL)
8423		v0 := b.NewValue0(v.Pos, Op386SHLL, t)
8424		v0.AddArg2(x, y)
8425		v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t)
8426		v2 := b.NewValue0(v.Pos, Op386CMPLconst, types.TypeFlags)
8427		v2.AuxInt = int32ToAuxInt(32)
8428		v2.AddArg(y)
8429		v1.AddArg(v2)
8430		v.AddArg2(v0, v1)
8431		return true
8432	}
8433	// match: (Lsh16x32 <t> x y)
8434	// cond: shiftIsBounded(v)
8435	// result: (SHLL <t> x y)
8436	for {
8437		t := v.Type
8438		x := v_0
8439		y := v_1
8440		if !(shiftIsBounded(v)) {
8441			break
8442		}
8443		v.reset(Op386SHLL)
8444		v.Type = t
8445		v.AddArg2(x, y)
8446		return true
8447	}
8448	return false
8449}
8450func rewriteValue386_OpLsh16x64(v *Value) bool {
8451	v_1 := v.Args[1]
8452	v_0 := v.Args[0]
8453	// match: (Lsh16x64 x (Const64 [c]))
8454	// cond: uint64(c) < 16
8455	// result: (SHLLconst x [int32(c)])
8456	for {
8457		x := v_0
8458		if v_1.Op != OpConst64 {
8459			break
8460		}
8461		c := auxIntToInt64(v_1.AuxInt)
8462		if !(uint64(c) < 16) {
8463			break
8464		}
8465		v.reset(Op386SHLLconst)
8466		v.AuxInt = int32ToAuxInt(int32(c))
8467		v.AddArg(x)
8468		return true
8469	}
8470	// match: (Lsh16x64 _ (Const64 [c]))
8471	// cond: uint64(c) >= 16
8472	// result: (Const16 [0])
8473	for {
8474		if v_1.Op != OpConst64 {
8475			break
8476		}
8477		c := auxIntToInt64(v_1.AuxInt)
8478		if !(uint64(c) >= 16) {
8479			break
8480		}
8481		v.reset(OpConst16)
8482		v.AuxInt = int16ToAuxInt(0)
8483		return true
8484	}
8485	return false
8486}
8487func rewriteValue386_OpLsh16x8(v *Value) bool {
8488	v_1 := v.Args[1]
8489	v_0 := v.Args[0]
8490	b := v.Block
8491	// match: (Lsh16x8 <t> x y)
8492	// cond: !shiftIsBounded(v)
8493	// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPBconst y [32])))
8494	for {
8495		t := v.Type
8496		x := v_0
8497		y := v_1
8498		if !(!shiftIsBounded(v)) {
8499			break
8500		}
8501		v.reset(Op386ANDL)
8502		v0 := b.NewValue0(v.Pos, Op386SHLL, t)
8503		v0.AddArg2(x, y)
8504		v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t)
8505		v2 := b.NewValue0(v.Pos, Op386CMPBconst, types.TypeFlags)
8506		v2.AuxInt = int8ToAuxInt(32)
8507		v2.AddArg(y)
8508		v1.AddArg(v2)
8509		v.AddArg2(v0, v1)
8510		return true
8511	}
8512	// match: (Lsh16x8 <t> x y)
8513	// cond: shiftIsBounded(v)
8514	// result: (SHLL <t> x y)
8515	for {
8516		t := v.Type
8517		x := v_0
8518		y := v_1
8519		if !(shiftIsBounded(v)) {
8520			break
8521		}
8522		v.reset(Op386SHLL)
8523		v.Type = t
8524		v.AddArg2(x, y)
8525		return true
8526	}
8527	return false
8528}
8529func rewriteValue386_OpLsh32x16(v *Value) bool {
8530	v_1 := v.Args[1]
8531	v_0 := v.Args[0]
8532	b := v.Block
8533	// match: (Lsh32x16 <t> x y)
8534	// cond: !shiftIsBounded(v)
8535	// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPWconst y [32])))
8536	for {
8537		t := v.Type
8538		x := v_0
8539		y := v_1
8540		if !(!shiftIsBounded(v)) {
8541			break
8542		}
8543		v.reset(Op386ANDL)
8544		v0 := b.NewValue0(v.Pos, Op386SHLL, t)
8545		v0.AddArg2(x, y)
8546		v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t)
8547		v2 := b.NewValue0(v.Pos, Op386CMPWconst, types.TypeFlags)
8548		v2.AuxInt = int16ToAuxInt(32)
8549		v2.AddArg(y)
8550		v1.AddArg(v2)
8551		v.AddArg2(v0, v1)
8552		return true
8553	}
8554	// match: (Lsh32x16 <t> x y)
8555	// cond: shiftIsBounded(v)
8556	// result: (SHLL <t> x y)
8557	for {
8558		t := v.Type
8559		x := v_0
8560		y := v_1
8561		if !(shiftIsBounded(v)) {
8562			break
8563		}
8564		v.reset(Op386SHLL)
8565		v.Type = t
8566		v.AddArg2(x, y)
8567		return true
8568	}
8569	return false
8570}
8571func rewriteValue386_OpLsh32x32(v *Value) bool {
8572	v_1 := v.Args[1]
8573	v_0 := v.Args[0]
8574	b := v.Block
8575	// match: (Lsh32x32 <t> x y)
8576	// cond: !shiftIsBounded(v)
8577	// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPLconst y [32])))
8578	for {
8579		t := v.Type
8580		x := v_0
8581		y := v_1
8582		if !(!shiftIsBounded(v)) {
8583			break
8584		}
8585		v.reset(Op386ANDL)
8586		v0 := b.NewValue0(v.Pos, Op386SHLL, t)
8587		v0.AddArg2(x, y)
8588		v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t)
8589		v2 := b.NewValue0(v.Pos, Op386CMPLconst, types.TypeFlags)
8590		v2.AuxInt = int32ToAuxInt(32)
8591		v2.AddArg(y)
8592		v1.AddArg(v2)
8593		v.AddArg2(v0, v1)
8594		return true
8595	}
8596	// match: (Lsh32x32 <t> x y)
8597	// cond: shiftIsBounded(v)
8598	// result: (SHLL <t> x y)
8599	for {
8600		t := v.Type
8601		x := v_0
8602		y := v_1
8603		if !(shiftIsBounded(v)) {
8604			break
8605		}
8606		v.reset(Op386SHLL)
8607		v.Type = t
8608		v.AddArg2(x, y)
8609		return true
8610	}
8611	return false
8612}
8613func rewriteValue386_OpLsh32x64(v *Value) bool {
8614	v_1 := v.Args[1]
8615	v_0 := v.Args[0]
8616	// match: (Lsh32x64 x (Const64 [c]))
8617	// cond: uint64(c) < 32
8618	// result: (SHLLconst x [int32(c)])
8619	for {
8620		x := v_0
8621		if v_1.Op != OpConst64 {
8622			break
8623		}
8624		c := auxIntToInt64(v_1.AuxInt)
8625		if !(uint64(c) < 32) {
8626			break
8627		}
8628		v.reset(Op386SHLLconst)
8629		v.AuxInt = int32ToAuxInt(int32(c))
8630		v.AddArg(x)
8631		return true
8632	}
8633	// match: (Lsh32x64 _ (Const64 [c]))
8634	// cond: uint64(c) >= 32
8635	// result: (Const32 [0])
8636	for {
8637		if v_1.Op != OpConst64 {
8638			break
8639		}
8640		c := auxIntToInt64(v_1.AuxInt)
8641		if !(uint64(c) >= 32) {
8642			break
8643		}
8644		v.reset(OpConst32)
8645		v.AuxInt = int32ToAuxInt(0)
8646		return true
8647	}
8648	return false
8649}
8650func rewriteValue386_OpLsh32x8(v *Value) bool {
8651	v_1 := v.Args[1]
8652	v_0 := v.Args[0]
8653	b := v.Block
8654	// match: (Lsh32x8 <t> x y)
8655	// cond: !shiftIsBounded(v)
8656	// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPBconst y [32])))
8657	for {
8658		t := v.Type
8659		x := v_0
8660		y := v_1
8661		if !(!shiftIsBounded(v)) {
8662			break
8663		}
8664		v.reset(Op386ANDL)
8665		v0 := b.NewValue0(v.Pos, Op386SHLL, t)
8666		v0.AddArg2(x, y)
8667		v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t)
8668		v2 := b.NewValue0(v.Pos, Op386CMPBconst, types.TypeFlags)
8669		v2.AuxInt = int8ToAuxInt(32)
8670		v2.AddArg(y)
8671		v1.AddArg(v2)
8672		v.AddArg2(v0, v1)
8673		return true
8674	}
8675	// match: (Lsh32x8 <t> x y)
8676	// cond: shiftIsBounded(v)
8677	// result: (SHLL <t> x y)
8678	for {
8679		t := v.Type
8680		x := v_0
8681		y := v_1
8682		if !(shiftIsBounded(v)) {
8683			break
8684		}
8685		v.reset(Op386SHLL)
8686		v.Type = t
8687		v.AddArg2(x, y)
8688		return true
8689	}
8690	return false
8691}
8692func rewriteValue386_OpLsh8x16(v *Value) bool {
8693	v_1 := v.Args[1]
8694	v_0 := v.Args[0]
8695	b := v.Block
8696	// match: (Lsh8x16 <t> x y)
8697	// cond: !shiftIsBounded(v)
8698	// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPWconst y [32])))
8699	for {
8700		t := v.Type
8701		x := v_0
8702		y := v_1
8703		if !(!shiftIsBounded(v)) {
8704			break
8705		}
8706		v.reset(Op386ANDL)
8707		v0 := b.NewValue0(v.Pos, Op386SHLL, t)
8708		v0.AddArg2(x, y)
8709		v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t)
8710		v2 := b.NewValue0(v.Pos, Op386CMPWconst, types.TypeFlags)
8711		v2.AuxInt = int16ToAuxInt(32)
8712		v2.AddArg(y)
8713		v1.AddArg(v2)
8714		v.AddArg2(v0, v1)
8715		return true
8716	}
8717	// match: (Lsh8x16 <t> x y)
8718	// cond: shiftIsBounded(v)
8719	// result: (SHLL <t> x y)
8720	for {
8721		t := v.Type
8722		x := v_0
8723		y := v_1
8724		if !(shiftIsBounded(v)) {
8725			break
8726		}
8727		v.reset(Op386SHLL)
8728		v.Type = t
8729		v.AddArg2(x, y)
8730		return true
8731	}
8732	return false
8733}
8734func rewriteValue386_OpLsh8x32(v *Value) bool {
8735	v_1 := v.Args[1]
8736	v_0 := v.Args[0]
8737	b := v.Block
8738	// match: (Lsh8x32 <t> x y)
8739	// cond: !shiftIsBounded(v)
8740	// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPLconst y [32])))
8741	for {
8742		t := v.Type
8743		x := v_0
8744		y := v_1
8745		if !(!shiftIsBounded(v)) {
8746			break
8747		}
8748		v.reset(Op386ANDL)
8749		v0 := b.NewValue0(v.Pos, Op386SHLL, t)
8750		v0.AddArg2(x, y)
8751		v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t)
8752		v2 := b.NewValue0(v.Pos, Op386CMPLconst, types.TypeFlags)
8753		v2.AuxInt = int32ToAuxInt(32)
8754		v2.AddArg(y)
8755		v1.AddArg(v2)
8756		v.AddArg2(v0, v1)
8757		return true
8758	}
8759	// match: (Lsh8x32 <t> x y)
8760	// cond: shiftIsBounded(v)
8761	// result: (SHLL <t> x y)
8762	for {
8763		t := v.Type
8764		x := v_0
8765		y := v_1
8766		if !(shiftIsBounded(v)) {
8767			break
8768		}
8769		v.reset(Op386SHLL)
8770		v.Type = t
8771		v.AddArg2(x, y)
8772		return true
8773	}
8774	return false
8775}
8776func rewriteValue386_OpLsh8x64(v *Value) bool {
8777	v_1 := v.Args[1]
8778	v_0 := v.Args[0]
8779	// match: (Lsh8x64 x (Const64 [c]))
8780	// cond: uint64(c) < 8
8781	// result: (SHLLconst x [int32(c)])
8782	for {
8783		x := v_0
8784		if v_1.Op != OpConst64 {
8785			break
8786		}
8787		c := auxIntToInt64(v_1.AuxInt)
8788		if !(uint64(c) < 8) {
8789			break
8790		}
8791		v.reset(Op386SHLLconst)
8792		v.AuxInt = int32ToAuxInt(int32(c))
8793		v.AddArg(x)
8794		return true
8795	}
8796	// match: (Lsh8x64 _ (Const64 [c]))
8797	// cond: uint64(c) >= 8
8798	// result: (Const8 [0])
8799	for {
8800		if v_1.Op != OpConst64 {
8801			break
8802		}
8803		c := auxIntToInt64(v_1.AuxInt)
8804		if !(uint64(c) >= 8) {
8805			break
8806		}
8807		v.reset(OpConst8)
8808		v.AuxInt = int8ToAuxInt(0)
8809		return true
8810	}
8811	return false
8812}
8813func rewriteValue386_OpLsh8x8(v *Value) bool {
8814	v_1 := v.Args[1]
8815	v_0 := v.Args[0]
8816	b := v.Block
8817	// match: (Lsh8x8 <t> x y)
8818	// cond: !shiftIsBounded(v)
8819	// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPBconst y [32])))
8820	for {
8821		t := v.Type
8822		x := v_0
8823		y := v_1
8824		if !(!shiftIsBounded(v)) {
8825			break
8826		}
8827		v.reset(Op386ANDL)
8828		v0 := b.NewValue0(v.Pos, Op386SHLL, t)
8829		v0.AddArg2(x, y)
8830		v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t)
8831		v2 := b.NewValue0(v.Pos, Op386CMPBconst, types.TypeFlags)
8832		v2.AuxInt = int8ToAuxInt(32)
8833		v2.AddArg(y)
8834		v1.AddArg(v2)
8835		v.AddArg2(v0, v1)
8836		return true
8837	}
8838	// match: (Lsh8x8 <t> x y)
8839	// cond: shiftIsBounded(v)
8840	// result: (SHLL <t> x y)
8841	for {
8842		t := v.Type
8843		x := v_0
8844		y := v_1
8845		if !(shiftIsBounded(v)) {
8846			break
8847		}
8848		v.reset(Op386SHLL)
8849		v.Type = t
8850		v.AddArg2(x, y)
8851		return true
8852	}
8853	return false
8854}
8855func rewriteValue386_OpMod8(v *Value) bool {
8856	v_1 := v.Args[1]
8857	v_0 := v.Args[0]
8858	b := v.Block
8859	typ := &b.Func.Config.Types
8860	// match: (Mod8 x y)
8861	// result: (MODW (SignExt8to16 x) (SignExt8to16 y))
8862	for {
8863		x := v_0
8864		y := v_1
8865		v.reset(Op386MODW)
8866		v0 := b.NewValue0(v.Pos, OpSignExt8to16, typ.Int16)
8867		v0.AddArg(x)
8868		v1 := b.NewValue0(v.Pos, OpSignExt8to16, typ.Int16)
8869		v1.AddArg(y)
8870		v.AddArg2(v0, v1)
8871		return true
8872	}
8873}
8874func rewriteValue386_OpMod8u(v *Value) bool {
8875	v_1 := v.Args[1]
8876	v_0 := v.Args[0]
8877	b := v.Block
8878	typ := &b.Func.Config.Types
8879	// match: (Mod8u x y)
8880	// result: (MODWU (ZeroExt8to16 x) (ZeroExt8to16 y))
8881	for {
8882		x := v_0
8883		y := v_1
8884		v.reset(Op386MODWU)
8885		v0 := b.NewValue0(v.Pos, OpZeroExt8to16, typ.UInt16)
8886		v0.AddArg(x)
8887		v1 := b.NewValue0(v.Pos, OpZeroExt8to16, typ.UInt16)
8888		v1.AddArg(y)
8889		v.AddArg2(v0, v1)
8890		return true
8891	}
8892}
8893func rewriteValue386_OpMove(v *Value) bool {
8894	v_2 := v.Args[2]
8895	v_1 := v.Args[1]
8896	v_0 := v.Args[0]
8897	b := v.Block
8898	config := b.Func.Config
8899	typ := &b.Func.Config.Types
8900	// match: (Move [0] _ _ mem)
8901	// result: mem
8902	for {
8903		if auxIntToInt64(v.AuxInt) != 0 {
8904			break
8905		}
8906		mem := v_2
8907		v.copyOf(mem)
8908		return true
8909	}
8910	// match: (Move [1] dst src mem)
8911	// result: (MOVBstore dst (MOVBload src mem) mem)
8912	for {
8913		if auxIntToInt64(v.AuxInt) != 1 {
8914			break
8915		}
8916		dst := v_0
8917		src := v_1
8918		mem := v_2
8919		v.reset(Op386MOVBstore)
8920		v0 := b.NewValue0(v.Pos, Op386MOVBload, typ.UInt8)
8921		v0.AddArg2(src, mem)
8922		v.AddArg3(dst, v0, mem)
8923		return true
8924	}
8925	// match: (Move [2] dst src mem)
8926	// result: (MOVWstore dst (MOVWload src mem) mem)
8927	for {
8928		if auxIntToInt64(v.AuxInt) != 2 {
8929			break
8930		}
8931		dst := v_0
8932		src := v_1
8933		mem := v_2
8934		v.reset(Op386MOVWstore)
8935		v0 := b.NewValue0(v.Pos, Op386MOVWload, typ.UInt16)
8936		v0.AddArg2(src, mem)
8937		v.AddArg3(dst, v0, mem)
8938		return true
8939	}
8940	// match: (Move [4] dst src mem)
8941	// result: (MOVLstore dst (MOVLload src mem) mem)
8942	for {
8943		if auxIntToInt64(v.AuxInt) != 4 {
8944			break
8945		}
8946		dst := v_0
8947		src := v_1
8948		mem := v_2
8949		v.reset(Op386MOVLstore)
8950		v0 := b.NewValue0(v.Pos, Op386MOVLload, typ.UInt32)
8951		v0.AddArg2(src, mem)
8952		v.AddArg3(dst, v0, mem)
8953		return true
8954	}
8955	// match: (Move [3] dst src mem)
8956	// result: (MOVBstore [2] dst (MOVBload [2] src mem) (MOVWstore dst (MOVWload src mem) mem))
8957	for {
8958		if auxIntToInt64(v.AuxInt) != 3 {
8959			break
8960		}
8961		dst := v_0
8962		src := v_1
8963		mem := v_2
8964		v.reset(Op386MOVBstore)
8965		v.AuxInt = int32ToAuxInt(2)
8966		v0 := b.NewValue0(v.Pos, Op386MOVBload, typ.UInt8)
8967		v0.AuxInt = int32ToAuxInt(2)
8968		v0.AddArg2(src, mem)
8969		v1 := b.NewValue0(v.Pos, Op386MOVWstore, types.TypeMem)
8970		v2 := b.NewValue0(v.Pos, Op386MOVWload, typ.UInt16)
8971		v2.AddArg2(src, mem)
8972		v1.AddArg3(dst, v2, mem)
8973		v.AddArg3(dst, v0, v1)
8974		return true
8975	}
8976	// match: (Move [5] dst src mem)
8977	// result: (MOVBstore [4] dst (MOVBload [4] src mem) (MOVLstore dst (MOVLload src mem) mem))
8978	for {
8979		if auxIntToInt64(v.AuxInt) != 5 {
8980			break
8981		}
8982		dst := v_0
8983		src := v_1
8984		mem := v_2
8985		v.reset(Op386MOVBstore)
8986		v.AuxInt = int32ToAuxInt(4)
8987		v0 := b.NewValue0(v.Pos, Op386MOVBload, typ.UInt8)
8988		v0.AuxInt = int32ToAuxInt(4)
8989		v0.AddArg2(src, mem)
8990		v1 := b.NewValue0(v.Pos, Op386MOVLstore, types.TypeMem)
8991		v2 := b.NewValue0(v.Pos, Op386MOVLload, typ.UInt32)
8992		v2.AddArg2(src, mem)
8993		v1.AddArg3(dst, v2, mem)
8994		v.AddArg3(dst, v0, v1)
8995		return true
8996	}
8997	// match: (Move [6] dst src mem)
8998	// result: (MOVWstore [4] dst (MOVWload [4] src mem) (MOVLstore dst (MOVLload src mem) mem))
8999	for {
9000		if auxIntToInt64(v.AuxInt) != 6 {
9001			break
9002		}
9003		dst := v_0
9004		src := v_1
9005		mem := v_2
9006		v.reset(Op386MOVWstore)
9007		v.AuxInt = int32ToAuxInt(4)
9008		v0 := b.NewValue0(v.Pos, Op386MOVWload, typ.UInt16)
9009		v0.AuxInt = int32ToAuxInt(4)
9010		v0.AddArg2(src, mem)
9011		v1 := b.NewValue0(v.Pos, Op386MOVLstore, types.TypeMem)
9012		v2 := b.NewValue0(v.Pos, Op386MOVLload, typ.UInt32)
9013		v2.AddArg2(src, mem)
9014		v1.AddArg3(dst, v2, mem)
9015		v.AddArg3(dst, v0, v1)
9016		return true
9017	}
9018	// match: (Move [7] dst src mem)
9019	// result: (MOVLstore [3] dst (MOVLload [3] src mem) (MOVLstore dst (MOVLload src mem) mem))
9020	for {
9021		if auxIntToInt64(v.AuxInt) != 7 {
9022			break
9023		}
9024		dst := v_0
9025		src := v_1
9026		mem := v_2
9027		v.reset(Op386MOVLstore)
9028		v.AuxInt = int32ToAuxInt(3)
9029		v0 := b.NewValue0(v.Pos, Op386MOVLload, typ.UInt32)
9030		v0.AuxInt = int32ToAuxInt(3)
9031		v0.AddArg2(src, mem)
9032		v1 := b.NewValue0(v.Pos, Op386MOVLstore, types.TypeMem)
9033		v2 := b.NewValue0(v.Pos, Op386MOVLload, typ.UInt32)
9034		v2.AddArg2(src, mem)
9035		v1.AddArg3(dst, v2, mem)
9036		v.AddArg3(dst, v0, v1)
9037		return true
9038	}
9039	// match: (Move [8] dst src mem)
9040	// result: (MOVLstore [4] dst (MOVLload [4] src mem) (MOVLstore dst (MOVLload src mem) mem))
9041	for {
9042		if auxIntToInt64(v.AuxInt) != 8 {
9043			break
9044		}
9045		dst := v_0
9046		src := v_1
9047		mem := v_2
9048		v.reset(Op386MOVLstore)
9049		v.AuxInt = int32ToAuxInt(4)
9050		v0 := b.NewValue0(v.Pos, Op386MOVLload, typ.UInt32)
9051		v0.AuxInt = int32ToAuxInt(4)
9052		v0.AddArg2(src, mem)
9053		v1 := b.NewValue0(v.Pos, Op386MOVLstore, types.TypeMem)
9054		v2 := b.NewValue0(v.Pos, Op386MOVLload, typ.UInt32)
9055		v2.AddArg2(src, mem)
9056		v1.AddArg3(dst, v2, mem)
9057		v.AddArg3(dst, v0, v1)
9058		return true
9059	}
9060	// match: (Move [s] dst src mem)
9061	// cond: s > 8 && s%4 != 0
9062	// result: (Move [s-s%4] (ADDLconst <dst.Type> dst [int32(s%4)]) (ADDLconst <src.Type> src [int32(s%4)]) (MOVLstore dst (MOVLload src mem) mem))
9063	for {
9064		s := auxIntToInt64(v.AuxInt)
9065		dst := v_0
9066		src := v_1
9067		mem := v_2
9068		if !(s > 8 && s%4 != 0) {
9069			break
9070		}
9071		v.reset(OpMove)
9072		v.AuxInt = int64ToAuxInt(s - s%4)
9073		v0 := b.NewValue0(v.Pos, Op386ADDLconst, dst.Type)
9074		v0.AuxInt = int32ToAuxInt(int32(s % 4))
9075		v0.AddArg(dst)
9076		v1 := b.NewValue0(v.Pos, Op386ADDLconst, src.Type)
9077		v1.AuxInt = int32ToAuxInt(int32(s % 4))
9078		v1.AddArg(src)
9079		v2 := b.NewValue0(v.Pos, Op386MOVLstore, types.TypeMem)
9080		v3 := b.NewValue0(v.Pos, Op386MOVLload, typ.UInt32)
9081		v3.AddArg2(src, mem)
9082		v2.AddArg3(dst, v3, mem)
9083		v.AddArg3(v0, v1, v2)
9084		return true
9085	}
9086	// match: (Move [s] dst src mem)
9087	// cond: s > 8 && s <= 4*128 && s%4 == 0 && !config.noDuffDevice && logLargeCopy(v, s)
9088	// result: (DUFFCOPY [10*(128-s/4)] dst src mem)
9089	for {
9090		s := auxIntToInt64(v.AuxInt)
9091		dst := v_0
9092		src := v_1
9093		mem := v_2
9094		if !(s > 8 && s <= 4*128 && s%4 == 0 && !config.noDuffDevice && logLargeCopy(v, s)) {
9095			break
9096		}
9097		v.reset(Op386DUFFCOPY)
9098		v.AuxInt = int64ToAuxInt(10 * (128 - s/4))
9099		v.AddArg3(dst, src, mem)
9100		return true
9101	}
9102	// match: (Move [s] dst src mem)
9103	// cond: (s > 4*128 || config.noDuffDevice) && s%4 == 0 && logLargeCopy(v, s)
9104	// result: (REPMOVSL dst src (MOVLconst [int32(s/4)]) mem)
9105	for {
9106		s := auxIntToInt64(v.AuxInt)
9107		dst := v_0
9108		src := v_1
9109		mem := v_2
9110		if !((s > 4*128 || config.noDuffDevice) && s%4 == 0 && logLargeCopy(v, s)) {
9111			break
9112		}
9113		v.reset(Op386REPMOVSL)
9114		v0 := b.NewValue0(v.Pos, Op386MOVLconst, typ.UInt32)
9115		v0.AuxInt = int32ToAuxInt(int32(s / 4))
9116		v.AddArg4(dst, src, v0, mem)
9117		return true
9118	}
9119	return false
9120}
9121func rewriteValue386_OpNeg32F(v *Value) bool {
9122	v_0 := v.Args[0]
9123	b := v.Block
9124	typ := &b.Func.Config.Types
9125	// match: (Neg32F x)
9126	// result: (PXOR x (MOVSSconst <typ.Float32> [float32(math.Copysign(0, -1))]))
9127	for {
9128		x := v_0
9129		v.reset(Op386PXOR)
9130		v0 := b.NewValue0(v.Pos, Op386MOVSSconst, typ.Float32)
9131		v0.AuxInt = float32ToAuxInt(float32(math.Copysign(0, -1)))
9132		v.AddArg2(x, v0)
9133		return true
9134	}
9135}
9136func rewriteValue386_OpNeg64F(v *Value) bool {
9137	v_0 := v.Args[0]
9138	b := v.Block
9139	typ := &b.Func.Config.Types
9140	// match: (Neg64F x)
9141	// result: (PXOR x (MOVSDconst <typ.Float64> [math.Copysign(0, -1)]))
9142	for {
9143		x := v_0
9144		v.reset(Op386PXOR)
9145		v0 := b.NewValue0(v.Pos, Op386MOVSDconst, typ.Float64)
9146		v0.AuxInt = float64ToAuxInt(math.Copysign(0, -1))
9147		v.AddArg2(x, v0)
9148		return true
9149	}
9150}
9151func rewriteValue386_OpNeq16(v *Value) bool {
9152	v_1 := v.Args[1]
9153	v_0 := v.Args[0]
9154	b := v.Block
9155	// match: (Neq16 x y)
9156	// result: (SETNE (CMPW x y))
9157	for {
9158		x := v_0
9159		y := v_1
9160		v.reset(Op386SETNE)
9161		v0 := b.NewValue0(v.Pos, Op386CMPW, types.TypeFlags)
9162		v0.AddArg2(x, y)
9163		v.AddArg(v0)
9164		return true
9165	}
9166}
9167func rewriteValue386_OpNeq32(v *Value) bool {
9168	v_1 := v.Args[1]
9169	v_0 := v.Args[0]
9170	b := v.Block
9171	// match: (Neq32 x y)
9172	// result: (SETNE (CMPL x y))
9173	for {
9174		x := v_0
9175		y := v_1
9176		v.reset(Op386SETNE)
9177		v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags)
9178		v0.AddArg2(x, y)
9179		v.AddArg(v0)
9180		return true
9181	}
9182}
9183func rewriteValue386_OpNeq32F(v *Value) bool {
9184	v_1 := v.Args[1]
9185	v_0 := v.Args[0]
9186	b := v.Block
9187	// match: (Neq32F x y)
9188	// result: (SETNEF (UCOMISS x y))
9189	for {
9190		x := v_0
9191		y := v_1
9192		v.reset(Op386SETNEF)
9193		v0 := b.NewValue0(v.Pos, Op386UCOMISS, types.TypeFlags)
9194		v0.AddArg2(x, y)
9195		v.AddArg(v0)
9196		return true
9197	}
9198}
9199func rewriteValue386_OpNeq64F(v *Value) bool {
9200	v_1 := v.Args[1]
9201	v_0 := v.Args[0]
9202	b := v.Block
9203	// match: (Neq64F x y)
9204	// result: (SETNEF (UCOMISD x y))
9205	for {
9206		x := v_0
9207		y := v_1
9208		v.reset(Op386SETNEF)
9209		v0 := b.NewValue0(v.Pos, Op386UCOMISD, types.TypeFlags)
9210		v0.AddArg2(x, y)
9211		v.AddArg(v0)
9212		return true
9213	}
9214}
9215func rewriteValue386_OpNeq8(v *Value) bool {
9216	v_1 := v.Args[1]
9217	v_0 := v.Args[0]
9218	b := v.Block
9219	// match: (Neq8 x y)
9220	// result: (SETNE (CMPB x y))
9221	for {
9222		x := v_0
9223		y := v_1
9224		v.reset(Op386SETNE)
9225		v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags)
9226		v0.AddArg2(x, y)
9227		v.AddArg(v0)
9228		return true
9229	}
9230}
9231func rewriteValue386_OpNeqB(v *Value) bool {
9232	v_1 := v.Args[1]
9233	v_0 := v.Args[0]
9234	b := v.Block
9235	// match: (NeqB x y)
9236	// result: (SETNE (CMPB x y))
9237	for {
9238		x := v_0
9239		y := v_1
9240		v.reset(Op386SETNE)
9241		v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags)
9242		v0.AddArg2(x, y)
9243		v.AddArg(v0)
9244		return true
9245	}
9246}
9247func rewriteValue386_OpNeqPtr(v *Value) bool {
9248	v_1 := v.Args[1]
9249	v_0 := v.Args[0]
9250	b := v.Block
9251	// match: (NeqPtr x y)
9252	// result: (SETNE (CMPL x y))
9253	for {
9254		x := v_0
9255		y := v_1
9256		v.reset(Op386SETNE)
9257		v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags)
9258		v0.AddArg2(x, y)
9259		v.AddArg(v0)
9260		return true
9261	}
9262}
9263func rewriteValue386_OpNot(v *Value) bool {
9264	v_0 := v.Args[0]
9265	// match: (Not x)
9266	// result: (XORLconst [1] x)
9267	for {
9268		x := v_0
9269		v.reset(Op386XORLconst)
9270		v.AuxInt = int32ToAuxInt(1)
9271		v.AddArg(x)
9272		return true
9273	}
9274}
9275func rewriteValue386_OpOffPtr(v *Value) bool {
9276	v_0 := v.Args[0]
9277	// match: (OffPtr [off] ptr)
9278	// result: (ADDLconst [int32(off)] ptr)
9279	for {
9280		off := auxIntToInt64(v.AuxInt)
9281		ptr := v_0
9282		v.reset(Op386ADDLconst)
9283		v.AuxInt = int32ToAuxInt(int32(off))
9284		v.AddArg(ptr)
9285		return true
9286	}
9287}
9288func rewriteValue386_OpPanicBounds(v *Value) bool {
9289	v_2 := v.Args[2]
9290	v_1 := v.Args[1]
9291	v_0 := v.Args[0]
9292	// match: (PanicBounds [kind] x y mem)
9293	// cond: boundsABI(kind) == 0
9294	// result: (LoweredPanicBoundsA [kind] x y mem)
9295	for {
9296		kind := auxIntToInt64(v.AuxInt)
9297		x := v_0
9298		y := v_1
9299		mem := v_2
9300		if !(boundsABI(kind) == 0) {
9301			break
9302		}
9303		v.reset(Op386LoweredPanicBoundsA)
9304		v.AuxInt = int64ToAuxInt(kind)
9305		v.AddArg3(x, y, mem)
9306		return true
9307	}
9308	// match: (PanicBounds [kind] x y mem)
9309	// cond: boundsABI(kind) == 1
9310	// result: (LoweredPanicBoundsB [kind] x y mem)
9311	for {
9312		kind := auxIntToInt64(v.AuxInt)
9313		x := v_0
9314		y := v_1
9315		mem := v_2
9316		if !(boundsABI(kind) == 1) {
9317			break
9318		}
9319		v.reset(Op386LoweredPanicBoundsB)
9320		v.AuxInt = int64ToAuxInt(kind)
9321		v.AddArg3(x, y, mem)
9322		return true
9323	}
9324	// match: (PanicBounds [kind] x y mem)
9325	// cond: boundsABI(kind) == 2
9326	// result: (LoweredPanicBoundsC [kind] x y mem)
9327	for {
9328		kind := auxIntToInt64(v.AuxInt)
9329		x := v_0
9330		y := v_1
9331		mem := v_2
9332		if !(boundsABI(kind) == 2) {
9333			break
9334		}
9335		v.reset(Op386LoweredPanicBoundsC)
9336		v.AuxInt = int64ToAuxInt(kind)
9337		v.AddArg3(x, y, mem)
9338		return true
9339	}
9340	return false
9341}
9342func rewriteValue386_OpPanicExtend(v *Value) bool {
9343	v_3 := v.Args[3]
9344	v_2 := v.Args[2]
9345	v_1 := v.Args[1]
9346	v_0 := v.Args[0]
9347	// match: (PanicExtend [kind] hi lo y mem)
9348	// cond: boundsABI(kind) == 0
9349	// result: (LoweredPanicExtendA [kind] hi lo y mem)
9350	for {
9351		kind := auxIntToInt64(v.AuxInt)
9352		hi := v_0
9353		lo := v_1
9354		y := v_2
9355		mem := v_3
9356		if !(boundsABI(kind) == 0) {
9357			break
9358		}
9359		v.reset(Op386LoweredPanicExtendA)
9360		v.AuxInt = int64ToAuxInt(kind)
9361		v.AddArg4(hi, lo, y, mem)
9362		return true
9363	}
9364	// match: (PanicExtend [kind] hi lo y mem)
9365	// cond: boundsABI(kind) == 1
9366	// result: (LoweredPanicExtendB [kind] hi lo y mem)
9367	for {
9368		kind := auxIntToInt64(v.AuxInt)
9369		hi := v_0
9370		lo := v_1
9371		y := v_2
9372		mem := v_3
9373		if !(boundsABI(kind) == 1) {
9374			break
9375		}
9376		v.reset(Op386LoweredPanicExtendB)
9377		v.AuxInt = int64ToAuxInt(kind)
9378		v.AddArg4(hi, lo, y, mem)
9379		return true
9380	}
9381	// match: (PanicExtend [kind] hi lo y mem)
9382	// cond: boundsABI(kind) == 2
9383	// result: (LoweredPanicExtendC [kind] hi lo y mem)
9384	for {
9385		kind := auxIntToInt64(v.AuxInt)
9386		hi := v_0
9387		lo := v_1
9388		y := v_2
9389		mem := v_3
9390		if !(boundsABI(kind) == 2) {
9391			break
9392		}
9393		v.reset(Op386LoweredPanicExtendC)
9394		v.AuxInt = int64ToAuxInt(kind)
9395		v.AddArg4(hi, lo, y, mem)
9396		return true
9397	}
9398	return false
9399}
9400func rewriteValue386_OpRsh16Ux16(v *Value) bool {
9401	v_1 := v.Args[1]
9402	v_0 := v.Args[0]
9403	b := v.Block
9404	// match: (Rsh16Ux16 <t> x y)
9405	// cond: !shiftIsBounded(v)
9406	// result: (ANDL (SHRW <t> x y) (SBBLcarrymask <t> (CMPWconst y [16])))
9407	for {
9408		t := v.Type
9409		x := v_0
9410		y := v_1
9411		if !(!shiftIsBounded(v)) {
9412			break
9413		}
9414		v.reset(Op386ANDL)
9415		v0 := b.NewValue0(v.Pos, Op386SHRW, t)
9416		v0.AddArg2(x, y)
9417		v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t)
9418		v2 := b.NewValue0(v.Pos, Op386CMPWconst, types.TypeFlags)
9419		v2.AuxInt = int16ToAuxInt(16)
9420		v2.AddArg(y)
9421		v1.AddArg(v2)
9422		v.AddArg2(v0, v1)
9423		return true
9424	}
9425	// match: (Rsh16Ux16 <t> x y)
9426	// cond: shiftIsBounded(v)
9427	// result: (SHRW <t> x y)
9428	for {
9429		t := v.Type
9430		x := v_0
9431		y := v_1
9432		if !(shiftIsBounded(v)) {
9433			break
9434		}
9435		v.reset(Op386SHRW)
9436		v.Type = t
9437		v.AddArg2(x, y)
9438		return true
9439	}
9440	return false
9441}
9442func rewriteValue386_OpRsh16Ux32(v *Value) bool {
9443	v_1 := v.Args[1]
9444	v_0 := v.Args[0]
9445	b := v.Block
9446	// match: (Rsh16Ux32 <t> x y)
9447	// cond: !shiftIsBounded(v)
9448	// result: (ANDL (SHRW <t> x y) (SBBLcarrymask <t> (CMPLconst y [16])))
9449	for {
9450		t := v.Type
9451		x := v_0
9452		y := v_1
9453		if !(!shiftIsBounded(v)) {
9454			break
9455		}
9456		v.reset(Op386ANDL)
9457		v0 := b.NewValue0(v.Pos, Op386SHRW, t)
9458		v0.AddArg2(x, y)
9459		v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t)
9460		v2 := b.NewValue0(v.Pos, Op386CMPLconst, types.TypeFlags)
9461		v2.AuxInt = int32ToAuxInt(16)
9462		v2.AddArg(y)
9463		v1.AddArg(v2)
9464		v.AddArg2(v0, v1)
9465		return true
9466	}
9467	// match: (Rsh16Ux32 <t> x y)
9468	// cond: shiftIsBounded(v)
9469	// result: (SHRW <t> x y)
9470	for {
9471		t := v.Type
9472		x := v_0
9473		y := v_1
9474		if !(shiftIsBounded(v)) {
9475			break
9476		}
9477		v.reset(Op386SHRW)
9478		v.Type = t
9479		v.AddArg2(x, y)
9480		return true
9481	}
9482	return false
9483}
9484func rewriteValue386_OpRsh16Ux64(v *Value) bool {
9485	v_1 := v.Args[1]
9486	v_0 := v.Args[0]
9487	// match: (Rsh16Ux64 x (Const64 [c]))
9488	// cond: uint64(c) < 16
9489	// result: (SHRWconst x [int16(c)])
9490	for {
9491		x := v_0
9492		if v_1.Op != OpConst64 {
9493			break
9494		}
9495		c := auxIntToInt64(v_1.AuxInt)
9496		if !(uint64(c) < 16) {
9497			break
9498		}
9499		v.reset(Op386SHRWconst)
9500		v.AuxInt = int16ToAuxInt(int16(c))
9501		v.AddArg(x)
9502		return true
9503	}
9504	// match: (Rsh16Ux64 _ (Const64 [c]))
9505	// cond: uint64(c) >= 16
9506	// result: (Const16 [0])
9507	for {
9508		if v_1.Op != OpConst64 {
9509			break
9510		}
9511		c := auxIntToInt64(v_1.AuxInt)
9512		if !(uint64(c) >= 16) {
9513			break
9514		}
9515		v.reset(OpConst16)
9516		v.AuxInt = int16ToAuxInt(0)
9517		return true
9518	}
9519	return false
9520}
9521func rewriteValue386_OpRsh16Ux8(v *Value) bool {
9522	v_1 := v.Args[1]
9523	v_0 := v.Args[0]
9524	b := v.Block
9525	// match: (Rsh16Ux8 <t> x y)
9526	// cond: !shiftIsBounded(v)
9527	// result: (ANDL (SHRW <t> x y) (SBBLcarrymask <t> (CMPBconst y [16])))
9528	for {
9529		t := v.Type
9530		x := v_0
9531		y := v_1
9532		if !(!shiftIsBounded(v)) {
9533			break
9534		}
9535		v.reset(Op386ANDL)
9536		v0 := b.NewValue0(v.Pos, Op386SHRW, t)
9537		v0.AddArg2(x, y)
9538		v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t)
9539		v2 := b.NewValue0(v.Pos, Op386CMPBconst, types.TypeFlags)
9540		v2.AuxInt = int8ToAuxInt(16)
9541		v2.AddArg(y)
9542		v1.AddArg(v2)
9543		v.AddArg2(v0, v1)
9544		return true
9545	}
9546	// match: (Rsh16Ux8 <t> x y)
9547	// cond: shiftIsBounded(v)
9548	// result: (SHRW <t> x y)
9549	for {
9550		t := v.Type
9551		x := v_0
9552		y := v_1
9553		if !(shiftIsBounded(v)) {
9554			break
9555		}
9556		v.reset(Op386SHRW)
9557		v.Type = t
9558		v.AddArg2(x, y)
9559		return true
9560	}
9561	return false
9562}
9563func rewriteValue386_OpRsh16x16(v *Value) bool {
9564	v_1 := v.Args[1]
9565	v_0 := v.Args[0]
9566	b := v.Block
9567	// match: (Rsh16x16 <t> x y)
9568	// cond: !shiftIsBounded(v)
9569	// result: (SARW <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPWconst y [16])))))
9570	for {
9571		t := v.Type
9572		x := v_0
9573		y := v_1
9574		if !(!shiftIsBounded(v)) {
9575			break
9576		}
9577		v.reset(Op386SARW)
9578		v.Type = t
9579		v0 := b.NewValue0(v.Pos, Op386ORL, y.Type)
9580		v1 := b.NewValue0(v.Pos, Op386NOTL, y.Type)
9581		v2 := b.NewValue0(v.Pos, Op386SBBLcarrymask, y.Type)
9582		v3 := b.NewValue0(v.Pos, Op386CMPWconst, types.TypeFlags)
9583		v3.AuxInt = int16ToAuxInt(16)
9584		v3.AddArg(y)
9585		v2.AddArg(v3)
9586		v1.AddArg(v2)
9587		v0.AddArg2(y, v1)
9588		v.AddArg2(x, v0)
9589		return true
9590	}
9591	// match: (Rsh16x16 <t> x y)
9592	// cond: shiftIsBounded(v)
9593	// result: (SARW x y)
9594	for {
9595		x := v_0
9596		y := v_1
9597		if !(shiftIsBounded(v)) {
9598			break
9599		}
9600		v.reset(Op386SARW)
9601		v.AddArg2(x, y)
9602		return true
9603	}
9604	return false
9605}
9606func rewriteValue386_OpRsh16x32(v *Value) bool {
9607	v_1 := v.Args[1]
9608	v_0 := v.Args[0]
9609	b := v.Block
9610	// match: (Rsh16x32 <t> x y)
9611	// cond: !shiftIsBounded(v)
9612	// result: (SARW <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPLconst y [16])))))
9613	for {
9614		t := v.Type
9615		x := v_0
9616		y := v_1
9617		if !(!shiftIsBounded(v)) {
9618			break
9619		}
9620		v.reset(Op386SARW)
9621		v.Type = t
9622		v0 := b.NewValue0(v.Pos, Op386ORL, y.Type)
9623		v1 := b.NewValue0(v.Pos, Op386NOTL, y.Type)
9624		v2 := b.NewValue0(v.Pos, Op386SBBLcarrymask, y.Type)
9625		v3 := b.NewValue0(v.Pos, Op386CMPLconst, types.TypeFlags)
9626		v3.AuxInt = int32ToAuxInt(16)
9627		v3.AddArg(y)
9628		v2.AddArg(v3)
9629		v1.AddArg(v2)
9630		v0.AddArg2(y, v1)
9631		v.AddArg2(x, v0)
9632		return true
9633	}
9634	// match: (Rsh16x32 <t> x y)
9635	// cond: shiftIsBounded(v)
9636	// result: (SARW x y)
9637	for {
9638		x := v_0
9639		y := v_1
9640		if !(shiftIsBounded(v)) {
9641			break
9642		}
9643		v.reset(Op386SARW)
9644		v.AddArg2(x, y)
9645		return true
9646	}
9647	return false
9648}
9649func rewriteValue386_OpRsh16x64(v *Value) bool {
9650	v_1 := v.Args[1]
9651	v_0 := v.Args[0]
9652	// match: (Rsh16x64 x (Const64 [c]))
9653	// cond: uint64(c) < 16
9654	// result: (SARWconst x [int16(c)])
9655	for {
9656		x := v_0
9657		if v_1.Op != OpConst64 {
9658			break
9659		}
9660		c := auxIntToInt64(v_1.AuxInt)
9661		if !(uint64(c) < 16) {
9662			break
9663		}
9664		v.reset(Op386SARWconst)
9665		v.AuxInt = int16ToAuxInt(int16(c))
9666		v.AddArg(x)
9667		return true
9668	}
9669	// match: (Rsh16x64 x (Const64 [c]))
9670	// cond: uint64(c) >= 16
9671	// result: (SARWconst x [15])
9672	for {
9673		x := v_0
9674		if v_1.Op != OpConst64 {
9675			break
9676		}
9677		c := auxIntToInt64(v_1.AuxInt)
9678		if !(uint64(c) >= 16) {
9679			break
9680		}
9681		v.reset(Op386SARWconst)
9682		v.AuxInt = int16ToAuxInt(15)
9683		v.AddArg(x)
9684		return true
9685	}
9686	return false
9687}
9688func rewriteValue386_OpRsh16x8(v *Value) bool {
9689	v_1 := v.Args[1]
9690	v_0 := v.Args[0]
9691	b := v.Block
9692	// match: (Rsh16x8 <t> x y)
9693	// cond: !shiftIsBounded(v)
9694	// result: (SARW <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPBconst y [16])))))
9695	for {
9696		t := v.Type
9697		x := v_0
9698		y := v_1
9699		if !(!shiftIsBounded(v)) {
9700			break
9701		}
9702		v.reset(Op386SARW)
9703		v.Type = t
9704		v0 := b.NewValue0(v.Pos, Op386ORL, y.Type)
9705		v1 := b.NewValue0(v.Pos, Op386NOTL, y.Type)
9706		v2 := b.NewValue0(v.Pos, Op386SBBLcarrymask, y.Type)
9707		v3 := b.NewValue0(v.Pos, Op386CMPBconst, types.TypeFlags)
9708		v3.AuxInt = int8ToAuxInt(16)
9709		v3.AddArg(y)
9710		v2.AddArg(v3)
9711		v1.AddArg(v2)
9712		v0.AddArg2(y, v1)
9713		v.AddArg2(x, v0)
9714		return true
9715	}
9716	// match: (Rsh16x8 <t> x y)
9717	// cond: shiftIsBounded(v)
9718	// result: (SARW x y)
9719	for {
9720		x := v_0
9721		y := v_1
9722		if !(shiftIsBounded(v)) {
9723			break
9724		}
9725		v.reset(Op386SARW)
9726		v.AddArg2(x, y)
9727		return true
9728	}
9729	return false
9730}
9731func rewriteValue386_OpRsh32Ux16(v *Value) bool {
9732	v_1 := v.Args[1]
9733	v_0 := v.Args[0]
9734	b := v.Block
9735	// match: (Rsh32Ux16 <t> x y)
9736	// cond: !shiftIsBounded(v)
9737	// result: (ANDL (SHRL <t> x y) (SBBLcarrymask <t> (CMPWconst y [32])))
9738	for {
9739		t := v.Type
9740		x := v_0
9741		y := v_1
9742		if !(!shiftIsBounded(v)) {
9743			break
9744		}
9745		v.reset(Op386ANDL)
9746		v0 := b.NewValue0(v.Pos, Op386SHRL, t)
9747		v0.AddArg2(x, y)
9748		v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t)
9749		v2 := b.NewValue0(v.Pos, Op386CMPWconst, types.TypeFlags)
9750		v2.AuxInt = int16ToAuxInt(32)
9751		v2.AddArg(y)
9752		v1.AddArg(v2)
9753		v.AddArg2(v0, v1)
9754		return true
9755	}
9756	// match: (Rsh32Ux16 <t> x y)
9757	// cond: shiftIsBounded(v)
9758	// result: (SHRL <t> x y)
9759	for {
9760		t := v.Type
9761		x := v_0
9762		y := v_1
9763		if !(shiftIsBounded(v)) {
9764			break
9765		}
9766		v.reset(Op386SHRL)
9767		v.Type = t
9768		v.AddArg2(x, y)
9769		return true
9770	}
9771	return false
9772}
9773func rewriteValue386_OpRsh32Ux32(v *Value) bool {
9774	v_1 := v.Args[1]
9775	v_0 := v.Args[0]
9776	b := v.Block
9777	// match: (Rsh32Ux32 <t> x y)
9778	// cond: !shiftIsBounded(v)
9779	// result: (ANDL (SHRL <t> x y) (SBBLcarrymask <t> (CMPLconst y [32])))
9780	for {
9781		t := v.Type
9782		x := v_0
9783		y := v_1
9784		if !(!shiftIsBounded(v)) {
9785			break
9786		}
9787		v.reset(Op386ANDL)
9788		v0 := b.NewValue0(v.Pos, Op386SHRL, t)
9789		v0.AddArg2(x, y)
9790		v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t)
9791		v2 := b.NewValue0(v.Pos, Op386CMPLconst, types.TypeFlags)
9792		v2.AuxInt = int32ToAuxInt(32)
9793		v2.AddArg(y)
9794		v1.AddArg(v2)
9795		v.AddArg2(v0, v1)
9796		return true
9797	}
9798	// match: (Rsh32Ux32 <t> x y)
9799	// cond: shiftIsBounded(v)
9800	// result: (SHRL <t> x y)
9801	for {
9802		t := v.Type
9803		x := v_0
9804		y := v_1
9805		if !(shiftIsBounded(v)) {
9806			break
9807		}
9808		v.reset(Op386SHRL)
9809		v.Type = t
9810		v.AddArg2(x, y)
9811		return true
9812	}
9813	return false
9814}
9815func rewriteValue386_OpRsh32Ux64(v *Value) bool {
9816	v_1 := v.Args[1]
9817	v_0 := v.Args[0]
9818	// match: (Rsh32Ux64 x (Const64 [c]))
9819	// cond: uint64(c) < 32
9820	// result: (SHRLconst x [int32(c)])
9821	for {
9822		x := v_0
9823		if v_1.Op != OpConst64 {
9824			break
9825		}
9826		c := auxIntToInt64(v_1.AuxInt)
9827		if !(uint64(c) < 32) {
9828			break
9829		}
9830		v.reset(Op386SHRLconst)
9831		v.AuxInt = int32ToAuxInt(int32(c))
9832		v.AddArg(x)
9833		return true
9834	}
9835	// match: (Rsh32Ux64 _ (Const64 [c]))
9836	// cond: uint64(c) >= 32
9837	// result: (Const32 [0])
9838	for {
9839		if v_1.Op != OpConst64 {
9840			break
9841		}
9842		c := auxIntToInt64(v_1.AuxInt)
9843		if !(uint64(c) >= 32) {
9844			break
9845		}
9846		v.reset(OpConst32)
9847		v.AuxInt = int32ToAuxInt(0)
9848		return true
9849	}
9850	return false
9851}
9852func rewriteValue386_OpRsh32Ux8(v *Value) bool {
9853	v_1 := v.Args[1]
9854	v_0 := v.Args[0]
9855	b := v.Block
9856	// match: (Rsh32Ux8 <t> x y)
9857	// cond: !shiftIsBounded(v)
9858	// result: (ANDL (SHRL <t> x y) (SBBLcarrymask <t> (CMPBconst y [32])))
9859	for {
9860		t := v.Type
9861		x := v_0
9862		y := v_1
9863		if !(!shiftIsBounded(v)) {
9864			break
9865		}
9866		v.reset(Op386ANDL)
9867		v0 := b.NewValue0(v.Pos, Op386SHRL, t)
9868		v0.AddArg2(x, y)
9869		v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t)
9870		v2 := b.NewValue0(v.Pos, Op386CMPBconst, types.TypeFlags)
9871		v2.AuxInt = int8ToAuxInt(32)
9872		v2.AddArg(y)
9873		v1.AddArg(v2)
9874		v.AddArg2(v0, v1)
9875		return true
9876	}
9877	// match: (Rsh32Ux8 <t> x y)
9878	// cond: shiftIsBounded(v)
9879	// result: (SHRL <t> x y)
9880	for {
9881		t := v.Type
9882		x := v_0
9883		y := v_1
9884		if !(shiftIsBounded(v)) {
9885			break
9886		}
9887		v.reset(Op386SHRL)
9888		v.Type = t
9889		v.AddArg2(x, y)
9890		return true
9891	}
9892	return false
9893}
9894func rewriteValue386_OpRsh32x16(v *Value) bool {
9895	v_1 := v.Args[1]
9896	v_0 := v.Args[0]
9897	b := v.Block
9898	// match: (Rsh32x16 <t> x y)
9899	// cond: !shiftIsBounded(v)
9900	// result: (SARL <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPWconst y [32])))))
9901	for {
9902		t := v.Type
9903		x := v_0
9904		y := v_1
9905		if !(!shiftIsBounded(v)) {
9906			break
9907		}
9908		v.reset(Op386SARL)
9909		v.Type = t
9910		v0 := b.NewValue0(v.Pos, Op386ORL, y.Type)
9911		v1 := b.NewValue0(v.Pos, Op386NOTL, y.Type)
9912		v2 := b.NewValue0(v.Pos, Op386SBBLcarrymask, y.Type)
9913		v3 := b.NewValue0(v.Pos, Op386CMPWconst, types.TypeFlags)
9914		v3.AuxInt = int16ToAuxInt(32)
9915		v3.AddArg(y)
9916		v2.AddArg(v3)
9917		v1.AddArg(v2)
9918		v0.AddArg2(y, v1)
9919		v.AddArg2(x, v0)
9920		return true
9921	}
9922	// match: (Rsh32x16 <t> x y)
9923	// cond: shiftIsBounded(v)
9924	// result: (SARL x y)
9925	for {
9926		x := v_0
9927		y := v_1
9928		if !(shiftIsBounded(v)) {
9929			break
9930		}
9931		v.reset(Op386SARL)
9932		v.AddArg2(x, y)
9933		return true
9934	}
9935	return false
9936}
9937func rewriteValue386_OpRsh32x32(v *Value) bool {
9938	v_1 := v.Args[1]
9939	v_0 := v.Args[0]
9940	b := v.Block
9941	// match: (Rsh32x32 <t> x y)
9942	// cond: !shiftIsBounded(v)
9943	// result: (SARL <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPLconst y [32])))))
9944	for {
9945		t := v.Type
9946		x := v_0
9947		y := v_1
9948		if !(!shiftIsBounded(v)) {
9949			break
9950		}
9951		v.reset(Op386SARL)
9952		v.Type = t
9953		v0 := b.NewValue0(v.Pos, Op386ORL, y.Type)
9954		v1 := b.NewValue0(v.Pos, Op386NOTL, y.Type)
9955		v2 := b.NewValue0(v.Pos, Op386SBBLcarrymask, y.Type)
9956		v3 := b.NewValue0(v.Pos, Op386CMPLconst, types.TypeFlags)
9957		v3.AuxInt = int32ToAuxInt(32)
9958		v3.AddArg(y)
9959		v2.AddArg(v3)
9960		v1.AddArg(v2)
9961		v0.AddArg2(y, v1)
9962		v.AddArg2(x, v0)
9963		return true
9964	}
9965	// match: (Rsh32x32 <t> x y)
9966	// cond: shiftIsBounded(v)
9967	// result: (SARL x y)
9968	for {
9969		x := v_0
9970		y := v_1
9971		if !(shiftIsBounded(v)) {
9972			break
9973		}
9974		v.reset(Op386SARL)
9975		v.AddArg2(x, y)
9976		return true
9977	}
9978	return false
9979}
9980func rewriteValue386_OpRsh32x64(v *Value) bool {
9981	v_1 := v.Args[1]
9982	v_0 := v.Args[0]
9983	// match: (Rsh32x64 x (Const64 [c]))
9984	// cond: uint64(c) < 32
9985	// result: (SARLconst x [int32(c)])
9986	for {
9987		x := v_0
9988		if v_1.Op != OpConst64 {
9989			break
9990		}
9991		c := auxIntToInt64(v_1.AuxInt)
9992		if !(uint64(c) < 32) {
9993			break
9994		}
9995		v.reset(Op386SARLconst)
9996		v.AuxInt = int32ToAuxInt(int32(c))
9997		v.AddArg(x)
9998		return true
9999	}
10000	// match: (Rsh32x64 x (Const64 [c]))
10001	// cond: uint64(c) >= 32
10002	// result: (SARLconst x [31])
10003	for {
10004		x := v_0
10005		if v_1.Op != OpConst64 {
10006			break
10007		}
10008		c := auxIntToInt64(v_1.AuxInt)
10009		if !(uint64(c) >= 32) {
10010			break
10011		}
10012		v.reset(Op386SARLconst)
10013		v.AuxInt = int32ToAuxInt(31)
10014		v.AddArg(x)
10015		return true
10016	}
10017	return false
10018}
10019func rewriteValue386_OpRsh32x8(v *Value) bool {
10020	v_1 := v.Args[1]
10021	v_0 := v.Args[0]
10022	b := v.Block
10023	// match: (Rsh32x8 <t> x y)
10024	// cond: !shiftIsBounded(v)
10025	// result: (SARL <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPBconst y [32])))))
10026	for {
10027		t := v.Type
10028		x := v_0
10029		y := v_1
10030		if !(!shiftIsBounded(v)) {
10031			break
10032		}
10033		v.reset(Op386SARL)
10034		v.Type = t
10035		v0 := b.NewValue0(v.Pos, Op386ORL, y.Type)
10036		v1 := b.NewValue0(v.Pos, Op386NOTL, y.Type)
10037		v2 := b.NewValue0(v.Pos, Op386SBBLcarrymask, y.Type)
10038		v3 := b.NewValue0(v.Pos, Op386CMPBconst, types.TypeFlags)
10039		v3.AuxInt = int8ToAuxInt(32)
10040		v3.AddArg(y)
10041		v2.AddArg(v3)
10042		v1.AddArg(v2)
10043		v0.AddArg2(y, v1)
10044		v.AddArg2(x, v0)
10045		return true
10046	}
10047	// match: (Rsh32x8 <t> x y)
10048	// cond: shiftIsBounded(v)
10049	// result: (SARL x y)
10050	for {
10051		x := v_0
10052		y := v_1
10053		if !(shiftIsBounded(v)) {
10054			break
10055		}
10056		v.reset(Op386SARL)
10057		v.AddArg2(x, y)
10058		return true
10059	}
10060	return false
10061}
10062func rewriteValue386_OpRsh8Ux16(v *Value) bool {
10063	v_1 := v.Args[1]
10064	v_0 := v.Args[0]
10065	b := v.Block
10066	// match: (Rsh8Ux16 <t> x y)
10067	// cond: !shiftIsBounded(v)
10068	// result: (ANDL (SHRB <t> x y) (SBBLcarrymask <t> (CMPWconst y [8])))
10069	for {
10070		t := v.Type
10071		x := v_0
10072		y := v_1
10073		if !(!shiftIsBounded(v)) {
10074			break
10075		}
10076		v.reset(Op386ANDL)
10077		v0 := b.NewValue0(v.Pos, Op386SHRB, t)
10078		v0.AddArg2(x, y)
10079		v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t)
10080		v2 := b.NewValue0(v.Pos, Op386CMPWconst, types.TypeFlags)
10081		v2.AuxInt = int16ToAuxInt(8)
10082		v2.AddArg(y)
10083		v1.AddArg(v2)
10084		v.AddArg2(v0, v1)
10085		return true
10086	}
10087	// match: (Rsh8Ux16 <t> x y)
10088	// cond: shiftIsBounded(v)
10089	// result: (SHRB <t> x y)
10090	for {
10091		t := v.Type
10092		x := v_0
10093		y := v_1
10094		if !(shiftIsBounded(v)) {
10095			break
10096		}
10097		v.reset(Op386SHRB)
10098		v.Type = t
10099		v.AddArg2(x, y)
10100		return true
10101	}
10102	return false
10103}
10104func rewriteValue386_OpRsh8Ux32(v *Value) bool {
10105	v_1 := v.Args[1]
10106	v_0 := v.Args[0]
10107	b := v.Block
10108	// match: (Rsh8Ux32 <t> x y)
10109	// cond: !shiftIsBounded(v)
10110	// result: (ANDL (SHRB <t> x y) (SBBLcarrymask <t> (CMPLconst y [8])))
10111	for {
10112		t := v.Type
10113		x := v_0
10114		y := v_1
10115		if !(!shiftIsBounded(v)) {
10116			break
10117		}
10118		v.reset(Op386ANDL)
10119		v0 := b.NewValue0(v.Pos, Op386SHRB, t)
10120		v0.AddArg2(x, y)
10121		v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t)
10122		v2 := b.NewValue0(v.Pos, Op386CMPLconst, types.TypeFlags)
10123		v2.AuxInt = int32ToAuxInt(8)
10124		v2.AddArg(y)
10125		v1.AddArg(v2)
10126		v.AddArg2(v0, v1)
10127		return true
10128	}
10129	// match: (Rsh8Ux32 <t> x y)
10130	// cond: shiftIsBounded(v)
10131	// result: (SHRB <t> x y)
10132	for {
10133		t := v.Type
10134		x := v_0
10135		y := v_1
10136		if !(shiftIsBounded(v)) {
10137			break
10138		}
10139		v.reset(Op386SHRB)
10140		v.Type = t
10141		v.AddArg2(x, y)
10142		return true
10143	}
10144	return false
10145}
10146func rewriteValue386_OpRsh8Ux64(v *Value) bool {
10147	v_1 := v.Args[1]
10148	v_0 := v.Args[0]
10149	// match: (Rsh8Ux64 x (Const64 [c]))
10150	// cond: uint64(c) < 8
10151	// result: (SHRBconst x [int8(c)])
10152	for {
10153		x := v_0
10154		if v_1.Op != OpConst64 {
10155			break
10156		}
10157		c := auxIntToInt64(v_1.AuxInt)
10158		if !(uint64(c) < 8) {
10159			break
10160		}
10161		v.reset(Op386SHRBconst)
10162		v.AuxInt = int8ToAuxInt(int8(c))
10163		v.AddArg(x)
10164		return true
10165	}
10166	// match: (Rsh8Ux64 _ (Const64 [c]))
10167	// cond: uint64(c) >= 8
10168	// result: (Const8 [0])
10169	for {
10170		if v_1.Op != OpConst64 {
10171			break
10172		}
10173		c := auxIntToInt64(v_1.AuxInt)
10174		if !(uint64(c) >= 8) {
10175			break
10176		}
10177		v.reset(OpConst8)
10178		v.AuxInt = int8ToAuxInt(0)
10179		return true
10180	}
10181	return false
10182}
10183func rewriteValue386_OpRsh8Ux8(v *Value) bool {
10184	v_1 := v.Args[1]
10185	v_0 := v.Args[0]
10186	b := v.Block
10187	// match: (Rsh8Ux8 <t> x y)
10188	// cond: !shiftIsBounded(v)
10189	// result: (ANDL (SHRB <t> x y) (SBBLcarrymask <t> (CMPBconst y [8])))
10190	for {
10191		t := v.Type
10192		x := v_0
10193		y := v_1
10194		if !(!shiftIsBounded(v)) {
10195			break
10196		}
10197		v.reset(Op386ANDL)
10198		v0 := b.NewValue0(v.Pos, Op386SHRB, t)
10199		v0.AddArg2(x, y)
10200		v1 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t)
10201		v2 := b.NewValue0(v.Pos, Op386CMPBconst, types.TypeFlags)
10202		v2.AuxInt = int8ToAuxInt(8)
10203		v2.AddArg(y)
10204		v1.AddArg(v2)
10205		v.AddArg2(v0, v1)
10206		return true
10207	}
10208	// match: (Rsh8Ux8 <t> x y)
10209	// cond: shiftIsBounded(v)
10210	// result: (SHRB <t> x y)
10211	for {
10212		t := v.Type
10213		x := v_0
10214		y := v_1
10215		if !(shiftIsBounded(v)) {
10216			break
10217		}
10218		v.reset(Op386SHRB)
10219		v.Type = t
10220		v.AddArg2(x, y)
10221		return true
10222	}
10223	return false
10224}
10225func rewriteValue386_OpRsh8x16(v *Value) bool {
10226	v_1 := v.Args[1]
10227	v_0 := v.Args[0]
10228	b := v.Block
10229	// match: (Rsh8x16 <t> x y)
10230	// cond: !shiftIsBounded(v)
10231	// result: (SARB <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPWconst y [8])))))
10232	for {
10233		t := v.Type
10234		x := v_0
10235		y := v_1
10236		if !(!shiftIsBounded(v)) {
10237			break
10238		}
10239		v.reset(Op386SARB)
10240		v.Type = t
10241		v0 := b.NewValue0(v.Pos, Op386ORL, y.Type)
10242		v1 := b.NewValue0(v.Pos, Op386NOTL, y.Type)
10243		v2 := b.NewValue0(v.Pos, Op386SBBLcarrymask, y.Type)
10244		v3 := b.NewValue0(v.Pos, Op386CMPWconst, types.TypeFlags)
10245		v3.AuxInt = int16ToAuxInt(8)
10246		v3.AddArg(y)
10247		v2.AddArg(v3)
10248		v1.AddArg(v2)
10249		v0.AddArg2(y, v1)
10250		v.AddArg2(x, v0)
10251		return true
10252	}
10253	// match: (Rsh8x16 <t> x y)
10254	// cond: shiftIsBounded(v)
10255	// result: (SARB x y)
10256	for {
10257		x := v_0
10258		y := v_1
10259		if !(shiftIsBounded(v)) {
10260			break
10261		}
10262		v.reset(Op386SARB)
10263		v.AddArg2(x, y)
10264		return true
10265	}
10266	return false
10267}
10268func rewriteValue386_OpRsh8x32(v *Value) bool {
10269	v_1 := v.Args[1]
10270	v_0 := v.Args[0]
10271	b := v.Block
10272	// match: (Rsh8x32 <t> x y)
10273	// cond: !shiftIsBounded(v)
10274	// result: (SARB <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPLconst y [8])))))
10275	for {
10276		t := v.Type
10277		x := v_0
10278		y := v_1
10279		if !(!shiftIsBounded(v)) {
10280			break
10281		}
10282		v.reset(Op386SARB)
10283		v.Type = t
10284		v0 := b.NewValue0(v.Pos, Op386ORL, y.Type)
10285		v1 := b.NewValue0(v.Pos, Op386NOTL, y.Type)
10286		v2 := b.NewValue0(v.Pos, Op386SBBLcarrymask, y.Type)
10287		v3 := b.NewValue0(v.Pos, Op386CMPLconst, types.TypeFlags)
10288		v3.AuxInt = int32ToAuxInt(8)
10289		v3.AddArg(y)
10290		v2.AddArg(v3)
10291		v1.AddArg(v2)
10292		v0.AddArg2(y, v1)
10293		v.AddArg2(x, v0)
10294		return true
10295	}
10296	// match: (Rsh8x32 <t> x y)
10297	// cond: shiftIsBounded(v)
10298	// result: (SARB x y)
10299	for {
10300		x := v_0
10301		y := v_1
10302		if !(shiftIsBounded(v)) {
10303			break
10304		}
10305		v.reset(Op386SARB)
10306		v.AddArg2(x, y)
10307		return true
10308	}
10309	return false
10310}
10311func rewriteValue386_OpRsh8x64(v *Value) bool {
10312	v_1 := v.Args[1]
10313	v_0 := v.Args[0]
10314	// match: (Rsh8x64 x (Const64 [c]))
10315	// cond: uint64(c) < 8
10316	// result: (SARBconst x [int8(c)])
10317	for {
10318		x := v_0
10319		if v_1.Op != OpConst64 {
10320			break
10321		}
10322		c := auxIntToInt64(v_1.AuxInt)
10323		if !(uint64(c) < 8) {
10324			break
10325		}
10326		v.reset(Op386SARBconst)
10327		v.AuxInt = int8ToAuxInt(int8(c))
10328		v.AddArg(x)
10329		return true
10330	}
10331	// match: (Rsh8x64 x (Const64 [c]))
10332	// cond: uint64(c) >= 8
10333	// result: (SARBconst x [7])
10334	for {
10335		x := v_0
10336		if v_1.Op != OpConst64 {
10337			break
10338		}
10339		c := auxIntToInt64(v_1.AuxInt)
10340		if !(uint64(c) >= 8) {
10341			break
10342		}
10343		v.reset(Op386SARBconst)
10344		v.AuxInt = int8ToAuxInt(7)
10345		v.AddArg(x)
10346		return true
10347	}
10348	return false
10349}
10350func rewriteValue386_OpRsh8x8(v *Value) bool {
10351	v_1 := v.Args[1]
10352	v_0 := v.Args[0]
10353	b := v.Block
10354	// match: (Rsh8x8 <t> x y)
10355	// cond: !shiftIsBounded(v)
10356	// result: (SARB <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPBconst y [8])))))
10357	for {
10358		t := v.Type
10359		x := v_0
10360		y := v_1
10361		if !(!shiftIsBounded(v)) {
10362			break
10363		}
10364		v.reset(Op386SARB)
10365		v.Type = t
10366		v0 := b.NewValue0(v.Pos, Op386ORL, y.Type)
10367		v1 := b.NewValue0(v.Pos, Op386NOTL, y.Type)
10368		v2 := b.NewValue0(v.Pos, Op386SBBLcarrymask, y.Type)
10369		v3 := b.NewValue0(v.Pos, Op386CMPBconst, types.TypeFlags)
10370		v3.AuxInt = int8ToAuxInt(8)
10371		v3.AddArg(y)
10372		v2.AddArg(v3)
10373		v1.AddArg(v2)
10374		v0.AddArg2(y, v1)
10375		v.AddArg2(x, v0)
10376		return true
10377	}
10378	// match: (Rsh8x8 <t> x y)
10379	// cond: shiftIsBounded(v)
10380	// result: (SARB x y)
10381	for {
10382		x := v_0
10383		y := v_1
10384		if !(shiftIsBounded(v)) {
10385			break
10386		}
10387		v.reset(Op386SARB)
10388		v.AddArg2(x, y)
10389		return true
10390	}
10391	return false
10392}
10393func rewriteValue386_OpSelect0(v *Value) bool {
10394	v_0 := v.Args[0]
10395	b := v.Block
10396	typ := &b.Func.Config.Types
10397	// match: (Select0 (Mul32uover x y))
10398	// result: (Select0 <typ.UInt32> (MULLU x y))
10399	for {
10400		if v_0.Op != OpMul32uover {
10401			break
10402		}
10403		y := v_0.Args[1]
10404		x := v_0.Args[0]
10405		v.reset(OpSelect0)
10406		v.Type = typ.UInt32
10407		v0 := b.NewValue0(v.Pos, Op386MULLU, types.NewTuple(typ.UInt32, types.TypeFlags))
10408		v0.AddArg2(x, y)
10409		v.AddArg(v0)
10410		return true
10411	}
10412	return false
10413}
10414func rewriteValue386_OpSelect1(v *Value) bool {
10415	v_0 := v.Args[0]
10416	b := v.Block
10417	typ := &b.Func.Config.Types
10418	// match: (Select1 (Mul32uover x y))
10419	// result: (SETO (Select1 <types.TypeFlags> (MULLU x y)))
10420	for {
10421		if v_0.Op != OpMul32uover {
10422			break
10423		}
10424		y := v_0.Args[1]
10425		x := v_0.Args[0]
10426		v.reset(Op386SETO)
10427		v0 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
10428		v1 := b.NewValue0(v.Pos, Op386MULLU, types.NewTuple(typ.UInt32, types.TypeFlags))
10429		v1.AddArg2(x, y)
10430		v0.AddArg(v1)
10431		v.AddArg(v0)
10432		return true
10433	}
10434	return false
10435}
10436func rewriteValue386_OpSignmask(v *Value) bool {
10437	v_0 := v.Args[0]
10438	// match: (Signmask x)
10439	// result: (SARLconst x [31])
10440	for {
10441		x := v_0
10442		v.reset(Op386SARLconst)
10443		v.AuxInt = int32ToAuxInt(31)
10444		v.AddArg(x)
10445		return true
10446	}
10447}
10448func rewriteValue386_OpSlicemask(v *Value) bool {
10449	v_0 := v.Args[0]
10450	b := v.Block
10451	// match: (Slicemask <t> x)
10452	// result: (SARLconst (NEGL <t> x) [31])
10453	for {
10454		t := v.Type
10455		x := v_0
10456		v.reset(Op386SARLconst)
10457		v.AuxInt = int32ToAuxInt(31)
10458		v0 := b.NewValue0(v.Pos, Op386NEGL, t)
10459		v0.AddArg(x)
10460		v.AddArg(v0)
10461		return true
10462	}
10463}
10464func rewriteValue386_OpStore(v *Value) bool {
10465	v_2 := v.Args[2]
10466	v_1 := v.Args[1]
10467	v_0 := v.Args[0]
10468	// match: (Store {t} ptr val mem)
10469	// cond: t.Size() == 8 && t.IsFloat()
10470	// result: (MOVSDstore ptr val mem)
10471	for {
10472		t := auxToType(v.Aux)
10473		ptr := v_0
10474		val := v_1
10475		mem := v_2
10476		if !(t.Size() == 8 && t.IsFloat()) {
10477			break
10478		}
10479		v.reset(Op386MOVSDstore)
10480		v.AddArg3(ptr, val, mem)
10481		return true
10482	}
10483	// match: (Store {t} ptr val mem)
10484	// cond: t.Size() == 4 && t.IsFloat()
10485	// result: (MOVSSstore ptr val mem)
10486	for {
10487		t := auxToType(v.Aux)
10488		ptr := v_0
10489		val := v_1
10490		mem := v_2
10491		if !(t.Size() == 4 && t.IsFloat()) {
10492			break
10493		}
10494		v.reset(Op386MOVSSstore)
10495		v.AddArg3(ptr, val, mem)
10496		return true
10497	}
10498	// match: (Store {t} ptr val mem)
10499	// cond: t.Size() == 4 && !t.IsFloat()
10500	// result: (MOVLstore ptr val mem)
10501	for {
10502		t := auxToType(v.Aux)
10503		ptr := v_0
10504		val := v_1
10505		mem := v_2
10506		if !(t.Size() == 4 && !t.IsFloat()) {
10507			break
10508		}
10509		v.reset(Op386MOVLstore)
10510		v.AddArg3(ptr, val, mem)
10511		return true
10512	}
10513	// match: (Store {t} ptr val mem)
10514	// cond: t.Size() == 2
10515	// result: (MOVWstore ptr val mem)
10516	for {
10517		t := auxToType(v.Aux)
10518		ptr := v_0
10519		val := v_1
10520		mem := v_2
10521		if !(t.Size() == 2) {
10522			break
10523		}
10524		v.reset(Op386MOVWstore)
10525		v.AddArg3(ptr, val, mem)
10526		return true
10527	}
10528	// match: (Store {t} ptr val mem)
10529	// cond: t.Size() == 1
10530	// result: (MOVBstore ptr val mem)
10531	for {
10532		t := auxToType(v.Aux)
10533		ptr := v_0
10534		val := v_1
10535		mem := v_2
10536		if !(t.Size() == 1) {
10537			break
10538		}
10539		v.reset(Op386MOVBstore)
10540		v.AddArg3(ptr, val, mem)
10541		return true
10542	}
10543	return false
10544}
10545func rewriteValue386_OpZero(v *Value) bool {
10546	v_1 := v.Args[1]
10547	v_0 := v.Args[0]
10548	b := v.Block
10549	config := b.Func.Config
10550	typ := &b.Func.Config.Types
10551	// match: (Zero [0] _ mem)
10552	// result: mem
10553	for {
10554		if auxIntToInt64(v.AuxInt) != 0 {
10555			break
10556		}
10557		mem := v_1
10558		v.copyOf(mem)
10559		return true
10560	}
10561	// match: (Zero [1] destptr mem)
10562	// result: (MOVBstoreconst [0] destptr mem)
10563	for {
10564		if auxIntToInt64(v.AuxInt) != 1 {
10565			break
10566		}
10567		destptr := v_0
10568		mem := v_1
10569		v.reset(Op386MOVBstoreconst)
10570		v.AuxInt = valAndOffToAuxInt(0)
10571		v.AddArg2(destptr, mem)
10572		return true
10573	}
10574	// match: (Zero [2] destptr mem)
10575	// result: (MOVWstoreconst [0] destptr mem)
10576	for {
10577		if auxIntToInt64(v.AuxInt) != 2 {
10578			break
10579		}
10580		destptr := v_0
10581		mem := v_1
10582		v.reset(Op386MOVWstoreconst)
10583		v.AuxInt = valAndOffToAuxInt(0)
10584		v.AddArg2(destptr, mem)
10585		return true
10586	}
10587	// match: (Zero [4] destptr mem)
10588	// result: (MOVLstoreconst [0] destptr mem)
10589	for {
10590		if auxIntToInt64(v.AuxInt) != 4 {
10591			break
10592		}
10593		destptr := v_0
10594		mem := v_1
10595		v.reset(Op386MOVLstoreconst)
10596		v.AuxInt = valAndOffToAuxInt(0)
10597		v.AddArg2(destptr, mem)
10598		return true
10599	}
10600	// match: (Zero [3] destptr mem)
10601	// result: (MOVBstoreconst [makeValAndOff(0,2)] destptr (MOVWstoreconst [makeValAndOff(0,0)] destptr mem))
10602	for {
10603		if auxIntToInt64(v.AuxInt) != 3 {
10604			break
10605		}
10606		destptr := v_0
10607		mem := v_1
10608		v.reset(Op386MOVBstoreconst)
10609		v.AuxInt = valAndOffToAuxInt(makeValAndOff(0, 2))
10610		v0 := b.NewValue0(v.Pos, Op386MOVWstoreconst, types.TypeMem)
10611		v0.AuxInt = valAndOffToAuxInt(makeValAndOff(0, 0))
10612		v0.AddArg2(destptr, mem)
10613		v.AddArg2(destptr, v0)
10614		return true
10615	}
10616	// match: (Zero [5] destptr mem)
10617	// result: (MOVBstoreconst [makeValAndOff(0,4)] destptr (MOVLstoreconst [makeValAndOff(0,0)] destptr mem))
10618	for {
10619		if auxIntToInt64(v.AuxInt) != 5 {
10620			break
10621		}
10622		destptr := v_0
10623		mem := v_1
10624		v.reset(Op386MOVBstoreconst)
10625		v.AuxInt = valAndOffToAuxInt(makeValAndOff(0, 4))
10626		v0 := b.NewValue0(v.Pos, Op386MOVLstoreconst, types.TypeMem)
10627		v0.AuxInt = valAndOffToAuxInt(makeValAndOff(0, 0))
10628		v0.AddArg2(destptr, mem)
10629		v.AddArg2(destptr, v0)
10630		return true
10631	}
10632	// match: (Zero [6] destptr mem)
10633	// result: (MOVWstoreconst [makeValAndOff(0,4)] destptr (MOVLstoreconst [makeValAndOff(0,0)] destptr mem))
10634	for {
10635		if auxIntToInt64(v.AuxInt) != 6 {
10636			break
10637		}
10638		destptr := v_0
10639		mem := v_1
10640		v.reset(Op386MOVWstoreconst)
10641		v.AuxInt = valAndOffToAuxInt(makeValAndOff(0, 4))
10642		v0 := b.NewValue0(v.Pos, Op386MOVLstoreconst, types.TypeMem)
10643		v0.AuxInt = valAndOffToAuxInt(makeValAndOff(0, 0))
10644		v0.AddArg2(destptr, mem)
10645		v.AddArg2(destptr, v0)
10646		return true
10647	}
10648	// match: (Zero [7] destptr mem)
10649	// result: (MOVLstoreconst [makeValAndOff(0,3)] destptr (MOVLstoreconst [makeValAndOff(0,0)] destptr mem))
10650	for {
10651		if auxIntToInt64(v.AuxInt) != 7 {
10652			break
10653		}
10654		destptr := v_0
10655		mem := v_1
10656		v.reset(Op386MOVLstoreconst)
10657		v.AuxInt = valAndOffToAuxInt(makeValAndOff(0, 3))
10658		v0 := b.NewValue0(v.Pos, Op386MOVLstoreconst, types.TypeMem)
10659		v0.AuxInt = valAndOffToAuxInt(makeValAndOff(0, 0))
10660		v0.AddArg2(destptr, mem)
10661		v.AddArg2(destptr, v0)
10662		return true
10663	}
10664	// match: (Zero [s] destptr mem)
10665	// cond: s%4 != 0 && s > 4
10666	// result: (Zero [s-s%4] (ADDLconst destptr [int32(s%4)]) (MOVLstoreconst [0] destptr mem))
10667	for {
10668		s := auxIntToInt64(v.AuxInt)
10669		destptr := v_0
10670		mem := v_1
10671		if !(s%4 != 0 && s > 4) {
10672			break
10673		}
10674		v.reset(OpZero)
10675		v.AuxInt = int64ToAuxInt(s - s%4)
10676		v0 := b.NewValue0(v.Pos, Op386ADDLconst, typ.UInt32)
10677		v0.AuxInt = int32ToAuxInt(int32(s % 4))
10678		v0.AddArg(destptr)
10679		v1 := b.NewValue0(v.Pos, Op386MOVLstoreconst, types.TypeMem)
10680		v1.AuxInt = valAndOffToAuxInt(0)
10681		v1.AddArg2(destptr, mem)
10682		v.AddArg2(v0, v1)
10683		return true
10684	}
10685	// match: (Zero [8] destptr mem)
10686	// result: (MOVLstoreconst [makeValAndOff(0,4)] destptr (MOVLstoreconst [makeValAndOff(0,0)] destptr mem))
10687	for {
10688		if auxIntToInt64(v.AuxInt) != 8 {
10689			break
10690		}
10691		destptr := v_0
10692		mem := v_1
10693		v.reset(Op386MOVLstoreconst)
10694		v.AuxInt = valAndOffToAuxInt(makeValAndOff(0, 4))
10695		v0 := b.NewValue0(v.Pos, Op386MOVLstoreconst, types.TypeMem)
10696		v0.AuxInt = valAndOffToAuxInt(makeValAndOff(0, 0))
10697		v0.AddArg2(destptr, mem)
10698		v.AddArg2(destptr, v0)
10699		return true
10700	}
10701	// match: (Zero [12] destptr mem)
10702	// result: (MOVLstoreconst [makeValAndOff(0,8)] destptr (MOVLstoreconst [makeValAndOff(0,4)] destptr (MOVLstoreconst [makeValAndOff(0,0)] destptr mem)))
10703	for {
10704		if auxIntToInt64(v.AuxInt) != 12 {
10705			break
10706		}
10707		destptr := v_0
10708		mem := v_1
10709		v.reset(Op386MOVLstoreconst)
10710		v.AuxInt = valAndOffToAuxInt(makeValAndOff(0, 8))
10711		v0 := b.NewValue0(v.Pos, Op386MOVLstoreconst, types.TypeMem)
10712		v0.AuxInt = valAndOffToAuxInt(makeValAndOff(0, 4))
10713		v1 := b.NewValue0(v.Pos, Op386MOVLstoreconst, types.TypeMem)
10714		v1.AuxInt = valAndOffToAuxInt(makeValAndOff(0, 0))
10715		v1.AddArg2(destptr, mem)
10716		v0.AddArg2(destptr, v1)
10717		v.AddArg2(destptr, v0)
10718		return true
10719	}
10720	// match: (Zero [16] destptr mem)
10721	// result: (MOVLstoreconst [makeValAndOff(0,12)] destptr (MOVLstoreconst [makeValAndOff(0,8)] destptr (MOVLstoreconst [makeValAndOff(0,4)] destptr (MOVLstoreconst [makeValAndOff(0,0)] destptr mem))))
10722	for {
10723		if auxIntToInt64(v.AuxInt) != 16 {
10724			break
10725		}
10726		destptr := v_0
10727		mem := v_1
10728		v.reset(Op386MOVLstoreconst)
10729		v.AuxInt = valAndOffToAuxInt(makeValAndOff(0, 12))
10730		v0 := b.NewValue0(v.Pos, Op386MOVLstoreconst, types.TypeMem)
10731		v0.AuxInt = valAndOffToAuxInt(makeValAndOff(0, 8))
10732		v1 := b.NewValue0(v.Pos, Op386MOVLstoreconst, types.TypeMem)
10733		v1.AuxInt = valAndOffToAuxInt(makeValAndOff(0, 4))
10734		v2 := b.NewValue0(v.Pos, Op386MOVLstoreconst, types.TypeMem)
10735		v2.AuxInt = valAndOffToAuxInt(makeValAndOff(0, 0))
10736		v2.AddArg2(destptr, mem)
10737		v1.AddArg2(destptr, v2)
10738		v0.AddArg2(destptr, v1)
10739		v.AddArg2(destptr, v0)
10740		return true
10741	}
10742	// match: (Zero [s] destptr mem)
10743	// cond: s > 16 && s <= 4*128 && s%4 == 0 && !config.noDuffDevice
10744	// result: (DUFFZERO [1*(128-s/4)] destptr (MOVLconst [0]) mem)
10745	for {
10746		s := auxIntToInt64(v.AuxInt)
10747		destptr := v_0
10748		mem := v_1
10749		if !(s > 16 && s <= 4*128 && s%4 == 0 && !config.noDuffDevice) {
10750			break
10751		}
10752		v.reset(Op386DUFFZERO)
10753		v.AuxInt = int64ToAuxInt(1 * (128 - s/4))
10754		v0 := b.NewValue0(v.Pos, Op386MOVLconst, typ.UInt32)
10755		v0.AuxInt = int32ToAuxInt(0)
10756		v.AddArg3(destptr, v0, mem)
10757		return true
10758	}
10759	// match: (Zero [s] destptr mem)
10760	// cond: (s > 4*128 || (config.noDuffDevice && s > 16)) && s%4 == 0
10761	// result: (REPSTOSL destptr (MOVLconst [int32(s/4)]) (MOVLconst [0]) mem)
10762	for {
10763		s := auxIntToInt64(v.AuxInt)
10764		destptr := v_0
10765		mem := v_1
10766		if !((s > 4*128 || (config.noDuffDevice && s > 16)) && s%4 == 0) {
10767			break
10768		}
10769		v.reset(Op386REPSTOSL)
10770		v0 := b.NewValue0(v.Pos, Op386MOVLconst, typ.UInt32)
10771		v0.AuxInt = int32ToAuxInt(int32(s / 4))
10772		v1 := b.NewValue0(v.Pos, Op386MOVLconst, typ.UInt32)
10773		v1.AuxInt = int32ToAuxInt(0)
10774		v.AddArg4(destptr, v0, v1, mem)
10775		return true
10776	}
10777	return false
10778}
10779func rewriteValue386_OpZeromask(v *Value) bool {
10780	v_0 := v.Args[0]
10781	b := v.Block
10782	// match: (Zeromask <t> x)
10783	// result: (XORLconst [-1] (SBBLcarrymask <t> (CMPLconst x [1])))
10784	for {
10785		t := v.Type
10786		x := v_0
10787		v.reset(Op386XORLconst)
10788		v.AuxInt = int32ToAuxInt(-1)
10789		v0 := b.NewValue0(v.Pos, Op386SBBLcarrymask, t)
10790		v1 := b.NewValue0(v.Pos, Op386CMPLconst, types.TypeFlags)
10791		v1.AuxInt = int32ToAuxInt(1)
10792		v1.AddArg(x)
10793		v0.AddArg(v1)
10794		v.AddArg(v0)
10795		return true
10796	}
10797}
10798func rewriteBlock386(b *Block) bool {
10799	switch b.Kind {
10800	case Block386EQ:
10801		// match: (EQ (InvertFlags cmp) yes no)
10802		// result: (EQ cmp yes no)
10803		for b.Controls[0].Op == Op386InvertFlags {
10804			v_0 := b.Controls[0]
10805			cmp := v_0.Args[0]
10806			b.resetWithControl(Block386EQ, cmp)
10807			return true
10808		}
10809		// match: (EQ (FlagEQ) yes no)
10810		// result: (First yes no)
10811		for b.Controls[0].Op == Op386FlagEQ {
10812			b.Reset(BlockFirst)
10813			return true
10814		}
10815		// match: (EQ (FlagLT_ULT) yes no)
10816		// result: (First no yes)
10817		for b.Controls[0].Op == Op386FlagLT_ULT {
10818			b.Reset(BlockFirst)
10819			b.swapSuccessors()
10820			return true
10821		}
10822		// match: (EQ (FlagLT_UGT) yes no)
10823		// result: (First no yes)
10824		for b.Controls[0].Op == Op386FlagLT_UGT {
10825			b.Reset(BlockFirst)
10826			b.swapSuccessors()
10827			return true
10828		}
10829		// match: (EQ (FlagGT_ULT) yes no)
10830		// result: (First no yes)
10831		for b.Controls[0].Op == Op386FlagGT_ULT {
10832			b.Reset(BlockFirst)
10833			b.swapSuccessors()
10834			return true
10835		}
10836		// match: (EQ (FlagGT_UGT) yes no)
10837		// result: (First no yes)
10838		for b.Controls[0].Op == Op386FlagGT_UGT {
10839			b.Reset(BlockFirst)
10840			b.swapSuccessors()
10841			return true
10842		}
10843	case Block386GE:
10844		// match: (GE (InvertFlags cmp) yes no)
10845		// result: (LE cmp yes no)
10846		for b.Controls[0].Op == Op386InvertFlags {
10847			v_0 := b.Controls[0]
10848			cmp := v_0.Args[0]
10849			b.resetWithControl(Block386LE, cmp)
10850			return true
10851		}
10852		// match: (GE (FlagEQ) yes no)
10853		// result: (First yes no)
10854		for b.Controls[0].Op == Op386FlagEQ {
10855			b.Reset(BlockFirst)
10856			return true
10857		}
10858		// match: (GE (FlagLT_ULT) yes no)
10859		// result: (First no yes)
10860		for b.Controls[0].Op == Op386FlagLT_ULT {
10861			b.Reset(BlockFirst)
10862			b.swapSuccessors()
10863			return true
10864		}
10865		// match: (GE (FlagLT_UGT) yes no)
10866		// result: (First no yes)
10867		for b.Controls[0].Op == Op386FlagLT_UGT {
10868			b.Reset(BlockFirst)
10869			b.swapSuccessors()
10870			return true
10871		}
10872		// match: (GE (FlagGT_ULT) yes no)
10873		// result: (First yes no)
10874		for b.Controls[0].Op == Op386FlagGT_ULT {
10875			b.Reset(BlockFirst)
10876			return true
10877		}
10878		// match: (GE (FlagGT_UGT) yes no)
10879		// result: (First yes no)
10880		for b.Controls[0].Op == Op386FlagGT_UGT {
10881			b.Reset(BlockFirst)
10882			return true
10883		}
10884	case Block386GT:
10885		// match: (GT (InvertFlags cmp) yes no)
10886		// result: (LT cmp yes no)
10887		for b.Controls[0].Op == Op386InvertFlags {
10888			v_0 := b.Controls[0]
10889			cmp := v_0.Args[0]
10890			b.resetWithControl(Block386LT, cmp)
10891			return true
10892		}
10893		// match: (GT (FlagEQ) yes no)
10894		// result: (First no yes)
10895		for b.Controls[0].Op == Op386FlagEQ {
10896			b.Reset(BlockFirst)
10897			b.swapSuccessors()
10898			return true
10899		}
10900		// match: (GT (FlagLT_ULT) yes no)
10901		// result: (First no yes)
10902		for b.Controls[0].Op == Op386FlagLT_ULT {
10903			b.Reset(BlockFirst)
10904			b.swapSuccessors()
10905			return true
10906		}
10907		// match: (GT (FlagLT_UGT) yes no)
10908		// result: (First no yes)
10909		for b.Controls[0].Op == Op386FlagLT_UGT {
10910			b.Reset(BlockFirst)
10911			b.swapSuccessors()
10912			return true
10913		}
10914		// match: (GT (FlagGT_ULT) yes no)
10915		// result: (First yes no)
10916		for b.Controls[0].Op == Op386FlagGT_ULT {
10917			b.Reset(BlockFirst)
10918			return true
10919		}
10920		// match: (GT (FlagGT_UGT) yes no)
10921		// result: (First yes no)
10922		for b.Controls[0].Op == Op386FlagGT_UGT {
10923			b.Reset(BlockFirst)
10924			return true
10925		}
10926	case BlockIf:
10927		// match: (If (SETL cmp) yes no)
10928		// result: (LT cmp yes no)
10929		for b.Controls[0].Op == Op386SETL {
10930			v_0 := b.Controls[0]
10931			cmp := v_0.Args[0]
10932			b.resetWithControl(Block386LT, cmp)
10933			return true
10934		}
10935		// match: (If (SETLE cmp) yes no)
10936		// result: (LE cmp yes no)
10937		for b.Controls[0].Op == Op386SETLE {
10938			v_0 := b.Controls[0]
10939			cmp := v_0.Args[0]
10940			b.resetWithControl(Block386LE, cmp)
10941			return true
10942		}
10943		// match: (If (SETG cmp) yes no)
10944		// result: (GT cmp yes no)
10945		for b.Controls[0].Op == Op386SETG {
10946			v_0 := b.Controls[0]
10947			cmp := v_0.Args[0]
10948			b.resetWithControl(Block386GT, cmp)
10949			return true
10950		}
10951		// match: (If (SETGE cmp) yes no)
10952		// result: (GE cmp yes no)
10953		for b.Controls[0].Op == Op386SETGE {
10954			v_0 := b.Controls[0]
10955			cmp := v_0.Args[0]
10956			b.resetWithControl(Block386GE, cmp)
10957			return true
10958		}
10959		// match: (If (SETEQ cmp) yes no)
10960		// result: (EQ cmp yes no)
10961		for b.Controls[0].Op == Op386SETEQ {
10962			v_0 := b.Controls[0]
10963			cmp := v_0.Args[0]
10964			b.resetWithControl(Block386EQ, cmp)
10965			return true
10966		}
10967		// match: (If (SETNE cmp) yes no)
10968		// result: (NE cmp yes no)
10969		for b.Controls[0].Op == Op386SETNE {
10970			v_0 := b.Controls[0]
10971			cmp := v_0.Args[0]
10972			b.resetWithControl(Block386NE, cmp)
10973			return true
10974		}
10975		// match: (If (SETB cmp) yes no)
10976		// result: (ULT cmp yes no)
10977		for b.Controls[0].Op == Op386SETB {
10978			v_0 := b.Controls[0]
10979			cmp := v_0.Args[0]
10980			b.resetWithControl(Block386ULT, cmp)
10981			return true
10982		}
10983		// match: (If (SETBE cmp) yes no)
10984		// result: (ULE cmp yes no)
10985		for b.Controls[0].Op == Op386SETBE {
10986			v_0 := b.Controls[0]
10987			cmp := v_0.Args[0]
10988			b.resetWithControl(Block386ULE, cmp)
10989			return true
10990		}
10991		// match: (If (SETA cmp) yes no)
10992		// result: (UGT cmp yes no)
10993		for b.Controls[0].Op == Op386SETA {
10994			v_0 := b.Controls[0]
10995			cmp := v_0.Args[0]
10996			b.resetWithControl(Block386UGT, cmp)
10997			return true
10998		}
10999		// match: (If (SETAE cmp) yes no)
11000		// result: (UGE cmp yes no)
11001		for b.Controls[0].Op == Op386SETAE {
11002			v_0 := b.Controls[0]
11003			cmp := v_0.Args[0]
11004			b.resetWithControl(Block386UGE, cmp)
11005			return true
11006		}
11007		// match: (If (SETO cmp) yes no)
11008		// result: (OS cmp yes no)
11009		for b.Controls[0].Op == Op386SETO {
11010			v_0 := b.Controls[0]
11011			cmp := v_0.Args[0]
11012			b.resetWithControl(Block386OS, cmp)
11013			return true
11014		}
11015		// match: (If (SETGF cmp) yes no)
11016		// result: (UGT cmp yes no)
11017		for b.Controls[0].Op == Op386SETGF {
11018			v_0 := b.Controls[0]
11019			cmp := v_0.Args[0]
11020			b.resetWithControl(Block386UGT, cmp)
11021			return true
11022		}
11023		// match: (If (SETGEF cmp) yes no)
11024		// result: (UGE cmp yes no)
11025		for b.Controls[0].Op == Op386SETGEF {
11026			v_0 := b.Controls[0]
11027			cmp := v_0.Args[0]
11028			b.resetWithControl(Block386UGE, cmp)
11029			return true
11030		}
11031		// match: (If (SETEQF cmp) yes no)
11032		// result: (EQF cmp yes no)
11033		for b.Controls[0].Op == Op386SETEQF {
11034			v_0 := b.Controls[0]
11035			cmp := v_0.Args[0]
11036			b.resetWithControl(Block386EQF, cmp)
11037			return true
11038		}
11039		// match: (If (SETNEF cmp) yes no)
11040		// result: (NEF cmp yes no)
11041		for b.Controls[0].Op == Op386SETNEF {
11042			v_0 := b.Controls[0]
11043			cmp := v_0.Args[0]
11044			b.resetWithControl(Block386NEF, cmp)
11045			return true
11046		}
11047		// match: (If cond yes no)
11048		// result: (NE (TESTB cond cond) yes no)
11049		for {
11050			cond := b.Controls[0]
11051			v0 := b.NewValue0(cond.Pos, Op386TESTB, types.TypeFlags)
11052			v0.AddArg2(cond, cond)
11053			b.resetWithControl(Block386NE, v0)
11054			return true
11055		}
11056	case Block386LE:
11057		// match: (LE (InvertFlags cmp) yes no)
11058		// result: (GE cmp yes no)
11059		for b.Controls[0].Op == Op386InvertFlags {
11060			v_0 := b.Controls[0]
11061			cmp := v_0.Args[0]
11062			b.resetWithControl(Block386GE, cmp)
11063			return true
11064		}
11065		// match: (LE (FlagEQ) yes no)
11066		// result: (First yes no)
11067		for b.Controls[0].Op == Op386FlagEQ {
11068			b.Reset(BlockFirst)
11069			return true
11070		}
11071		// match: (LE (FlagLT_ULT) yes no)
11072		// result: (First yes no)
11073		for b.Controls[0].Op == Op386FlagLT_ULT {
11074			b.Reset(BlockFirst)
11075			return true
11076		}
11077		// match: (LE (FlagLT_UGT) yes no)
11078		// result: (First yes no)
11079		for b.Controls[0].Op == Op386FlagLT_UGT {
11080			b.Reset(BlockFirst)
11081			return true
11082		}
11083		// match: (LE (FlagGT_ULT) yes no)
11084		// result: (First no yes)
11085		for b.Controls[0].Op == Op386FlagGT_ULT {
11086			b.Reset(BlockFirst)
11087			b.swapSuccessors()
11088			return true
11089		}
11090		// match: (LE (FlagGT_UGT) yes no)
11091		// result: (First no yes)
11092		for b.Controls[0].Op == Op386FlagGT_UGT {
11093			b.Reset(BlockFirst)
11094			b.swapSuccessors()
11095			return true
11096		}
11097	case Block386LT:
11098		// match: (LT (InvertFlags cmp) yes no)
11099		// result: (GT cmp yes no)
11100		for b.Controls[0].Op == Op386InvertFlags {
11101			v_0 := b.Controls[0]
11102			cmp := v_0.Args[0]
11103			b.resetWithControl(Block386GT, cmp)
11104			return true
11105		}
11106		// match: (LT (FlagEQ) yes no)
11107		// result: (First no yes)
11108		for b.Controls[0].Op == Op386FlagEQ {
11109			b.Reset(BlockFirst)
11110			b.swapSuccessors()
11111			return true
11112		}
11113		// match: (LT (FlagLT_ULT) yes no)
11114		// result: (First yes no)
11115		for b.Controls[0].Op == Op386FlagLT_ULT {
11116			b.Reset(BlockFirst)
11117			return true
11118		}
11119		// match: (LT (FlagLT_UGT) yes no)
11120		// result: (First yes no)
11121		for b.Controls[0].Op == Op386FlagLT_UGT {
11122			b.Reset(BlockFirst)
11123			return true
11124		}
11125		// match: (LT (FlagGT_ULT) yes no)
11126		// result: (First no yes)
11127		for b.Controls[0].Op == Op386FlagGT_ULT {
11128			b.Reset(BlockFirst)
11129			b.swapSuccessors()
11130			return true
11131		}
11132		// match: (LT (FlagGT_UGT) yes no)
11133		// result: (First no yes)
11134		for b.Controls[0].Op == Op386FlagGT_UGT {
11135			b.Reset(BlockFirst)
11136			b.swapSuccessors()
11137			return true
11138		}
11139	case Block386NE:
11140		// match: (NE (TESTB (SETL cmp) (SETL cmp)) yes no)
11141		// result: (LT cmp yes no)
11142		for b.Controls[0].Op == Op386TESTB {
11143			v_0 := b.Controls[0]
11144			_ = v_0.Args[1]
11145			v_0_0 := v_0.Args[0]
11146			if v_0_0.Op != Op386SETL {
11147				break
11148			}
11149			cmp := v_0_0.Args[0]
11150			v_0_1 := v_0.Args[1]
11151			if v_0_1.Op != Op386SETL || cmp != v_0_1.Args[0] {
11152				break
11153			}
11154			b.resetWithControl(Block386LT, cmp)
11155			return true
11156		}
11157		// match: (NE (TESTB (SETLE cmp) (SETLE cmp)) yes no)
11158		// result: (LE cmp yes no)
11159		for b.Controls[0].Op == Op386TESTB {
11160			v_0 := b.Controls[0]
11161			_ = v_0.Args[1]
11162			v_0_0 := v_0.Args[0]
11163			if v_0_0.Op != Op386SETLE {
11164				break
11165			}
11166			cmp := v_0_0.Args[0]
11167			v_0_1 := v_0.Args[1]
11168			if v_0_1.Op != Op386SETLE || cmp != v_0_1.Args[0] {
11169				break
11170			}
11171			b.resetWithControl(Block386LE, cmp)
11172			return true
11173		}
11174		// match: (NE (TESTB (SETG cmp) (SETG cmp)) yes no)
11175		// result: (GT cmp yes no)
11176		for b.Controls[0].Op == Op386TESTB {
11177			v_0 := b.Controls[0]
11178			_ = v_0.Args[1]
11179			v_0_0 := v_0.Args[0]
11180			if v_0_0.Op != Op386SETG {
11181				break
11182			}
11183			cmp := v_0_0.Args[0]
11184			v_0_1 := v_0.Args[1]
11185			if v_0_1.Op != Op386SETG || cmp != v_0_1.Args[0] {
11186				break
11187			}
11188			b.resetWithControl(Block386GT, cmp)
11189			return true
11190		}
11191		// match: (NE (TESTB (SETGE cmp) (SETGE cmp)) yes no)
11192		// result: (GE cmp yes no)
11193		for b.Controls[0].Op == Op386TESTB {
11194			v_0 := b.Controls[0]
11195			_ = v_0.Args[1]
11196			v_0_0 := v_0.Args[0]
11197			if v_0_0.Op != Op386SETGE {
11198				break
11199			}
11200			cmp := v_0_0.Args[0]
11201			v_0_1 := v_0.Args[1]
11202			if v_0_1.Op != Op386SETGE || cmp != v_0_1.Args[0] {
11203				break
11204			}
11205			b.resetWithControl(Block386GE, cmp)
11206			return true
11207		}
11208		// match: (NE (TESTB (SETEQ cmp) (SETEQ cmp)) yes no)
11209		// result: (EQ cmp yes no)
11210		for b.Controls[0].Op == Op386TESTB {
11211			v_0 := b.Controls[0]
11212			_ = v_0.Args[1]
11213			v_0_0 := v_0.Args[0]
11214			if v_0_0.Op != Op386SETEQ {
11215				break
11216			}
11217			cmp := v_0_0.Args[0]
11218			v_0_1 := v_0.Args[1]
11219			if v_0_1.Op != Op386SETEQ || cmp != v_0_1.Args[0] {
11220				break
11221			}
11222			b.resetWithControl(Block386EQ, cmp)
11223			return true
11224		}
11225		// match: (NE (TESTB (SETNE cmp) (SETNE cmp)) yes no)
11226		// result: (NE cmp yes no)
11227		for b.Controls[0].Op == Op386TESTB {
11228			v_0 := b.Controls[0]
11229			_ = v_0.Args[1]
11230			v_0_0 := v_0.Args[0]
11231			if v_0_0.Op != Op386SETNE {
11232				break
11233			}
11234			cmp := v_0_0.Args[0]
11235			v_0_1 := v_0.Args[1]
11236			if v_0_1.Op != Op386SETNE || cmp != v_0_1.Args[0] {
11237				break
11238			}
11239			b.resetWithControl(Block386NE, cmp)
11240			return true
11241		}
11242		// match: (NE (TESTB (SETB cmp) (SETB cmp)) yes no)
11243		// result: (ULT cmp yes no)
11244		for b.Controls[0].Op == Op386TESTB {
11245			v_0 := b.Controls[0]
11246			_ = v_0.Args[1]
11247			v_0_0 := v_0.Args[0]
11248			if v_0_0.Op != Op386SETB {
11249				break
11250			}
11251			cmp := v_0_0.Args[0]
11252			v_0_1 := v_0.Args[1]
11253			if v_0_1.Op != Op386SETB || cmp != v_0_1.Args[0] {
11254				break
11255			}
11256			b.resetWithControl(Block386ULT, cmp)
11257			return true
11258		}
11259		// match: (NE (TESTB (SETBE cmp) (SETBE cmp)) yes no)
11260		// result: (ULE cmp yes no)
11261		for b.Controls[0].Op == Op386TESTB {
11262			v_0 := b.Controls[0]
11263			_ = v_0.Args[1]
11264			v_0_0 := v_0.Args[0]
11265			if v_0_0.Op != Op386SETBE {
11266				break
11267			}
11268			cmp := v_0_0.Args[0]
11269			v_0_1 := v_0.Args[1]
11270			if v_0_1.Op != Op386SETBE || cmp != v_0_1.Args[0] {
11271				break
11272			}
11273			b.resetWithControl(Block386ULE, cmp)
11274			return true
11275		}
11276		// match: (NE (TESTB (SETA cmp) (SETA cmp)) yes no)
11277		// result: (UGT cmp yes no)
11278		for b.Controls[0].Op == Op386TESTB {
11279			v_0 := b.Controls[0]
11280			_ = v_0.Args[1]
11281			v_0_0 := v_0.Args[0]
11282			if v_0_0.Op != Op386SETA {
11283				break
11284			}
11285			cmp := v_0_0.Args[0]
11286			v_0_1 := v_0.Args[1]
11287			if v_0_1.Op != Op386SETA || cmp != v_0_1.Args[0] {
11288				break
11289			}
11290			b.resetWithControl(Block386UGT, cmp)
11291			return true
11292		}
11293		// match: (NE (TESTB (SETAE cmp) (SETAE cmp)) yes no)
11294		// result: (UGE cmp yes no)
11295		for b.Controls[0].Op == Op386TESTB {
11296			v_0 := b.Controls[0]
11297			_ = v_0.Args[1]
11298			v_0_0 := v_0.Args[0]
11299			if v_0_0.Op != Op386SETAE {
11300				break
11301			}
11302			cmp := v_0_0.Args[0]
11303			v_0_1 := v_0.Args[1]
11304			if v_0_1.Op != Op386SETAE || cmp != v_0_1.Args[0] {
11305				break
11306			}
11307			b.resetWithControl(Block386UGE, cmp)
11308			return true
11309		}
11310		// match: (NE (TESTB (SETO cmp) (SETO cmp)) yes no)
11311		// result: (OS cmp yes no)
11312		for b.Controls[0].Op == Op386TESTB {
11313			v_0 := b.Controls[0]
11314			_ = v_0.Args[1]
11315			v_0_0 := v_0.Args[0]
11316			if v_0_0.Op != Op386SETO {
11317				break
11318			}
11319			cmp := v_0_0.Args[0]
11320			v_0_1 := v_0.Args[1]
11321			if v_0_1.Op != Op386SETO || cmp != v_0_1.Args[0] {
11322				break
11323			}
11324			b.resetWithControl(Block386OS, cmp)
11325			return true
11326		}
11327		// match: (NE (TESTB (SETGF cmp) (SETGF cmp)) yes no)
11328		// result: (UGT cmp yes no)
11329		for b.Controls[0].Op == Op386TESTB {
11330			v_0 := b.Controls[0]
11331			_ = v_0.Args[1]
11332			v_0_0 := v_0.Args[0]
11333			if v_0_0.Op != Op386SETGF {
11334				break
11335			}
11336			cmp := v_0_0.Args[0]
11337			v_0_1 := v_0.Args[1]
11338			if v_0_1.Op != Op386SETGF || cmp != v_0_1.Args[0] {
11339				break
11340			}
11341			b.resetWithControl(Block386UGT, cmp)
11342			return true
11343		}
11344		// match: (NE (TESTB (SETGEF cmp) (SETGEF cmp)) yes no)
11345		// result: (UGE cmp yes no)
11346		for b.Controls[0].Op == Op386TESTB {
11347			v_0 := b.Controls[0]
11348			_ = v_0.Args[1]
11349			v_0_0 := v_0.Args[0]
11350			if v_0_0.Op != Op386SETGEF {
11351				break
11352			}
11353			cmp := v_0_0.Args[0]
11354			v_0_1 := v_0.Args[1]
11355			if v_0_1.Op != Op386SETGEF || cmp != v_0_1.Args[0] {
11356				break
11357			}
11358			b.resetWithControl(Block386UGE, cmp)
11359			return true
11360		}
11361		// match: (NE (TESTB (SETEQF cmp) (SETEQF cmp)) yes no)
11362		// result: (EQF cmp yes no)
11363		for b.Controls[0].Op == Op386TESTB {
11364			v_0 := b.Controls[0]
11365			_ = v_0.Args[1]
11366			v_0_0 := v_0.Args[0]
11367			if v_0_0.Op != Op386SETEQF {
11368				break
11369			}
11370			cmp := v_0_0.Args[0]
11371			v_0_1 := v_0.Args[1]
11372			if v_0_1.Op != Op386SETEQF || cmp != v_0_1.Args[0] {
11373				break
11374			}
11375			b.resetWithControl(Block386EQF, cmp)
11376			return true
11377		}
11378		// match: (NE (TESTB (SETNEF cmp) (SETNEF cmp)) yes no)
11379		// result: (NEF cmp yes no)
11380		for b.Controls[0].Op == Op386TESTB {
11381			v_0 := b.Controls[0]
11382			_ = v_0.Args[1]
11383			v_0_0 := v_0.Args[0]
11384			if v_0_0.Op != Op386SETNEF {
11385				break
11386			}
11387			cmp := v_0_0.Args[0]
11388			v_0_1 := v_0.Args[1]
11389			if v_0_1.Op != Op386SETNEF || cmp != v_0_1.Args[0] {
11390				break
11391			}
11392			b.resetWithControl(Block386NEF, cmp)
11393			return true
11394		}
11395		// match: (NE (InvertFlags cmp) yes no)
11396		// result: (NE cmp yes no)
11397		for b.Controls[0].Op == Op386InvertFlags {
11398			v_0 := b.Controls[0]
11399			cmp := v_0.Args[0]
11400			b.resetWithControl(Block386NE, cmp)
11401			return true
11402		}
11403		// match: (NE (FlagEQ) yes no)
11404		// result: (First no yes)
11405		for b.Controls[0].Op == Op386FlagEQ {
11406			b.Reset(BlockFirst)
11407			b.swapSuccessors()
11408			return true
11409		}
11410		// match: (NE (FlagLT_ULT) yes no)
11411		// result: (First yes no)
11412		for b.Controls[0].Op == Op386FlagLT_ULT {
11413			b.Reset(BlockFirst)
11414			return true
11415		}
11416		// match: (NE (FlagLT_UGT) yes no)
11417		// result: (First yes no)
11418		for b.Controls[0].Op == Op386FlagLT_UGT {
11419			b.Reset(BlockFirst)
11420			return true
11421		}
11422		// match: (NE (FlagGT_ULT) yes no)
11423		// result: (First yes no)
11424		for b.Controls[0].Op == Op386FlagGT_ULT {
11425			b.Reset(BlockFirst)
11426			return true
11427		}
11428		// match: (NE (FlagGT_UGT) yes no)
11429		// result: (First yes no)
11430		for b.Controls[0].Op == Op386FlagGT_UGT {
11431			b.Reset(BlockFirst)
11432			return true
11433		}
11434	case Block386UGE:
11435		// match: (UGE (InvertFlags cmp) yes no)
11436		// result: (ULE cmp yes no)
11437		for b.Controls[0].Op == Op386InvertFlags {
11438			v_0 := b.Controls[0]
11439			cmp := v_0.Args[0]
11440			b.resetWithControl(Block386ULE, cmp)
11441			return true
11442		}
11443		// match: (UGE (FlagEQ) yes no)
11444		// result: (First yes no)
11445		for b.Controls[0].Op == Op386FlagEQ {
11446			b.Reset(BlockFirst)
11447			return true
11448		}
11449		// match: (UGE (FlagLT_ULT) yes no)
11450		// result: (First no yes)
11451		for b.Controls[0].Op == Op386FlagLT_ULT {
11452			b.Reset(BlockFirst)
11453			b.swapSuccessors()
11454			return true
11455		}
11456		// match: (UGE (FlagLT_UGT) yes no)
11457		// result: (First yes no)
11458		for b.Controls[0].Op == Op386FlagLT_UGT {
11459			b.Reset(BlockFirst)
11460			return true
11461		}
11462		// match: (UGE (FlagGT_ULT) yes no)
11463		// result: (First no yes)
11464		for b.Controls[0].Op == Op386FlagGT_ULT {
11465			b.Reset(BlockFirst)
11466			b.swapSuccessors()
11467			return true
11468		}
11469		// match: (UGE (FlagGT_UGT) yes no)
11470		// result: (First yes no)
11471		for b.Controls[0].Op == Op386FlagGT_UGT {
11472			b.Reset(BlockFirst)
11473			return true
11474		}
11475	case Block386UGT:
11476		// match: (UGT (InvertFlags cmp) yes no)
11477		// result: (ULT cmp yes no)
11478		for b.Controls[0].Op == Op386InvertFlags {
11479			v_0 := b.Controls[0]
11480			cmp := v_0.Args[0]
11481			b.resetWithControl(Block386ULT, cmp)
11482			return true
11483		}
11484		// match: (UGT (FlagEQ) yes no)
11485		// result: (First no yes)
11486		for b.Controls[0].Op == Op386FlagEQ {
11487			b.Reset(BlockFirst)
11488			b.swapSuccessors()
11489			return true
11490		}
11491		// match: (UGT (FlagLT_ULT) yes no)
11492		// result: (First no yes)
11493		for b.Controls[0].Op == Op386FlagLT_ULT {
11494			b.Reset(BlockFirst)
11495			b.swapSuccessors()
11496			return true
11497		}
11498		// match: (UGT (FlagLT_UGT) yes no)
11499		// result: (First yes no)
11500		for b.Controls[0].Op == Op386FlagLT_UGT {
11501			b.Reset(BlockFirst)
11502			return true
11503		}
11504		// match: (UGT (FlagGT_ULT) yes no)
11505		// result: (First no yes)
11506		for b.Controls[0].Op == Op386FlagGT_ULT {
11507			b.Reset(BlockFirst)
11508			b.swapSuccessors()
11509			return true
11510		}
11511		// match: (UGT (FlagGT_UGT) yes no)
11512		// result: (First yes no)
11513		for b.Controls[0].Op == Op386FlagGT_UGT {
11514			b.Reset(BlockFirst)
11515			return true
11516		}
11517	case Block386ULE:
11518		// match: (ULE (InvertFlags cmp) yes no)
11519		// result: (UGE cmp yes no)
11520		for b.Controls[0].Op == Op386InvertFlags {
11521			v_0 := b.Controls[0]
11522			cmp := v_0.Args[0]
11523			b.resetWithControl(Block386UGE, cmp)
11524			return true
11525		}
11526		// match: (ULE (FlagEQ) yes no)
11527		// result: (First yes no)
11528		for b.Controls[0].Op == Op386FlagEQ {
11529			b.Reset(BlockFirst)
11530			return true
11531		}
11532		// match: (ULE (FlagLT_ULT) yes no)
11533		// result: (First yes no)
11534		for b.Controls[0].Op == Op386FlagLT_ULT {
11535			b.Reset(BlockFirst)
11536			return true
11537		}
11538		// match: (ULE (FlagLT_UGT) yes no)
11539		// result: (First no yes)
11540		for b.Controls[0].Op == Op386FlagLT_UGT {
11541			b.Reset(BlockFirst)
11542			b.swapSuccessors()
11543			return true
11544		}
11545		// match: (ULE (FlagGT_ULT) yes no)
11546		// result: (First yes no)
11547		for b.Controls[0].Op == Op386FlagGT_ULT {
11548			b.Reset(BlockFirst)
11549			return true
11550		}
11551		// match: (ULE (FlagGT_UGT) yes no)
11552		// result: (First no yes)
11553		for b.Controls[0].Op == Op386FlagGT_UGT {
11554			b.Reset(BlockFirst)
11555			b.swapSuccessors()
11556			return true
11557		}
11558	case Block386ULT:
11559		// match: (ULT (InvertFlags cmp) yes no)
11560		// result: (UGT cmp yes no)
11561		for b.Controls[0].Op == Op386InvertFlags {
11562			v_0 := b.Controls[0]
11563			cmp := v_0.Args[0]
11564			b.resetWithControl(Block386UGT, cmp)
11565			return true
11566		}
11567		// match: (ULT (FlagEQ) yes no)
11568		// result: (First no yes)
11569		for b.Controls[0].Op == Op386FlagEQ {
11570			b.Reset(BlockFirst)
11571			b.swapSuccessors()
11572			return true
11573		}
11574		// match: (ULT (FlagLT_ULT) yes no)
11575		// result: (First yes no)
11576		for b.Controls[0].Op == Op386FlagLT_ULT {
11577			b.Reset(BlockFirst)
11578			return true
11579		}
11580		// match: (ULT (FlagLT_UGT) yes no)
11581		// result: (First no yes)
11582		for b.Controls[0].Op == Op386FlagLT_UGT {
11583			b.Reset(BlockFirst)
11584			b.swapSuccessors()
11585			return true
11586		}
11587		// match: (ULT (FlagGT_ULT) yes no)
11588		// result: (First yes no)
11589		for b.Controls[0].Op == Op386FlagGT_ULT {
11590			b.Reset(BlockFirst)
11591			return true
11592		}
11593		// match: (ULT (FlagGT_UGT) yes no)
11594		// result: (First no yes)
11595		for b.Controls[0].Op == Op386FlagGT_UGT {
11596			b.Reset(BlockFirst)
11597			b.swapSuccessors()
11598			return true
11599		}
11600	}
11601	return false
11602}
11603