1// Code generated from _gen/AMD64latelower.rules using 'go generate'; DO NOT EDIT.
2
3package ssa
4
5import "internal/buildcfg"
6
7func rewriteValueAMD64latelower(v *Value) bool {
8	switch v.Op {
9	case OpAMD64MOVBQZX:
10		return rewriteValueAMD64latelower_OpAMD64MOVBQZX(v)
11	case OpAMD64MOVLQZX:
12		return rewriteValueAMD64latelower_OpAMD64MOVLQZX(v)
13	case OpAMD64MOVWQZX:
14		return rewriteValueAMD64latelower_OpAMD64MOVWQZX(v)
15	case OpAMD64SARL:
16		return rewriteValueAMD64latelower_OpAMD64SARL(v)
17	case OpAMD64SARQ:
18		return rewriteValueAMD64latelower_OpAMD64SARQ(v)
19	case OpAMD64SHLL:
20		return rewriteValueAMD64latelower_OpAMD64SHLL(v)
21	case OpAMD64SHLQ:
22		return rewriteValueAMD64latelower_OpAMD64SHLQ(v)
23	case OpAMD64SHRL:
24		return rewriteValueAMD64latelower_OpAMD64SHRL(v)
25	case OpAMD64SHRQ:
26		return rewriteValueAMD64latelower_OpAMD64SHRQ(v)
27	}
28	return false
29}
30func rewriteValueAMD64latelower_OpAMD64MOVBQZX(v *Value) bool {
31	v_0 := v.Args[0]
32	// match: (MOVBQZX x)
33	// cond: zeroUpper56Bits(x,3)
34	// result: x
35	for {
36		x := v_0
37		if !(zeroUpper56Bits(x, 3)) {
38			break
39		}
40		v.copyOf(x)
41		return true
42	}
43	return false
44}
45func rewriteValueAMD64latelower_OpAMD64MOVLQZX(v *Value) bool {
46	v_0 := v.Args[0]
47	// match: (MOVLQZX x)
48	// cond: zeroUpper32Bits(x,3)
49	// result: x
50	for {
51		x := v_0
52		if !(zeroUpper32Bits(x, 3)) {
53			break
54		}
55		v.copyOf(x)
56		return true
57	}
58	return false
59}
60func rewriteValueAMD64latelower_OpAMD64MOVWQZX(v *Value) bool {
61	v_0 := v.Args[0]
62	// match: (MOVWQZX x)
63	// cond: zeroUpper48Bits(x,3)
64	// result: x
65	for {
66		x := v_0
67		if !(zeroUpper48Bits(x, 3)) {
68			break
69		}
70		v.copyOf(x)
71		return true
72	}
73	return false
74}
75func rewriteValueAMD64latelower_OpAMD64SARL(v *Value) bool {
76	v_1 := v.Args[1]
77	v_0 := v.Args[0]
78	// match: (SARL x y)
79	// cond: buildcfg.GOAMD64 >= 3
80	// result: (SARXL x y)
81	for {
82		x := v_0
83		y := v_1
84		if !(buildcfg.GOAMD64 >= 3) {
85			break
86		}
87		v.reset(OpAMD64SARXL)
88		v.AddArg2(x, y)
89		return true
90	}
91	return false
92}
93func rewriteValueAMD64latelower_OpAMD64SARQ(v *Value) bool {
94	v_1 := v.Args[1]
95	v_0 := v.Args[0]
96	// match: (SARQ x y)
97	// cond: buildcfg.GOAMD64 >= 3
98	// result: (SARXQ x y)
99	for {
100		x := v_0
101		y := v_1
102		if !(buildcfg.GOAMD64 >= 3) {
103			break
104		}
105		v.reset(OpAMD64SARXQ)
106		v.AddArg2(x, y)
107		return true
108	}
109	return false
110}
111func rewriteValueAMD64latelower_OpAMD64SHLL(v *Value) bool {
112	v_1 := v.Args[1]
113	v_0 := v.Args[0]
114	// match: (SHLL x y)
115	// cond: buildcfg.GOAMD64 >= 3
116	// result: (SHLXL x y)
117	for {
118		x := v_0
119		y := v_1
120		if !(buildcfg.GOAMD64 >= 3) {
121			break
122		}
123		v.reset(OpAMD64SHLXL)
124		v.AddArg2(x, y)
125		return true
126	}
127	return false
128}
129func rewriteValueAMD64latelower_OpAMD64SHLQ(v *Value) bool {
130	v_1 := v.Args[1]
131	v_0 := v.Args[0]
132	// match: (SHLQ x y)
133	// cond: buildcfg.GOAMD64 >= 3
134	// result: (SHLXQ x y)
135	for {
136		x := v_0
137		y := v_1
138		if !(buildcfg.GOAMD64 >= 3) {
139			break
140		}
141		v.reset(OpAMD64SHLXQ)
142		v.AddArg2(x, y)
143		return true
144	}
145	return false
146}
147func rewriteValueAMD64latelower_OpAMD64SHRL(v *Value) bool {
148	v_1 := v.Args[1]
149	v_0 := v.Args[0]
150	// match: (SHRL x y)
151	// cond: buildcfg.GOAMD64 >= 3
152	// result: (SHRXL x y)
153	for {
154		x := v_0
155		y := v_1
156		if !(buildcfg.GOAMD64 >= 3) {
157			break
158		}
159		v.reset(OpAMD64SHRXL)
160		v.AddArg2(x, y)
161		return true
162	}
163	return false
164}
165func rewriteValueAMD64latelower_OpAMD64SHRQ(v *Value) bool {
166	v_1 := v.Args[1]
167	v_0 := v.Args[0]
168	// match: (SHRQ x y)
169	// cond: buildcfg.GOAMD64 >= 3
170	// result: (SHRXQ x y)
171	for {
172		x := v_0
173		y := v_1
174		if !(buildcfg.GOAMD64 >= 3) {
175			break
176		}
177		v.reset(OpAMD64SHRXQ)
178		v.AddArg2(x, y)
179		return true
180	}
181	return false
182}
183func rewriteBlockAMD64latelower(b *Block) bool {
184	return false
185}
186