xref: /btstack/port/samv71-xplained-atwilc3000/ASF/sam/utils/cmsis/samv71/include/instance/rtc.h (revision 1b2596b5303dd8caeea8565532c93cca8dab8cc4)
1 /**
2  * \file
3  *
4  * Copyright (c) 2015 Atmel Corporation. All rights reserved.
5  *
6  * \asf_license_start
7  *
8  * \page License
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions are met:
12  *
13  * 1. Redistributions of source code must retain the above copyright notice,
14  *    this list of conditions and the following disclaimer.
15  *
16  * 2. Redistributions in binary form must reproduce the above copyright notice,
17  *    this list of conditions and the following disclaimer in the documentation
18  *    and/or other materials provided with the distribution.
19  *
20  * 3. The name of Atmel may not be used to endorse or promote products derived
21  *    from this software without specific prior written permission.
22  *
23  * 4. This software may only be redistributed and used in connection with an
24  *    Atmel microcontroller product.
25  *
26  * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
27  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
28  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
29  * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
30  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
34  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
35  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  *
38  * \asf_license_stop
39  *
40  */
41 /*
42  * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
43  */
44 
45 #ifndef _SAMV71_RTC_INSTANCE_
46 #define _SAMV71_RTC_INSTANCE_
47 
48 /* ========== Register definition for RTC peripheral ========== */
49 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
50   #define REG_RTC_CR                      (0x400E1860U) /**< \brief (RTC) Control Register */
51   #define REG_RTC_MR                      (0x400E1864U) /**< \brief (RTC) Mode Register */
52   #define REG_RTC_TIMR                    (0x400E1868U) /**< \brief (RTC) Time Register */
53   #define REG_RTC_CALR                    (0x400E186CU) /**< \brief (RTC) Calendar Register */
54   #define REG_RTC_TIMALR                  (0x400E1870U) /**< \brief (RTC) Time Alarm Register */
55   #define REG_RTC_CALALR                  (0x400E1874U) /**< \brief (RTC) Calendar Alarm Register */
56   #define REG_RTC_SR                      (0x400E1878U) /**< \brief (RTC) Status Register */
57   #define REG_RTC_SCCR                    (0x400E187CU) /**< \brief (RTC) Status Clear Command Register */
58   #define REG_RTC_IER                     (0x400E1880U) /**< \brief (RTC) Interrupt Enable Register */
59   #define REG_RTC_IDR                     (0x400E1884U) /**< \brief (RTC) Interrupt Disable Register */
60   #define REG_RTC_IMR                     (0x400E1888U) /**< \brief (RTC) Interrupt Mask Register */
61   #define REG_RTC_VER                     (0x400E188CU) /**< \brief (RTC) Valid Entry Register */
62 #else
63   #define REG_RTC_CR     (*(__IO uint32_t*)0x400E1860U) /**< \brief (RTC) Control Register */
64   #define REG_RTC_MR     (*(__IO uint32_t*)0x400E1864U) /**< \brief (RTC) Mode Register */
65   #define REG_RTC_TIMR   (*(__IO uint32_t*)0x400E1868U) /**< \brief (RTC) Time Register */
66   #define REG_RTC_CALR   (*(__IO uint32_t*)0x400E186CU) /**< \brief (RTC) Calendar Register */
67   #define REG_RTC_TIMALR (*(__IO uint32_t*)0x400E1870U) /**< \brief (RTC) Time Alarm Register */
68   #define REG_RTC_CALALR (*(__IO uint32_t*)0x400E1874U) /**< \brief (RTC) Calendar Alarm Register */
69   #define REG_RTC_SR     (*(__I  uint32_t*)0x400E1878U) /**< \brief (RTC) Status Register */
70   #define REG_RTC_SCCR   (*(__O  uint32_t*)0x400E187CU) /**< \brief (RTC) Status Clear Command Register */
71   #define REG_RTC_IER    (*(__O  uint32_t*)0x400E1880U) /**< \brief (RTC) Interrupt Enable Register */
72   #define REG_RTC_IDR    (*(__O  uint32_t*)0x400E1884U) /**< \brief (RTC) Interrupt Disable Register */
73   #define REG_RTC_IMR    (*(__I  uint32_t*)0x400E1888U) /**< \brief (RTC) Interrupt Mask Register */
74   #define REG_RTC_VER    (*(__I  uint32_t*)0x400E188CU) /**< \brief (RTC) Valid Entry Register */
75 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
76 
77 #endif /* _SAMV71_RTC_INSTANCE_ */
78