1 /** 2 ****************************************************************************** 3 * @file stm32l0xx_hal_uart.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2016 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef __STM32L0xx_HAL_UART_H 22 #define __STM32L0xx_HAL_UART_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32l0xx_hal_def.h" 30 31 /** @addtogroup STM32L0xx_HAL_Driver 32 * @{ 33 */ 34 35 /** @addtogroup UART 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 /** @defgroup UART_Exported_Types UART Exported Types 41 * @{ 42 */ 43 44 /** 45 * @brief UART Init Structure definition 46 */ 47 typedef struct 48 { 49 uint32_t BaudRate; /*!< This member configures the UART communication baud rate. 50 The baud rate register is computed using the following formula: 51 LPUART: 52 ======= 53 Baud Rate Register = ((256 * lpuart_ker_ck) / ((huart->Init.BaudRate))) 54 where lpuart_ker_ck is the UART input clock 55 UART: 56 ===== 57 - If oversampling is 16 or in LIN mode, 58 Baud Rate Register = ((uart_ker_ck) / ((huart->Init.BaudRate))) 59 - If oversampling is 8, 60 Baud Rate Register[15:4] = ((2 * uart_ker_ck) / ((huart->Init.BaudRate)))[15:4] 61 Baud Rate Register[3] = 0 62 Baud Rate Register[2:0] = (((2 * uart_ker_ck) / ((huart->Init.BaudRate)))[3:0]) >> 1 63 where uart_ker_ck is the UART input clock */ 64 65 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. 66 This parameter can be a value of @ref UARTEx_Word_Length. */ 67 68 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. 69 This parameter can be a value of @ref UART_Stop_Bits. */ 70 71 uint32_t Parity; /*!< Specifies the parity mode. 72 This parameter can be a value of @ref UART_Parity 73 @note When parity is enabled, the computed parity is inserted 74 at the MSB position of the transmitted data (9th bit when 75 the word length is set to 9 data bits; 8th bit when the 76 word length is set to 8 data bits). */ 77 78 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. 79 This parameter can be a value of @ref UART_Mode. */ 80 81 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled 82 or disabled. 83 This parameter can be a value of @ref UART_Hardware_Flow_Control. */ 84 85 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to f_PCLK/8). 86 This parameter can be a value of @ref UART_Over_Sampling. */ 87 88 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. 89 Selecting the single sample method increases the receiver tolerance to clock 90 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ 91 92 93 } UART_InitTypeDef; 94 95 /** 96 * @brief UART Advanced Features initialization structure definition 97 */ 98 typedef struct 99 { 100 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several 101 Advanced Features may be initialized at the same time . 102 This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type. */ 103 104 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. 105 This parameter can be a value of @ref UART_Tx_Inv. */ 106 107 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. 108 This parameter can be a value of @ref UART_Rx_Inv. */ 109 110 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic 111 vs negative/inverted logic). 112 This parameter can be a value of @ref UART_Data_Inv. */ 113 114 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. 115 This parameter can be a value of @ref UART_Rx_Tx_Swap. */ 116 117 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. 118 This parameter can be a value of @ref UART_Overrun_Disable. */ 119 120 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. 121 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */ 122 123 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. 124 This parameter can be a value of @ref UART_AutoBaudRate_Enable. */ 125 126 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate 127 detection is carried out. 128 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */ 129 130 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. 131 This parameter can be a value of @ref UART_MSB_First. */ 132 } UART_AdvFeatureInitTypeDef; 133 134 135 136 /** 137 * @brief HAL UART State definition 138 * @note HAL UART State value is a combination of 2 different substates: gState and RxState (see @ref UART_State_Definition). 139 * - gState contains UART state information related to global Handle management 140 * and also information related to Tx operations. 141 * gState value coding follow below described bitmap : 142 * b7-b6 Error information 143 * 00 : No Error 144 * 01 : (Not Used) 145 * 10 : Timeout 146 * 11 : Error 147 * b5 Peripheral initialization status 148 * 0 : Reset (Peripheral not initialized) 149 * 1 : Init done (Peripheral not initialized. HAL UART Init function already called) 150 * b4-b3 (not used) 151 * xx : Should be set to 00 152 * b2 Intrinsic process state 153 * 0 : Ready 154 * 1 : Busy (Peripheral busy with some configuration or internal operations) 155 * b1 (not used) 156 * x : Should be set to 0 157 * b0 Tx state 158 * 0 : Ready (no Tx operation ongoing) 159 * 1 : Busy (Tx operation ongoing) 160 * - RxState contains information related to Rx operations. 161 * RxState value coding follow below described bitmap : 162 * b7-b6 (not used) 163 * xx : Should be set to 00 164 * b5 Peripheral initialization status 165 * 0 : Reset (Peripheral not initialized) 166 * 1 : Init done (Peripheral not initialized) 167 * b4-b2 (not used) 168 * xxx : Should be set to 000 169 * b1 Rx state 170 * 0 : Ready (no Rx operation ongoing) 171 * 1 : Busy (Rx operation ongoing) 172 * b0 (not used) 173 * x : Should be set to 0. 174 */ 175 typedef uint32_t HAL_UART_StateTypeDef; 176 177 /** 178 * @brief UART clock sources definition 179 */ 180 typedef enum 181 { 182 UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ 183 UART_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */ 184 UART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */ 185 UART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */ 186 UART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */ 187 UART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */ 188 } UART_ClockSourceTypeDef; 189 190 /** 191 * @brief UART handle Structure definition 192 */ 193 typedef struct __UART_HandleTypeDef 194 { 195 USART_TypeDef *Instance; /*!< UART registers base address */ 196 197 UART_InitTypeDef Init; /*!< UART communication parameters */ 198 199 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ 200 201 uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ 202 203 uint16_t TxXferSize; /*!< UART Tx Transfer size */ 204 205 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ 206 207 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ 208 209 uint16_t RxXferSize; /*!< UART Rx Transfer size */ 210 211 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ 212 213 uint16_t Mask; /*!< UART Rx RDR register mask */ 214 215 216 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */ 217 218 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */ 219 220 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ 221 222 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ 223 224 HAL_LockTypeDef Lock; /*!< Locking object */ 225 226 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management 227 and also related to Tx operations. 228 This parameter can be a value of @ref HAL_UART_StateTypeDef */ 229 230 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. 231 This parameter can be a value of @ref HAL_UART_StateTypeDef */ 232 233 __IO uint32_t ErrorCode; /*!< UART Error code */ 234 235 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 236 void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ 237 void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ 238 void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ 239 void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ 240 void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ 241 void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ 242 void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ 243 void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ 244 void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ 245 246 void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ 247 void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ 248 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 249 250 } UART_HandleTypeDef; 251 252 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 253 /** 254 * @brief HAL UART Callback ID enumeration definition 255 */ 256 typedef enum 257 { 258 HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ 259 HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ 260 HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ 261 HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ 262 HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ 263 HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ 264 HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ 265 HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ 266 HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ 267 268 HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ 269 HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ 270 271 } HAL_UART_CallbackIDTypeDef; 272 273 /** 274 * @brief HAL UART Callback pointer definition 275 */ 276 typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ 277 278 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 279 280 /** 281 * @} 282 */ 283 284 /* Exported constants --------------------------------------------------------*/ 285 /** @defgroup UART_Exported_Constants UART Exported Constants 286 * @{ 287 */ 288 289 /** @defgroup UART_State_Definition UART State Code Definition 290 * @{ 291 */ 292 #define HAL_UART_STATE_RESET 0x00000000U /*!< Peripheral is not initialized 293 Value is allowed for gState and RxState */ 294 #define HAL_UART_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use 295 Value is allowed for gState and RxState */ 296 #define HAL_UART_STATE_BUSY 0x00000024U /*!< an internal process is ongoing 297 Value is allowed for gState only */ 298 #define HAL_UART_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing 299 Value is allowed for gState only */ 300 #define HAL_UART_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing 301 Value is allowed for RxState only */ 302 #define HAL_UART_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing 303 Not to be used for neither gState nor RxState. 304 Value is result of combination (Or) between gState and RxState values */ 305 #define HAL_UART_STATE_TIMEOUT 0x000000A0U /*!< Timeout state 306 Value is allowed for gState only */ 307 #define HAL_UART_STATE_ERROR 0x000000E0U /*!< Error 308 Value is allowed for gState only */ 309 /** 310 * @} 311 */ 312 313 /** @defgroup UART_Error_Definition UART Error Definition 314 * @{ 315 */ 316 #define HAL_UART_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ 317 #define HAL_UART_ERROR_PE ((uint32_t)0x00000001U) /*!< Parity error */ 318 #define HAL_UART_ERROR_NE ((uint32_t)0x00000002U) /*!< Noise error */ 319 #define HAL_UART_ERROR_FE ((uint32_t)0x00000004U) /*!< Frame error */ 320 #define HAL_UART_ERROR_ORE ((uint32_t)0x00000008U) /*!< Overrun error */ 321 #define HAL_UART_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */ 322 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 323 #define HAL_UART_ERROR_INVALID_CALLBACK ((uint32_t)0x00000020U) /*!< Invalid Callback error */ 324 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 325 /** 326 * @} 327 */ 328 329 /** @defgroup UART_Stop_Bits UART Number of Stop Bits 330 * @{ 331 */ 332 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */ 333 #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */ 334 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */ 335 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */ 336 /** 337 * @} 338 */ 339 340 /** @defgroup UART_Parity UART Parity 341 * @{ 342 */ 343 #define UART_PARITY_NONE 0x00000000U /*!< No parity */ 344 #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ 345 #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ 346 /** 347 * @} 348 */ 349 350 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control 351 * @{ 352 */ 353 #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */ 354 #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */ 355 #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */ 356 #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */ 357 /** 358 * @} 359 */ 360 361 /** @defgroup UART_Mode UART Transfer Mode 362 * @{ 363 */ 364 #define UART_MODE_RX USART_CR1_RE /*!< RX mode */ 365 #define UART_MODE_TX USART_CR1_TE /*!< TX mode */ 366 #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ 367 /** 368 * @} 369 */ 370 371 /** @defgroup UART_State UART State 372 * @{ 373 */ 374 #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */ 375 #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */ 376 /** 377 * @} 378 */ 379 380 /** @defgroup UART_Over_Sampling UART Over Sampling 381 * @{ 382 */ 383 #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ 384 #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ 385 /** 386 * @} 387 */ 388 389 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method 390 * @{ 391 */ 392 #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */ 393 #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */ 394 /** 395 * @} 396 */ 397 398 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode 399 * @{ 400 */ 401 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection on start bit */ 402 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection on falling edge */ 403 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection on 0x7F frame detection */ 404 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection on 0x55 frame detection */ 405 /** 406 * @} 407 */ 408 409 /** @defgroup UART_Receiver_TimeOut UART Receiver TimeOut 410 * @{ 411 */ 412 #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART receiver timeout disable */ 413 #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART receiver timeout enable */ 414 /** 415 * @} 416 */ 417 418 /** @defgroup UART_LIN UART Local Interconnection Network mode 419 * @{ 420 */ 421 #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */ 422 #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */ 423 /** 424 * @} 425 */ 426 427 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection 428 * @{ 429 */ 430 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */ 431 #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */ 432 /** 433 * @} 434 */ 435 436 /** @defgroup UART_DMA_Tx UART DMA Tx 437 * @{ 438 */ 439 #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */ 440 #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */ 441 /** 442 * @} 443 */ 444 445 /** @defgroup UART_DMA_Rx UART DMA Rx 446 * @{ 447 */ 448 #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */ 449 #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */ 450 /** 451 * @} 452 */ 453 454 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection 455 * @{ 456 */ 457 #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */ 458 #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */ 459 /** 460 * @} 461 */ 462 463 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods 464 * @{ 465 */ 466 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */ 467 #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */ 468 /** 469 * @} 470 */ 471 472 /** @defgroup UART_Request_Parameters UART Request Parameters 473 * @{ 474 */ 475 #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */ 476 #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */ 477 #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */ 478 #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ 479 #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ 480 /** 481 * @} 482 */ 483 484 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type 485 * @{ 486 */ 487 #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ 488 #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ 489 #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ 490 #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ 491 #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ 492 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ 493 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ 494 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */ 495 #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */ 496 /** 497 * @} 498 */ 499 500 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion 501 * @{ 502 */ 503 #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */ 504 #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */ 505 /** 506 * @} 507 */ 508 509 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion 510 * @{ 511 */ 512 #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */ 513 #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */ 514 /** 515 * @} 516 */ 517 518 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion 519 * @{ 520 */ 521 #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */ 522 #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */ 523 /** 524 * @} 525 */ 526 527 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap 528 * @{ 529 */ 530 #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */ 531 #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */ 532 /** 533 * @} 534 */ 535 536 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable 537 * @{ 538 */ 539 #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */ 540 #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */ 541 /** 542 * @} 543 */ 544 545 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable 546 * @{ 547 */ 548 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */ 549 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */ 550 /** 551 * @} 552 */ 553 554 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error 555 * @{ 556 */ 557 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */ 558 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */ 559 /** 560 * @} 561 */ 562 563 /** @defgroup UART_MSB_First UART Advanced Feature MSB First 564 * @{ 565 */ 566 #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received first disable */ 567 #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received first enable */ 568 /** 569 * @} 570 */ 571 572 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable 573 * @{ 574 */ 575 #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */ 576 #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */ 577 /** 578 * @} 579 */ 580 581 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable 582 * @{ 583 */ 584 #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */ 585 #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */ 586 /** 587 * @} 588 */ 589 590 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register 591 * @{ 592 */ 593 #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */ 594 /** 595 * @} 596 */ 597 598 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection 599 * @{ 600 */ 601 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ 602 #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */ 603 #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register not empty or RXFIFO is not empty */ 604 /** 605 * @} 606 */ 607 608 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity 609 * @{ 610 */ 611 #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */ 612 #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */ 613 /** 614 * @} 615 */ 616 617 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register 618 * @{ 619 */ 620 #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB position in CR1 register */ 621 /** 622 * @} 623 */ 624 625 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register 626 * @{ 627 */ 628 #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB position in CR1 register */ 629 /** 630 * @} 631 */ 632 633 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask 634 * @{ 635 */ 636 #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */ 637 /** 638 * @} 639 */ 640 641 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value 642 * @{ 643 */ 644 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */ 645 /** 646 * @} 647 */ 648 649 /** @defgroup UART_Flags UART Status Flags 650 * Elements values convention: 0xXXXX 651 * - 0xXXXX : Flag mask in the ISR register 652 * @{ 653 */ 654 #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */ 655 #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */ 656 #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */ 657 #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */ 658 #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */ 659 #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */ 660 #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */ 661 #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */ 662 #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */ 663 #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */ 664 #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */ 665 #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */ 666 #define UART_FLAG_TXE USART_ISR_TXE /*!< UART transmit data register empty */ 667 #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */ 668 #define UART_FLAG_RXNE USART_ISR_RXNE /*!< UART read data register not empty */ 669 #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */ 670 #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */ 671 #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */ 672 #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */ 673 #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */ 674 /** 675 * @} 676 */ 677 678 /** @defgroup UART_Interrupt_definition UART Interrupts Definition 679 * Elements values convention: 000ZZZZZ0XXYYYYYb 680 * - YYYYY : Interrupt source position in the XX register (5bits) 681 * - XX : Interrupt source register (2bits) 682 * - 01: CR1 register 683 * - 10: CR2 register 684 * - 11: CR3 register 685 * - ZZZZZ : Flag position in the ISR register(5bits) 686 * Elements values convention: 000000000XXYYYYYb 687 * - YYYYY : Interrupt source position in the XX register (5bits) 688 * - XX : Interrupt source register (2bits) 689 * - 01: CR1 register 690 * - 10: CR2 register 691 * - 11: CR3 register 692 * Elements values convention: 0000ZZZZ00000000b 693 * - ZZZZ : Flag position in the ISR register(4bits) 694 * @{ 695 */ 696 #define UART_IT_PE 0x0028U /*!< UART parity error interruption */ 697 #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */ 698 #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */ 699 #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */ 700 #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */ 701 #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */ 702 #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */ 703 #define UART_IT_CM 0x112EU /*!< UART character match interruption */ 704 #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */ 705 706 #define UART_IT_ERR 0x0060U /*!< UART error interruption */ 707 708 #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */ 709 #define UART_IT_NE 0x0200U /*!< UART noise error interruption */ 710 #define UART_IT_FE 0x0100U /*!< UART frame error interruption */ 711 /** 712 * @} 713 */ 714 715 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags 716 * @{ 717 */ 718 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ 719 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ 720 #define UART_CLEAR_NEF USART_ICR_NCF /*!< Noise Error detected Clear Flag */ 721 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */ 722 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ 723 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ 724 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ 725 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ 726 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ 727 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ 728 /** 729 * @} 730 */ 731 732 733 /** 734 * @} 735 */ 736 737 /* Exported macros -----------------------------------------------------------*/ 738 /** @defgroup UART_Exported_Macros UART Exported Macros 739 * @{ 740 */ 741 742 /** @brief Reset UART handle states. 743 * @param __HANDLE__ UART handle. 744 * @retval None 745 */ 746 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 747 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 748 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 749 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 750 (__HANDLE__)->MspInitCallback = NULL; \ 751 (__HANDLE__)->MspDeInitCallback = NULL; \ 752 } while(0U) 753 #else 754 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 755 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 756 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 757 } while(0U) 758 #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ 759 760 /** @brief Flush the UART Data registers. 761 * @param __HANDLE__ specifies the UART Handle. 762 * @retval None 763 */ 764 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ 765 do{ \ 766 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ 767 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \ 768 } while(0U) 769 770 /** @brief Clear the specified UART pending flag. 771 * @param __HANDLE__ specifies the UART Handle. 772 * @param __FLAG__ specifies the flag to check. 773 * This parameter can be any combination of the following values: 774 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 775 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 776 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 777 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 778 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 779 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 780 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 781 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 782 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 783 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 784 * @retval None 785 */ 786 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 787 788 /** @brief Clear the UART PE pending flag. 789 * @param __HANDLE__ specifies the UART Handle. 790 * @retval None 791 */ 792 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF) 793 794 /** @brief Clear the UART FE pending flag. 795 * @param __HANDLE__ specifies the UART Handle. 796 * @retval None 797 */ 798 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF) 799 800 /** @brief Clear the UART NE pending flag. 801 * @param __HANDLE__ specifies the UART Handle. 802 * @retval None 803 */ 804 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF) 805 806 /** @brief Clear the UART ORE pending flag. 807 * @param __HANDLE__ specifies the UART Handle. 808 * @retval None 809 */ 810 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF) 811 812 /** @brief Clear the UART IDLE pending flag. 813 * @param __HANDLE__ specifies the UART Handle. 814 * @retval None 815 */ 816 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF) 817 818 819 /** @brief Check whether the specified UART flag is set or not. 820 * @param __HANDLE__ specifies the UART Handle. 821 * @param __FLAG__ specifies the flag to check. 822 * This parameter can be one of the following values: 823 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag 824 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag 825 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag 826 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode) 827 * @arg @ref UART_FLAG_SBKF Send Break flag 828 * @arg @ref UART_FLAG_CMF Character match flag 829 * @arg @ref UART_FLAG_BUSY Busy flag 830 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag 831 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag 832 * @arg @ref UART_FLAG_CTS CTS Change flag 833 * @arg @ref UART_FLAG_LBDF LIN Break detection flag 834 * @arg @ref UART_FLAG_TXE Transmit data register empty flag 835 * @arg @ref UART_FLAG_TC Transmission Complete flag 836 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag 837 * @arg @ref UART_FLAG_IDLE Idle Line detection flag 838 * @arg @ref UART_FLAG_ORE Overrun Error flag 839 * @arg @ref UART_FLAG_NE Noise Error flag 840 * @arg @ref UART_FLAG_FE Framing Error flag 841 * @arg @ref UART_FLAG_PE Parity Error flag 842 * @retval The new state of __FLAG__ (TRUE or FALSE). 843 */ 844 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) 845 846 /** @brief Enable the specified UART interrupt. 847 * @param __HANDLE__ specifies the UART Handle. 848 * @param __INTERRUPT__ specifies the UART interrupt source to enable. 849 * This parameter can be one of the following values: 850 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 851 * @arg @ref UART_IT_CM Character match interrupt 852 * @arg @ref UART_IT_CTS CTS change interrupt 853 * @arg @ref UART_IT_LBD LIN Break detection interrupt 854 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 855 * @arg @ref UART_IT_TC Transmission complete interrupt 856 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 857 * @arg @ref UART_IT_IDLE Idle line detection interrupt 858 * @arg @ref UART_IT_PE Parity Error interrupt 859 * @arg @ref UART_IT_ERR Error interrupt (frame error, noise error, overrun error) 860 * @retval None 861 */ 862 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 863 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 864 ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & UART_IT_MASK)))) 865 866 867 /** @brief Disable the specified UART interrupt. 868 * @param __HANDLE__ specifies the UART Handle. 869 * @param __INTERRUPT__ specifies the UART interrupt source to disable. 870 * This parameter can be one of the following values: 871 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 872 * @arg @ref UART_IT_CM Character match interrupt 873 * @arg @ref UART_IT_CTS CTS change interrupt 874 * @arg @ref UART_IT_LBD LIN Break detection interrupt 875 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 876 * @arg @ref UART_IT_TC Transmission complete interrupt 877 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 878 * @arg @ref UART_IT_IDLE Idle line detection interrupt 879 * @arg @ref UART_IT_PE Parity Error interrupt 880 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 881 * @retval None 882 */ 883 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 884 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 885 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK)))) 886 887 /** @brief Check whether the specified UART interrupt has occurred or not. 888 * @param __HANDLE__ specifies the UART Handle. 889 * @param __INTERRUPT__ specifies the UART interrupt to check. 890 * This parameter can be one of the following values: 891 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 892 * @arg @ref UART_IT_CM Character match interrupt 893 * @arg @ref UART_IT_CTS CTS change interrupt 894 * @arg @ref UART_IT_LBD LIN Break detection interrupt 895 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 896 * @arg @ref UART_IT_TC Transmission complete interrupt 897 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 898 * @arg @ref UART_IT_IDLE Idle line detection interrupt 899 * @arg @ref UART_IT_PE Parity Error interrupt 900 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 901 * @retval The new state of __INTERRUPT__ (SET or RESET). 902 */ 903 #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET) 904 905 /** @brief Check whether the specified UART interrupt source is enabled or not. 906 * @param __HANDLE__ specifies the UART Handle. 907 * @param __INTERRUPT__ specifies the UART interrupt source to check. 908 * This parameter can be one of the following values: 909 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 910 * @arg @ref UART_IT_CM Character match interrupt 911 * @arg @ref UART_IT_CTS CTS change interrupt 912 * @arg @ref UART_IT_LBD LIN Break detection interrupt 913 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 914 * @arg @ref UART_IT_TC Transmission complete interrupt 915 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 916 * @arg @ref UART_IT_IDLE Idle line detection interrupt 917 * @arg @ref UART_IT_PE Parity Error interrupt 918 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 919 * @retval The new state of __INTERRUPT__ (SET or RESET). 920 */ 921 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ? (__HANDLE__)->Instance->CR1 : \ 922 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ? (__HANDLE__)->Instance->CR2 : \ 923 (__HANDLE__)->Instance->CR3)) & (1U << (((uint16_t)(__INTERRUPT__)) & UART_IT_MASK))) != RESET) ? SET : RESET) 924 925 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag. 926 * @param __HANDLE__ specifies the UART Handle. 927 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 928 * to clear the corresponding interrupt 929 * This parameter can be one of the following values: 930 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 931 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 932 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 933 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 934 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 935 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 936 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 937 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 938 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 939 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 940 * @retval None 941 */ 942 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) 943 944 /** @brief Set a specific UART request flag. 945 * @param __HANDLE__ specifies the UART Handle. 946 * @param __REQ__ specifies the request flag to set 947 * This parameter can be one of the following values: 948 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request 949 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request 950 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request 951 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request 952 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request 953 * @retval None 954 */ 955 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) 956 957 /** @brief Enable the UART one bit sample method. 958 * @param __HANDLE__ specifies the UART Handle. 959 * @retval None 960 */ 961 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) 962 963 /** @brief Disable the UART one bit sample method. 964 * @param __HANDLE__ specifies the UART Handle. 965 * @retval None 966 */ 967 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) 968 969 /** @brief Enable UART. 970 * @param __HANDLE__ specifies the UART Handle. 971 * @retval None 972 */ 973 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) 974 975 /** @brief Disable UART. 976 * @param __HANDLE__ specifies the UART Handle. 977 * @retval None 978 */ 979 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) 980 981 /** @brief Enable CTS flow control. 982 * @note This macro allows to enable CTS hardware flow control for a given UART instance, 983 * without need to call HAL_UART_Init() function. 984 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 985 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 986 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 987 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 988 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 989 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 990 * @param __HANDLE__ specifies the UART Handle. 991 * @retval None 992 */ 993 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ 994 do{ \ 995 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 996 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ 997 } while(0U) 998 999 /** @brief Disable CTS flow control. 1000 * @note This macro allows to disable CTS hardware flow control for a given UART instance, 1001 * without need to call HAL_UART_Init() function. 1002 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1003 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1004 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1005 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1006 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 1007 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1008 * @param __HANDLE__ specifies the UART Handle. 1009 * @retval None 1010 */ 1011 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ 1012 do{ \ 1013 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1014 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ 1015 } while(0U) 1016 1017 /** @brief Enable RTS flow control. 1018 * @note This macro allows to enable RTS hardware flow control for a given UART instance, 1019 * without need to call HAL_UART_Init() function. 1020 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1021 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1022 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1023 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1024 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 1025 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1026 * @param __HANDLE__ specifies the UART Handle. 1027 * @retval None 1028 */ 1029 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ 1030 do{ \ 1031 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ 1032 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ 1033 } while(0U) 1034 1035 /** @brief Disable RTS flow control. 1036 * @note This macro allows to disable RTS hardware flow control for a given UART instance, 1037 * without need to call HAL_UART_Init() function. 1038 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1039 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1040 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1041 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1042 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 1043 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1044 * @param __HANDLE__ specifies the UART Handle. 1045 * @retval None 1046 */ 1047 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ 1048 do{ \ 1049 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ 1050 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ 1051 } while(0U) 1052 /** 1053 * @} 1054 */ 1055 1056 /* Private macros --------------------------------------------------------*/ 1057 /** @defgroup UART_Private_Macros UART Private Macros 1058 * @{ 1059 */ 1060 1061 /** @brief BRR division operation to set BRR register with LPUART. 1062 * @param __PCLK__ LPUART clock. 1063 * @param __BAUD__ Baud rate set by the user. 1064 * @retval Division result 1065 */ 1066 #define UART_DIV_LPUART(__PCLK__, __BAUD__) (((((uint64_t)(__PCLK__)*256U)) + ((__BAUD__)/2U)) / (__BAUD__)) 1067 1068 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 1069 * @param __PCLK__ UART clock. 1070 * @param __BAUD__ Baud rate set by the user. 1071 * @retval Division result 1072 */ 1073 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__) ((((__PCLK__)*2U) + ((__BAUD__)/2U)) / (__BAUD__)) 1074 1075 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 1076 * @param __PCLK__ UART clock. 1077 * @param __BAUD__ Baud rate set by the user. 1078 * @retval Division result 1079 */ 1080 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__) (((__PCLK__) + ((__BAUD__)/2U)) / (__BAUD__)) 1081 1082 /** @brief Check whether or not UART instance is Low Power UART. 1083 * @param __HANDLE__ specifies the UART Handle. 1084 * @retval SET (instance is LPUART) or RESET (instance isn't LPUART) 1085 */ 1086 #define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE((__HANDLE__)->Instance)) 1087 1088 /** @brief Check UART Baud rate. 1089 * @param __BAUDRATE__ Baudrate specified by the user. 1090 * The maximum Baud Rate is derived from the maximum clock on L0 (i.e. 32 MHz) 1091 * divided by the smallest oversampling used on the USART (i.e. 8) 1092 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) 1093 */ 1094 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 4000001U) 1095 1096 /** @brief Check UART assertion time. 1097 * @param __TIME__ 5-bit value assertion time. 1098 * @retval Test result (TRUE or FALSE). 1099 */ 1100 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1101 1102 /** @brief Check UART deassertion time. 1103 * @param __TIME__ 5-bit value deassertion time. 1104 * @retval Test result (TRUE or FALSE). 1105 */ 1106 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1107 1108 /** 1109 * @brief Ensure that UART frame number of stop bits is valid. 1110 * @param __STOPBITS__ UART frame number of stop bits. 1111 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1112 */ 1113 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \ 1114 ((__STOPBITS__) == UART_STOPBITS_1) || \ 1115 ((__STOPBITS__) == UART_STOPBITS_1_5) || \ 1116 ((__STOPBITS__) == UART_STOPBITS_2)) 1117 1118 /** 1119 * @brief Ensure that LPUART frame number of stop bits is valid. 1120 * @param __STOPBITS__ LPUART frame number of stop bits. 1121 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1122 */ 1123 #define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \ 1124 ((__STOPBITS__) == UART_STOPBITS_2)) 1125 1126 /** 1127 * @brief Ensure that UART frame parity is valid. 1128 * @param __PARITY__ UART frame parity. 1129 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) 1130 */ 1131 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \ 1132 ((__PARITY__) == UART_PARITY_EVEN) || \ 1133 ((__PARITY__) == UART_PARITY_ODD)) 1134 1135 /** 1136 * @brief Ensure that UART hardware flow control is valid. 1137 * @param __CONTROL__ UART hardware flow control. 1138 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid) 1139 */ 1140 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\ 1141 (((__CONTROL__) == UART_HWCONTROL_NONE) || \ 1142 ((__CONTROL__) == UART_HWCONTROL_RTS) || \ 1143 ((__CONTROL__) == UART_HWCONTROL_CTS) || \ 1144 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS)) 1145 1146 /** 1147 * @brief Ensure that UART communication mode is valid. 1148 * @param __MODE__ UART communication mode. 1149 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1150 */ 1151 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U)) 1152 1153 /** 1154 * @brief Ensure that UART state is valid. 1155 * @param __STATE__ UART state. 1156 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 1157 */ 1158 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ 1159 ((__STATE__) == UART_STATE_ENABLE)) 1160 1161 /** 1162 * @brief Ensure that UART oversampling is valid. 1163 * @param __SAMPLING__ UART oversampling. 1164 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) 1165 */ 1166 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \ 1167 ((__SAMPLING__) == UART_OVERSAMPLING_8)) 1168 1169 /** 1170 * @brief Ensure that UART frame sampling is valid. 1171 * @param __ONEBIT__ UART frame sampling. 1172 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) 1173 */ 1174 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \ 1175 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE)) 1176 1177 /** 1178 * @brief Ensure that UART auto Baud rate detection mode is valid. 1179 * @param __MODE__ UART auto Baud rate detection mode. 1180 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1181 */ 1182 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ 1183 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ 1184 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ 1185 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) 1186 1187 /** 1188 * @brief Ensure that UART receiver timeout setting is valid. 1189 * @param __TIMEOUT__ UART receiver timeout setting. 1190 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) 1191 */ 1192 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \ 1193 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE)) 1194 1195 /** 1196 * @brief Ensure that UART LIN state is valid. 1197 * @param __LIN__ UART LIN state. 1198 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid) 1199 */ 1200 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \ 1201 ((__LIN__) == UART_LIN_ENABLE)) 1202 1203 /** 1204 * @brief Ensure that UART LIN break detection length is valid. 1205 * @param __LENGTH__ UART LIN break detection length. 1206 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 1207 */ 1208 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \ 1209 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B)) 1210 1211 /** 1212 * @brief Ensure that UART DMA TX state is valid. 1213 * @param __DMATX__ UART DMA TX state. 1214 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) 1215 */ 1216 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \ 1217 ((__DMATX__) == UART_DMA_TX_ENABLE)) 1218 1219 /** 1220 * @brief Ensure that UART DMA RX state is valid. 1221 * @param __DMARX__ UART DMA RX state. 1222 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) 1223 */ 1224 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \ 1225 ((__DMARX__) == UART_DMA_RX_ENABLE)) 1226 1227 /** 1228 * @brief Ensure that UART half-duplex state is valid. 1229 * @param __HDSEL__ UART half-duplex state. 1230 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid) 1231 */ 1232 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \ 1233 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE)) 1234 1235 /** 1236 * @brief Ensure that UART wake-up method is valid. 1237 * @param __WAKEUP__ UART wake-up method . 1238 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid) 1239 */ 1240 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \ 1241 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK)) 1242 1243 /** 1244 * @brief Ensure that UART request parameter is valid. 1245 * @param __PARAM__ UART request parameter. 1246 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) 1247 */ 1248 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ 1249 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ 1250 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ 1251 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \ 1252 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST)) 1253 1254 /** 1255 * @brief Ensure that UART advanced features initialization is valid. 1256 * @param __INIT__ UART advanced features initialization. 1257 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) 1258 */ 1259 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ 1260 UART_ADVFEATURE_TXINVERT_INIT | \ 1261 UART_ADVFEATURE_RXINVERT_INIT | \ 1262 UART_ADVFEATURE_DATAINVERT_INIT | \ 1263 UART_ADVFEATURE_SWAP_INIT | \ 1264 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ 1265 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ 1266 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ 1267 UART_ADVFEATURE_MSBFIRST_INIT)) 1268 1269 /** 1270 * @brief Ensure that UART frame TX inversion setting is valid. 1271 * @param __TXINV__ UART frame TX inversion setting. 1272 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) 1273 */ 1274 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \ 1275 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE)) 1276 1277 /** 1278 * @brief Ensure that UART frame RX inversion setting is valid. 1279 * @param __RXINV__ UART frame RX inversion setting. 1280 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) 1281 */ 1282 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \ 1283 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE)) 1284 1285 /** 1286 * @brief Ensure that UART frame data inversion setting is valid. 1287 * @param __DATAINV__ UART frame data inversion setting. 1288 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) 1289 */ 1290 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \ 1291 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE)) 1292 1293 /** 1294 * @brief Ensure that UART frame RX/TX pins swap setting is valid. 1295 * @param __SWAP__ UART frame RX/TX pins swap setting. 1296 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) 1297 */ 1298 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \ 1299 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE)) 1300 1301 /** 1302 * @brief Ensure that UART frame overrun setting is valid. 1303 * @param __OVERRUN__ UART frame overrun setting. 1304 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) 1305 */ 1306 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ 1307 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE)) 1308 1309 /** 1310 * @brief Ensure that UART auto Baud rate state is valid. 1311 * @param __AUTOBAUDRATE__ UART auto Baud rate state. 1312 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid) 1313 */ 1314 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ 1315 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) 1316 1317 /** 1318 * @brief Ensure that UART DMA enabling or disabling on error setting is valid. 1319 * @param __DMA__ UART DMA enabling or disabling on error setting. 1320 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) 1321 */ 1322 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ 1323 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) 1324 1325 /** 1326 * @brief Ensure that UART frame MSB first setting is valid. 1327 * @param __MSBFIRST__ UART frame MSB first setting. 1328 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) 1329 */ 1330 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ 1331 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE)) 1332 1333 /** 1334 * @brief Ensure that UART stop mode state is valid. 1335 * @param __STOPMODE__ UART stop mode state. 1336 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid) 1337 */ 1338 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ 1339 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE)) 1340 1341 /** 1342 * @brief Ensure that UART mute mode state is valid. 1343 * @param __MUTE__ UART mute mode state. 1344 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid) 1345 */ 1346 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ 1347 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE)) 1348 1349 /** 1350 * @brief Ensure that UART wake-up selection is valid. 1351 * @param __WAKE__ UART wake-up selection. 1352 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid) 1353 */ 1354 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ 1355 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \ 1356 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) 1357 1358 /** 1359 * @brief Ensure that UART driver enable polarity is valid. 1360 * @param __POLARITY__ UART driver enable polarity. 1361 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) 1362 */ 1363 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \ 1364 ((__POLARITY__) == UART_DE_POLARITY_LOW)) 1365 1366 1367 /** 1368 * @} 1369 */ 1370 1371 /* Include UART HAL Extended module */ 1372 #include "stm32l0xx_hal_uart_ex.h" 1373 1374 1375 /* Exported functions --------------------------------------------------------*/ 1376 /** @addtogroup UART_Exported_Functions UART Exported Functions 1377 * @{ 1378 */ 1379 1380 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions 1381 * @{ 1382 */ 1383 1384 /* Initialization and de-initialization functions ****************************/ 1385 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); 1386 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); 1387 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); 1388 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); 1389 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); 1390 void HAL_UART_MspInit(UART_HandleTypeDef *huart); 1391 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); 1392 1393 /* Callbacks Register/UnRegister functions ***********************************/ 1394 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1395 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, pUART_CallbackTypeDef pCallback); 1396 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); 1397 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1398 1399 /** 1400 * @} 1401 */ 1402 1403 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions 1404 * @{ 1405 */ 1406 1407 /* IO operation functions *****************************************************/ 1408 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 1409 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 1410 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1411 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1412 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1413 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1414 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); 1415 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); 1416 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); 1417 /* Transfer Abort functions */ 1418 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); 1419 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); 1420 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); 1421 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); 1422 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); 1423 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); 1424 1425 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); 1426 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); 1427 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); 1428 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); 1429 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); 1430 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); 1431 void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); 1432 void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); 1433 void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); 1434 1435 /** 1436 * @} 1437 */ 1438 1439 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions 1440 * @{ 1441 */ 1442 1443 /* Peripheral Control functions ************************************************/ 1444 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); 1445 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart); 1446 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart); 1447 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); 1448 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); 1449 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); 1450 1451 /** 1452 * @} 1453 */ 1454 1455 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions 1456 * @{ 1457 */ 1458 1459 /* Peripheral State and Errors functions **************************************************/ 1460 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart); 1461 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart); 1462 1463 /** 1464 * @} 1465 */ 1466 1467 /** 1468 * @} 1469 */ 1470 1471 /* Private functions -----------------------------------------------------------*/ 1472 /** @addtogroup UART_Private_Functions UART Private Functions 1473 * @{ 1474 */ 1475 1476 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); 1477 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); 1478 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout); 1479 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); 1480 1481 /** 1482 * @} 1483 */ 1484 1485 /** 1486 * @} 1487 */ 1488 1489 /** 1490 * @} 1491 */ 1492 1493 #ifdef __cplusplus 1494 } 1495 #endif 1496 1497 #endif /* __STM32L0xx_HAL_UART_H */ 1498 1499 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 1500