xref: /btstack/port/stm32-l451-miromico-sx1280/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c (revision 2fd737d36a1de5d778cacc671d4b4d8c4f3fed82)
1 /**
2   ******************************************************************************
3   * @file    stm32l4xx_hal_dfsdm.c
4   * @author  MCD Application Team
5   * @brief   This file provides firmware functions to manage the following
6   *          functionalities of the Digital Filter for Sigma-Delta Modulators
7   *          (DFSDM) peripherals:
8   *           + Initialization and configuration of channels and filters
9   *           + Regular channels configuration
10   *           + Injected channels configuration
11   *           + Regular/Injected Channels DMA Configuration
12   *           + Interrupts and flags management
13   *           + Analog watchdog feature
14   *           + Short-circuit detector feature
15   *           + Extremes detector feature
16   *           + Clock absence detector feature
17   *           + Break generation on analog watchdog or short-circuit event
18   *
19   @verbatim
20   ==============================================================================
21                      ##### How to use this driver #####
22   ==============================================================================
23   [..]
24     *** Channel initialization ***
25     ==============================
26     [..]
27       (#) User has first to initialize channels (before filters initialization).
28       (#) As prerequisite, fill in the HAL_DFSDM_ChannelMspInit() :
29         (++) Enable DFSDMz clock interface with __HAL_RCC_DFSDMz_CLK_ENABLE().
30         (++) Enable the clocks for the DFSDMz GPIOS with __HAL_RCC_GPIOx_CLK_ENABLE().
31         (++) Configure these DFSDMz pins in alternate mode using HAL_GPIO_Init().
32         (++) If interrupt mode is used, enable and configure DFSDMz_FLT0 global
33             interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
34       (#) Configure the output clock, input, serial interface, analog watchdog,
35           offset and data right bit shift parameters for this channel using the
36           HAL_DFSDM_ChannelInit() function.
37 
38     *** Channel clock absence detector ***
39     ======================================
40     [..]
41       (#) Start clock absence detector using HAL_DFSDM_ChannelCkabStart() or
42           HAL_DFSDM_ChannelCkabStart_IT().
43       (#) In polling mode, use HAL_DFSDM_ChannelPollForCkab() to detect the clock
44           absence.
45       (#) In interrupt mode, HAL_DFSDM_ChannelCkabCallback() will be called if
46           clock absence is detected.
47       (#) Stop clock absence detector using HAL_DFSDM_ChannelCkabStop() or
48           HAL_DFSDM_ChannelCkabStop_IT().
49       (#) Please note that the same mode (polling or interrupt) has to be used
50           for all channels because the channels are sharing the same interrupt.
51       (#) Please note also that in interrupt mode, if clock absence detector is
52           stopped for one channel, interrupt will be disabled for all channels.
53 
54     *** Channel short circuit detector ***
55     ======================================
56     [..]
57       (#) Start short circuit detector using HAL_DFSDM_ChannelScdStart() or
58           or HAL_DFSDM_ChannelScdStart_IT().
59       (#) In polling mode, use HAL_DFSDM_ChannelPollForScd() to detect short
60           circuit.
61       (#) In interrupt mode, HAL_DFSDM_ChannelScdCallback() will be called if
62           short circuit is detected.
63       (#) Stop short circuit detector using HAL_DFSDM_ChannelScdStop() or
64           or HAL_DFSDM_ChannelScdStop_IT().
65       (#) Please note that the same mode (polling or interrupt) has to be used
66           for all channels because the channels are sharing the same interrupt.
67       (#) Please note also that in interrupt mode, if short circuit detector is
68           stopped for one channel, interrupt will be disabled for all channels.
69 
70     *** Channel analog watchdog value ***
71     =====================================
72     [..]
73       (#) Get analog watchdog filter value of a channel using
74           HAL_DFSDM_ChannelGetAwdValue().
75 
76     *** Channel offset value ***
77     =====================================
78     [..]
79       (#) Modify offset value of a channel using HAL_DFSDM_ChannelModifyOffset().
80 
81     *** Filter initialization ***
82     =============================
83     [..]
84       (#) After channel initialization, user has to init filters.
85       (#) As prerequisite, fill in the HAL_DFSDM_FilterMspInit() :
86         (++) If interrupt mode is used , enable and configure DFSDMz_FLTx global
87             interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
88             Please note that DFSDMz_FLT0 global interrupt could be already
89             enabled if interrupt is used for channel.
90         (++) If DMA mode is used, configure DMA with HAL_DMA_Init() and link it
91             with DFSDMz filter handle using __HAL_LINKDMA().
92       (#) Configure the regular conversion, injected conversion and filter
93           parameters for this filter using the HAL_DFSDM_FilterInit() function.
94 
95     *** Filter regular channel conversion ***
96     =========================================
97     [..]
98       (#) Select regular channel and enable/disable continuous mode using
99           HAL_DFSDM_FilterConfigRegChannel().
100       (#) Start regular conversion using HAL_DFSDM_FilterRegularStart(),
101           HAL_DFSDM_FilterRegularStart_IT(), HAL_DFSDM_FilterRegularStart_DMA() or
102           HAL_DFSDM_FilterRegularMsbStart_DMA().
103       (#) In polling mode, use HAL_DFSDM_FilterPollForRegConversion() to detect
104           the end of regular conversion.
105       (#) In interrupt mode, HAL_DFSDM_FilterRegConvCpltCallback() will be called
106           at the end of regular conversion.
107       (#) Get value of regular conversion and corresponding channel using
108           HAL_DFSDM_FilterGetRegularValue().
109       (#) In DMA mode, HAL_DFSDM_FilterRegConvHalfCpltCallback() and
110           HAL_DFSDM_FilterRegConvCpltCallback() will be called respectively at the
111           half transfer and at the transfer complete. Please note that
112           HAL_DFSDM_FilterRegConvHalfCpltCallback() will be called only in DMA
113           circular mode.
114       (#) Stop regular conversion using HAL_DFSDM_FilterRegularStop(),
115           HAL_DFSDM_FilterRegularStop_IT() or HAL_DFSDM_FilterRegularStop_DMA().
116 
117     *** Filter injected channels conversion ***
118     ===========================================
119     [..]
120       (#) Select injected channels using HAL_DFSDM_FilterConfigInjChannel().
121       (#) Start injected conversion using HAL_DFSDM_FilterInjectedStart(),
122           HAL_DFSDM_FilterInjectedStart_IT(), HAL_DFSDM_FilterInjectedStart_DMA() or
123           HAL_DFSDM_FilterInjectedMsbStart_DMA().
124       (#) In polling mode, use HAL_DFSDM_FilterPollForInjConversion() to detect
125           the end of injected conversion.
126       (#) In interrupt mode, HAL_DFSDM_FilterInjConvCpltCallback() will be called
127           at the end of injected conversion.
128       (#) Get value of injected conversion and corresponding channel using
129           HAL_DFSDM_FilterGetInjectedValue().
130       (#) In DMA mode, HAL_DFSDM_FilterInjConvHalfCpltCallback() and
131           HAL_DFSDM_FilterInjConvCpltCallback() will be called respectively at the
132           half transfer and at the transfer complete. Please note that
133           HAL_DFSDM_FilterInjConvCpltCallback() will be called only in DMA
134           circular mode.
135       (#) Stop injected conversion using HAL_DFSDM_FilterInjectedStop(),
136           HAL_DFSDM_FilterInjectedStop_IT() or HAL_DFSDM_FilterInjectedStop_DMA().
137 
138     *** Filter analog watchdog ***
139     ==============================
140     [..]
141       (#) Start filter analog watchdog using HAL_DFSDM_FilterAwdStart_IT().
142       (#) HAL_DFSDM_FilterAwdCallback() will be called if analog watchdog occurs.
143       (#) Stop filter analog watchdog using HAL_DFSDM_FilterAwdStop_IT().
144 
145     *** Filter extreme detector ***
146     ===============================
147     [..]
148       (#) Start filter extreme detector using HAL_DFSDM_FilterExdStart().
149       (#) Get extreme detector maximum value using HAL_DFSDM_FilterGetExdMaxValue().
150       (#) Get extreme detector minimum value using HAL_DFSDM_FilterGetExdMinValue().
151       (#) Start filter extreme detector using HAL_DFSDM_FilterExdStop().
152 
153     *** Filter conversion time ***
154     ==============================
155     [..]
156       (#) Get conversion time value using HAL_DFSDM_FilterGetConvTimeValue().
157 
158     *** Callback registration ***
159     =============================
160     [..]
161     The compilation define USE_HAL_DFSDM_REGISTER_CALLBACKS when set to 1
162     allows the user to configure dynamically the driver callbacks.
163     Use functions HAL_DFSDM_Channel_RegisterCallback(),
164     HAL_DFSDM_Filter_RegisterCallback() or
165     HAL_DFSDM_Filter_RegisterAwdCallback() to register a user callback.
166 
167     [..]
168     Function HAL_DFSDM_Channel_RegisterCallback() allows to register
169     following callbacks:
170       (+) CkabCallback      : DFSDM channel clock absence detection callback.
171       (+) ScdCallback       : DFSDM channel short circuit detection callback.
172       (+) MspInitCallback   : DFSDM channel MSP init callback.
173       (+) MspDeInitCallback : DFSDM channel MSP de-init callback.
174     [..]
175     This function takes as parameters the HAL peripheral handle, the Callback ID
176     and a pointer to the user callback function.
177 
178     [..]
179     Function HAL_DFSDM_Filter_RegisterCallback() allows to register
180     following callbacks:
181       (+) RegConvCpltCallback     : DFSDM filter regular conversion complete callback.
182       (+) RegConvHalfCpltCallback : DFSDM filter half regular conversion complete callback.
183       (+) InjConvCpltCallback     : DFSDM filter injected conversion complete callback.
184       (+) InjConvHalfCpltCallback : DFSDM filter half injected conversion complete callback.
185       (+) ErrorCallback           : DFSDM filter error callback.
186       (+) MspInitCallback         : DFSDM filter MSP init callback.
187       (+) MspDeInitCallback       : DFSDM filter MSP de-init callback.
188     [..]
189     This function takes as parameters the HAL peripheral handle, the Callback ID
190     and a pointer to the user callback function.
191 
192     [..]
193     For specific DFSDM filter analog watchdog callback use dedicated register callback:
194     HAL_DFSDM_Filter_RegisterAwdCallback().
195 
196     [..]
197     Use functions HAL_DFSDM_Channel_UnRegisterCallback() or
198     HAL_DFSDM_Filter_UnRegisterCallback() to reset a callback to the default
199     weak function.
200 
201     [..]
202     HAL_DFSDM_Channel_UnRegisterCallback() takes as parameters the HAL peripheral handle,
203     and the Callback ID.
204     [..]
205     This function allows to reset following callbacks:
206       (+) CkabCallback      : DFSDM channel clock absence detection callback.
207       (+) ScdCallback       : DFSDM channel short circuit detection callback.
208       (+) MspInitCallback   : DFSDM channel MSP init callback.
209       (+) MspDeInitCallback : DFSDM channel MSP de-init callback.
210 
211     [..]
212     HAL_DFSDM_Filter_UnRegisterCallback() takes as parameters the HAL peripheral handle,
213     and the Callback ID.
214     [..]
215     This function allows to reset following callbacks:
216       (+) RegConvCpltCallback     : DFSDM filter regular conversion complete callback.
217       (+) RegConvHalfCpltCallback : DFSDM filter half regular conversion complete callback.
218       (+) InjConvCpltCallback     : DFSDM filter injected conversion complete callback.
219       (+) InjConvHalfCpltCallback : DFSDM filter half injected conversion complete callback.
220       (+) ErrorCallback           : DFSDM filter error callback.
221       (+) MspInitCallback         : DFSDM filter MSP init callback.
222       (+) MspDeInitCallback       : DFSDM filter MSP de-init callback.
223 
224     [..]
225     For specific DFSDM filter analog watchdog callback use dedicated unregister callback:
226     HAL_DFSDM_Filter_UnRegisterAwdCallback().
227 
228     [..]
229     By default, after the call of init function and if the state is RESET
230     all callbacks are reset to the corresponding legacy weak functions:
231     examples HAL_DFSDM_ChannelScdCallback(), HAL_DFSDM_FilterErrorCallback().
232     Exception done for MspInit and MspDeInit callbacks that are respectively
233     reset to the legacy weak functions in the init and de-init only when these
234     callbacks are null (not registered beforehand).
235     If not, MspInit or MspDeInit are not null, the init and de-init keep and use
236     the user MspInit/MspDeInit callbacks (registered beforehand)
237 
238     [..]
239     Callbacks can be registered/unregistered in READY state only.
240     Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
241     in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
242     during the init/de-init.
243     In that case first register the MspInit/MspDeInit user callbacks using
244     HAL_DFSDM_Channel_RegisterCallback() or
245     HAL_DFSDM_Filter_RegisterCallback() before calling init or de-init function.
246 
247     [..]
248     When The compilation define USE_HAL_DFSDM_REGISTER_CALLBACKS is set to 0 or
249     not defined, the callback registering feature is not available
250     and weak callbacks are used.
251 
252     @endverbatim
253   ******************************************************************************
254   * @attention
255   *
256   * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
257   * All rights reserved.</center></h2>
258   *
259   * This software component is licensed by ST under BSD 3-Clause license,
260   * the "License"; You may not use this file except in compliance with the
261   * License. You may obtain a copy of the License at:
262   *                        opensource.org/licenses/BSD-3-Clause
263   *
264   ******************************************************************************
265   */
266 
267 /* Includes ------------------------------------------------------------------*/
268 #include "stm32l4xx_hal.h"
269 
270 /** @addtogroup STM32L4xx_HAL_Driver
271   * @{
272   */
273 #ifdef HAL_DFSDM_MODULE_ENABLED
274 
275 #if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx) || \
276     defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \
277     defined(STM32L496xx) || defined(STM32L4A6xx) || \
278     defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) || \
279     defined(STM32L4P5xx) || defined(STM32L4Q5xx)
280 
281 /** @defgroup DFSDM DFSDM
282   * @brief DFSDM HAL driver module
283   * @{
284   */
285 
286 /* Private typedef -----------------------------------------------------------*/
287 /* Private define ------------------------------------------------------------*/
288 /** @defgroup DFSDM_Private_Define DFSDM Private Define
289  * @{
290  */
291 #define DFSDM_FLTCR1_MSB_RCH_OFFSET     8
292 #define DFSDM_MSB_MASK                  0xFFFF0000U
293 #define DFSDM_LSB_MASK                  0x0000FFFFU
294 #define DFSDM_CKAB_TIMEOUT              5000U
295 #if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx) || \
296     defined(STM32L4P5xx) || defined(STM32L4Q5xx)
297 #define DFSDM1_CHANNEL_NUMBER           4U
298 #else /* STM32L451xx || STM32L452xx || STM32L462xx || STM32L4P5xx || STM32L4Q5xx */
299 #define DFSDM1_CHANNEL_NUMBER           8U
300 #endif /* STM32L451xx || STM32L452xx || STM32L462xx || STM32L4P5xx || STM32L4Q5xx */
301 /**
302   * @}
303   */
304 
305 /* Private macro -------------------------------------------------------------*/
306 /* Private variables ---------------------------------------------------------*/
307 /** @defgroup DFSDM_Private_Variables DFSDM Private Variables
308   * @{
309   */
310 static __IO uint32_t                v_dfsdm1ChannelCounter = 0;
311 static DFSDM_Channel_HandleTypeDef *a_dfsdm1ChannelHandle[DFSDM1_CHANNEL_NUMBER] = {NULL};
312 /**
313   * @}
314   */
315 
316 /* Private function prototypes -----------------------------------------------*/
317 /** @defgroup DFSDM_Private_Functions DFSDM Private Functions
318   * @{
319   */
320 static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels);
321 static uint32_t DFSDM_GetChannelFromInstance(const DFSDM_Channel_TypeDef *Instance);
322 static void     DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
323 static void     DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
324 static void     DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
325 static void     DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
326 static void     DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma);
327 static void     DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma);
328 static void     DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma);
329 static void     DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma);
330 static void     DFSDM_DMAError(DMA_HandleTypeDef *hdma);
331 /**
332   * @}
333   */
334 
335 /* Exported functions --------------------------------------------------------*/
336 /** @defgroup DFSDM_Exported_Functions DFSDM Exported Functions
337   * @{
338   */
339 
340 /** @defgroup DFSDM_Exported_Functions_Group1_Channel Channel initialization and de-initialization functions
341  *  @brief    Channel initialization and de-initialization functions
342  *
343 @verbatim
344   ==============================================================================
345         ##### Channel initialization and de-initialization functions #####
346   ==============================================================================
347     [..]  This section provides functions allowing to:
348       (+) Initialize the DFSDM channel.
349       (+) De-initialize the DFSDM channel.
350 @endverbatim
351   * @{
352   */
353 
354 /**
355   * @brief  Initialize the DFSDM channel according to the specified parameters
356   *         in the DFSDM_ChannelInitTypeDef structure and initialize the associated handle.
357   * @param  hdfsdm_channel DFSDM channel handle.
358   * @retval HAL status.
359   */
HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)360 HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
361 {
362   /* Check DFSDM Channel handle */
363   if (hdfsdm_channel == NULL)
364   {
365     return HAL_ERROR;
366   }
367 
368   /* Check parameters */
369   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
370   assert_param(IS_FUNCTIONAL_STATE(hdfsdm_channel->Init.OutputClock.Activation));
371   assert_param(IS_DFSDM_CHANNEL_INPUT(hdfsdm_channel->Init.Input.Multiplexer));
372   assert_param(IS_DFSDM_CHANNEL_DATA_PACKING(hdfsdm_channel->Init.Input.DataPacking));
373   assert_param(IS_DFSDM_CHANNEL_INPUT_PINS(hdfsdm_channel->Init.Input.Pins));
374   assert_param(IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(hdfsdm_channel->Init.SerialInterface.Type));
375   assert_param(IS_DFSDM_CHANNEL_SPI_CLOCK(hdfsdm_channel->Init.SerialInterface.SpiClock));
376   assert_param(IS_DFSDM_CHANNEL_FILTER_ORDER(hdfsdm_channel->Init.Awd.FilterOrder));
377   assert_param(IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(hdfsdm_channel->Init.Awd.Oversampling));
378   assert_param(IS_DFSDM_CHANNEL_OFFSET(hdfsdm_channel->Init.Offset));
379   assert_param(IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(hdfsdm_channel->Init.RightBitShift));
380 
381   /* Check that channel has not been already initialized */
382   if (a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] != NULL)
383   {
384     return HAL_ERROR;
385   }
386 
387 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
388   /* Reset callback pointers to the weak predefined callbacks */
389   hdfsdm_channel->CkabCallback = HAL_DFSDM_ChannelCkabCallback;
390   hdfsdm_channel->ScdCallback  = HAL_DFSDM_ChannelScdCallback;
391 
392   /* Call MSP init function */
393   if (hdfsdm_channel->MspInitCallback == NULL)
394   {
395     hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit;
396   }
397   hdfsdm_channel->MspInitCallback(hdfsdm_channel);
398 #else
399   /* Call MSP init function */
400   HAL_DFSDM_ChannelMspInit(hdfsdm_channel);
401 #endif
402 
403   /* Update the channel counter */
404   v_dfsdm1ChannelCounter++;
405 
406   /* Configure output serial clock and enable global DFSDM interface only for first channel */
407   if (v_dfsdm1ChannelCounter == 1U)
408   {
409     assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK(hdfsdm_channel->Init.OutputClock.Selection));
410     /* Set the output serial clock source */
411     DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTSRC);
412     DFSDM1_Channel0->CHCFGR1 |= hdfsdm_channel->Init.OutputClock.Selection;
413 
414     /* Reset clock divider */
415     DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTDIV);
416     if (hdfsdm_channel->Init.OutputClock.Activation == ENABLE)
417     {
418       assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(hdfsdm_channel->Init.OutputClock.Divider));
419       /* Set the output clock divider */
420       DFSDM1_Channel0->CHCFGR1 |= (uint32_t)((hdfsdm_channel->Init.OutputClock.Divider - 1U) <<
421                                              DFSDM_CHCFGR1_CKOUTDIV_Pos);
422     }
423 
424     /* enable the DFSDM global interface */
425     DFSDM1_Channel0->CHCFGR1 |= DFSDM_CHCFGR1_DFSDMEN;
426   }
427 
428   /* Set channel input parameters */
429   hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DATPACK | DFSDM_CHCFGR1_DATMPX |
430                                          DFSDM_CHCFGR1_CHINSEL);
431   hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.Input.Multiplexer |
432                                         hdfsdm_channel->Init.Input.DataPacking |
433                                         hdfsdm_channel->Init.Input.Pins);
434 
435   /* Set serial interface parameters */
436   hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SITP | DFSDM_CHCFGR1_SPICKSEL);
437   hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.SerialInterface.Type |
438                                         hdfsdm_channel->Init.SerialInterface.SpiClock);
439 
440   /* Set analog watchdog parameters */
441   hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_AWFORD | DFSDM_CHAWSCDR_AWFOSR);
442   hdfsdm_channel->Instance->CHAWSCDR |= (hdfsdm_channel->Init.Awd.FilterOrder |
443                                          ((hdfsdm_channel->Init.Awd.Oversampling - 1U) << DFSDM_CHAWSCDR_AWFOSR_Pos));
444 
445   /* Set channel offset and right bit shift */
446   hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET | DFSDM_CHCFGR2_DTRBS);
447   hdfsdm_channel->Instance->CHCFGR2 |= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_Pos) |
448                                         (hdfsdm_channel->Init.RightBitShift << DFSDM_CHCFGR2_DTRBS_Pos));
449 
450   /* Enable DFSDM channel */
451   hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CHEN;
452 
453   /* Set DFSDM Channel to ready state */
454   hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_READY;
455 
456   /* Store channel handle in DFSDM channel handle table */
457   a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = hdfsdm_channel;
458 
459   return HAL_OK;
460 }
461 
462 /**
463   * @brief  De-initialize the DFSDM channel.
464   * @param  hdfsdm_channel DFSDM channel handle.
465   * @retval HAL status.
466   */
HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)467 HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
468 {
469   /* Check DFSDM Channel handle */
470   if (hdfsdm_channel == NULL)
471   {
472     return HAL_ERROR;
473   }
474 
475   /* Check parameters */
476   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
477 
478   /* Check that channel has not been already deinitialized */
479   if (a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] == NULL)
480   {
481     return HAL_ERROR;
482   }
483 
484   /* Disable the DFSDM channel */
485   hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CHEN);
486 
487   /* Update the channel counter */
488   v_dfsdm1ChannelCounter--;
489 
490   /* Disable global DFSDM at deinit of last channel */
491   if (v_dfsdm1ChannelCounter == 0U)
492   {
493     DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_DFSDMEN);
494   }
495 
496   /* Call MSP deinit function */
497 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
498   if (hdfsdm_channel->MspDeInitCallback == NULL)
499   {
500     hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit;
501   }
502   hdfsdm_channel->MspDeInitCallback(hdfsdm_channel);
503 #else
504   HAL_DFSDM_ChannelMspDeInit(hdfsdm_channel);
505 #endif
506 
507   /* Set DFSDM Channel in reset state */
508   hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_RESET;
509 
510   /* Reset channel handle in DFSDM channel handle table */
511   a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = (DFSDM_Channel_HandleTypeDef *) NULL;
512 
513   return HAL_OK;
514 }
515 
516 /**
517   * @brief  Initialize the DFSDM channel MSP.
518   * @param  hdfsdm_channel DFSDM channel handle.
519   * @retval None
520   */
HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)521 __weak void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
522 {
523   /* Prevent unused argument(s) compilation warning */
524   UNUSED(hdfsdm_channel);
525 
526   /* NOTE : This function should not be modified, when the function is needed,
527             the HAL_DFSDM_ChannelMspInit could be implemented in the user file.
528    */
529 }
530 
531 /**
532   * @brief  De-initialize the DFSDM channel MSP.
533   * @param  hdfsdm_channel DFSDM channel handle.
534   * @retval None
535   */
HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)536 __weak void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
537 {
538   /* Prevent unused argument(s) compilation warning */
539   UNUSED(hdfsdm_channel);
540 
541   /* NOTE : This function should not be modified, when the function is needed,
542             the HAL_DFSDM_ChannelMspDeInit could be implemented in the user file.
543    */
544 }
545 
546 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
547 /**
548   * @brief  Register a user DFSDM channel callback
549   *         to be used instead of the weak predefined callback.
550   * @param  hdfsdm_channel DFSDM channel handle.
551   * @param  CallbackID ID of the callback to be registered.
552   *         This parameter can be one of the following values:
553   *           @arg @ref HAL_DFSDM_CHANNEL_CKAB_CB_ID clock absence detection callback ID.
554   *           @arg @ref HAL_DFSDM_CHANNEL_SCD_CB_ID short circuit detection callback ID.
555   *           @arg @ref HAL_DFSDM_CHANNEL_MSPINIT_CB_ID MSP init callback ID.
556   *           @arg @ref HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID MSP de-init callback ID.
557   * @param  pCallback pointer to the callback function.
558   * @retval HAL status.
559   */
HAL_DFSDM_Channel_RegisterCallback(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID,pDFSDM_Channel_CallbackTypeDef pCallback)560 HAL_StatusTypeDef HAL_DFSDM_Channel_RegisterCallback(DFSDM_Channel_HandleTypeDef        *hdfsdm_channel,
561                                                      HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID,
562                                                      pDFSDM_Channel_CallbackTypeDef      pCallback)
563 {
564   HAL_StatusTypeDef status = HAL_OK;
565 
566   if (pCallback == NULL)
567   {
568     /* update return status */
569     status = HAL_ERROR;
570   }
571   else
572   {
573     if (HAL_DFSDM_CHANNEL_STATE_READY == hdfsdm_channel->State)
574     {
575       switch (CallbackID)
576       {
577         case HAL_DFSDM_CHANNEL_CKAB_CB_ID :
578           hdfsdm_channel->CkabCallback = pCallback;
579           break;
580         case HAL_DFSDM_CHANNEL_SCD_CB_ID :
581           hdfsdm_channel->ScdCallback = pCallback;
582           break;
583         case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :
584           hdfsdm_channel->MspInitCallback = pCallback;
585           break;
586         case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :
587           hdfsdm_channel->MspDeInitCallback = pCallback;
588           break;
589         default :
590           /* update return status */
591           status = HAL_ERROR;
592           break;
593       }
594     }
595     else if (HAL_DFSDM_CHANNEL_STATE_RESET == hdfsdm_channel->State)
596     {
597       switch (CallbackID)
598       {
599         case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :
600           hdfsdm_channel->MspInitCallback = pCallback;
601           break;
602         case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :
603           hdfsdm_channel->MspDeInitCallback = pCallback;
604           break;
605         default :
606           /* update return status */
607           status = HAL_ERROR;
608           break;
609       }
610     }
611     else
612     {
613       /* update return status */
614       status = HAL_ERROR;
615     }
616   }
617   return status;
618 }
619 
620 /**
621   * @brief  Unregister a user DFSDM channel callback.
622   *         DFSDM channel callback is redirected to the weak predefined callback.
623   * @param  hdfsdm_channel DFSDM channel handle.
624   * @param  CallbackID ID of the callback to be unregistered.
625   *         This parameter can be one of the following values:
626   *           @arg @ref HAL_DFSDM_CHANNEL_CKAB_CB_ID clock absence detection callback ID.
627   *           @arg @ref HAL_DFSDM_CHANNEL_SCD_CB_ID short circuit detection callback ID.
628   *           @arg @ref HAL_DFSDM_CHANNEL_MSPINIT_CB_ID MSP init callback ID.
629   *           @arg @ref HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID MSP de-init callback ID.
630   * @retval HAL status.
631   */
HAL_DFSDM_Channel_UnRegisterCallback(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID)632 HAL_StatusTypeDef HAL_DFSDM_Channel_UnRegisterCallback(DFSDM_Channel_HandleTypeDef        *hdfsdm_channel,
633                                                        HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID)
634 {
635   HAL_StatusTypeDef status = HAL_OK;
636 
637   if (HAL_DFSDM_CHANNEL_STATE_READY == hdfsdm_channel->State)
638   {
639     switch (CallbackID)
640     {
641       case HAL_DFSDM_CHANNEL_CKAB_CB_ID :
642         hdfsdm_channel->CkabCallback = HAL_DFSDM_ChannelCkabCallback;
643         break;
644       case HAL_DFSDM_CHANNEL_SCD_CB_ID :
645         hdfsdm_channel->ScdCallback = HAL_DFSDM_ChannelScdCallback;
646         break;
647       case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :
648         hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit;
649         break;
650       case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :
651         hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit;
652         break;
653       default :
654         /* update return status */
655         status = HAL_ERROR;
656         break;
657     }
658   }
659   else if (HAL_DFSDM_CHANNEL_STATE_RESET == hdfsdm_channel->State)
660   {
661     switch (CallbackID)
662     {
663       case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :
664         hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit;
665         break;
666       case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :
667         hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit;
668         break;
669       default :
670         /* update return status */
671         status = HAL_ERROR;
672         break;
673     }
674   }
675   else
676   {
677     /* update return status */
678     status = HAL_ERROR;
679   }
680   return status;
681 }
682 #endif /* USE_HAL_DFSDM_REGISTER_CALLBACKS */
683 
684 /**
685   * @}
686   */
687 
688 /** @defgroup DFSDM_Exported_Functions_Group2_Channel Channel operation functions
689  *  @brief    Channel operation functions
690  *
691 @verbatim
692   ==============================================================================
693                    ##### Channel operation functions #####
694   ==============================================================================
695     [..]  This section provides functions allowing to:
696       (+) Manage clock absence detector feature.
697       (+) Manage short circuit detector feature.
698       (+) Get analog watchdog value.
699       (+) Modify offset value.
700 @endverbatim
701   * @{
702   */
703 
704 /**
705   * @brief  This function allows to start clock absence detection in polling mode.
706   * @note   Same mode has to be used for all channels.
707   * @note   If clock is not available on this channel during 5 seconds,
708   *         clock absence detection will not be activated and function
709   *         will return HAL_TIMEOUT error.
710   * @param  hdfsdm_channel DFSDM channel handle.
711   * @retval HAL status
712   */
HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)713 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
714 {
715   HAL_StatusTypeDef status = HAL_OK;
716   uint32_t channel;
717   uint32_t tickstart;
718 
719   /* Check parameters */
720   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
721 
722   /* Check DFSDM channel state */
723   if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
724   {
725     /* Return error status */
726     status = HAL_ERROR;
727   }
728   else
729   {
730     /* Get channel number from channel instance */
731     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
732 
733     /* Get timeout */
734     tickstart = HAL_GetTick();
735 
736     /* Clear clock absence flag */
737     while ((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) != 0U)
738     {
739       DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
740 
741       /* Check the Timeout */
742       if ((HAL_GetTick() - tickstart) > DFSDM_CKAB_TIMEOUT)
743       {
744         /* Set timeout status */
745         status = HAL_TIMEOUT;
746         break;
747       }
748     }
749 
750     if (status == HAL_OK)
751     {
752       /* Start clock absence detection */
753       hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
754     }
755   }
756   /* Return function status */
757   return status;
758 }
759 
760 /**
761   * @brief  This function allows to poll for the clock absence detection.
762   * @param  hdfsdm_channel DFSDM channel handle.
763   * @param  Timeout Timeout value in milliseconds.
764   * @retval HAL status
765   */
HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,uint32_t Timeout)766 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
767                                                uint32_t Timeout)
768 {
769   uint32_t tickstart;
770   uint32_t channel;
771 
772   /* Check parameters */
773   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
774 
775   /* Check DFSDM channel state */
776   if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
777   {
778     /* Return error status */
779     return HAL_ERROR;
780   }
781   else
782   {
783     /* Get channel number from channel instance */
784     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
785 
786     /* Get timeout */
787     tickstart = HAL_GetTick();
788 
789     /* Wait clock absence detection */
790     while ((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) == 0U)
791     {
792       /* Check the Timeout */
793       if (Timeout != HAL_MAX_DELAY)
794       {
795         if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
796         {
797           /* Return timeout status */
798           return HAL_TIMEOUT;
799         }
800       }
801     }
802 
803     /* Clear clock absence detection flag */
804     DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
805 
806     /* Return function status */
807     return HAL_OK;
808   }
809 }
810 
811 /**
812   * @brief  This function allows to stop clock absence detection in polling mode.
813   * @param  hdfsdm_channel DFSDM channel handle.
814   * @retval HAL status
815   */
HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)816 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
817 {
818   HAL_StatusTypeDef status = HAL_OK;
819   uint32_t channel;
820 
821   /* Check parameters */
822   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
823 
824   /* Check DFSDM channel state */
825   if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
826   {
827     /* Return error status */
828     status = HAL_ERROR;
829   }
830   else
831   {
832     /* Stop clock absence detection */
833     hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
834 
835     /* Clear clock absence flag */
836     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
837     DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
838   }
839   /* Return function status */
840   return status;
841 }
842 
843 /**
844   * @brief  This function allows to start clock absence detection in interrupt mode.
845   * @note   Same mode has to be used for all channels.
846   * @note   If clock is not available on this channel during 5 seconds,
847   *         clock absence detection will not be activated and function
848   *         will return HAL_TIMEOUT error.
849   * @param  hdfsdm_channel DFSDM channel handle.
850   * @retval HAL status
851   */
HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)852 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
853 {
854   HAL_StatusTypeDef status = HAL_OK;
855   uint32_t channel;
856   uint32_t tickstart;
857 
858   /* Check parameters */
859   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
860 
861   /* Check DFSDM channel state */
862   if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
863   {
864     /* Return error status */
865     status = HAL_ERROR;
866   }
867   else
868   {
869     /* Get channel number from channel instance */
870     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
871 
872     /* Get timeout */
873     tickstart = HAL_GetTick();
874 
875     /* Clear clock absence flag */
876     while ((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) != 0U)
877     {
878       DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
879 
880       /* Check the Timeout */
881       if ((HAL_GetTick() - tickstart) > DFSDM_CKAB_TIMEOUT)
882       {
883         /* Set timeout status */
884         status = HAL_TIMEOUT;
885         break;
886       }
887     }
888 
889     if (status == HAL_OK)
890     {
891       /* Activate clock absence detection interrupt */
892       DFSDM1_Filter0->FLTCR2 |= DFSDM_FLTCR2_CKABIE;
893 
894       /* Start clock absence detection */
895       hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
896     }
897   }
898   /* Return function status */
899   return status;
900 }
901 
902 /**
903   * @brief  Clock absence detection callback.
904   * @param  hdfsdm_channel DFSDM channel handle.
905   * @retval None
906   */
HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)907 __weak void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
908 {
909   /* Prevent unused argument(s) compilation warning */
910   UNUSED(hdfsdm_channel);
911 
912   /* NOTE : This function should not be modified, when the callback is needed,
913             the HAL_DFSDM_ChannelCkabCallback could be implemented in the user file
914    */
915 }
916 
917 /**
918   * @brief  This function allows to stop clock absence detection in interrupt mode.
919   * @note   Interrupt will be disabled for all channels
920   * @param  hdfsdm_channel DFSDM channel handle.
921   * @retval HAL status
922   */
HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)923 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
924 {
925   HAL_StatusTypeDef status = HAL_OK;
926   uint32_t channel;
927 
928   /* Check parameters */
929   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
930 
931   /* Check DFSDM channel state */
932   if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
933   {
934     /* Return error status */
935     status = HAL_ERROR;
936   }
937   else
938   {
939     /* Stop clock absence detection */
940     hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
941 
942     /* Clear clock absence flag */
943     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
944     DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
945 
946     /* Disable clock absence detection interrupt */
947     DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_CKABIE);
948   }
949   /* Return function status */
950   return status;
951 }
952 
953 /**
954   * @brief  This function allows to start short circuit detection in polling mode.
955   * @note   Same mode has to be used for all channels
956   * @param  hdfsdm_channel DFSDM channel handle.
957   * @param  Threshold Short circuit detector threshold.
958   *         This parameter must be a number between Min_Data = 0 and Max_Data = 255.
959   * @param  BreakSignal Break signals assigned to short circuit event.
960   *         This parameter can be a values combination of @ref DFSDM_BreakSignals.
961   * @retval HAL status
962   */
HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,uint32_t Threshold,uint32_t BreakSignal)963 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
964                                             uint32_t Threshold,
965                                             uint32_t BreakSignal)
966 {
967   HAL_StatusTypeDef status = HAL_OK;
968 
969   /* Check parameters */
970   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
971   assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
972   assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
973 
974   /* Check DFSDM channel state */
975   if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
976   {
977     /* Return error status */
978     status = HAL_ERROR;
979   }
980   else
981   {
982     /* Configure threshold and break signals */
983     hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
984     hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_Pos) | \
985                                            Threshold);
986 
987     /* Start short circuit detection */
988     hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;
989   }
990   /* Return function status */
991   return status;
992 }
993 
994 /**
995   * @brief  This function allows to poll for the short circuit detection.
996   * @param  hdfsdm_channel DFSDM channel handle.
997   * @param  Timeout Timeout value in milliseconds.
998   * @retval HAL status
999   */
HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,uint32_t Timeout)1000 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
1001                                               uint32_t Timeout)
1002 {
1003   uint32_t tickstart;
1004   uint32_t channel;
1005 
1006   /* Check parameters */
1007   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1008 
1009   /* Check DFSDM channel state */
1010   if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1011   {
1012     /* Return error status */
1013     return HAL_ERROR;
1014   }
1015   else
1016   {
1017     /* Get channel number from channel instance */
1018     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
1019 
1020     /* Get timeout */
1021     tickstart = HAL_GetTick();
1022 
1023     /* Wait short circuit detection */
1024     while (((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_SCDF) >> (DFSDM_FLTISR_SCDF_Pos + channel)) == 0U)
1025     {
1026       /* Check the Timeout */
1027       if (Timeout != HAL_MAX_DELAY)
1028       {
1029         if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
1030         {
1031           /* Return timeout status */
1032           return HAL_TIMEOUT;
1033         }
1034       }
1035     }
1036 
1037     /* Clear short circuit detection flag */
1038     DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel));
1039 
1040     /* Return function status */
1041     return HAL_OK;
1042   }
1043 }
1044 
1045 /**
1046   * @brief  This function allows to stop short circuit detection in polling mode.
1047   * @param  hdfsdm_channel DFSDM channel handle.
1048   * @retval HAL status
1049   */
HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)1050 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1051 {
1052   HAL_StatusTypeDef status = HAL_OK;
1053   uint32_t channel;
1054 
1055   /* Check parameters */
1056   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1057 
1058   /* Check DFSDM channel state */
1059   if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1060   {
1061     /* Return error status */
1062     status = HAL_ERROR;
1063   }
1064   else
1065   {
1066     /* Stop short circuit detection */
1067     hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
1068 
1069     /* Clear short circuit detection flag */
1070     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
1071     DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel));
1072   }
1073   /* Return function status */
1074   return status;
1075 }
1076 
1077 /**
1078   * @brief  This function allows to start short circuit detection in interrupt mode.
1079   * @note   Same mode has to be used for all channels
1080   * @param  hdfsdm_channel DFSDM channel handle.
1081   * @param  Threshold Short circuit detector threshold.
1082   *         This parameter must be a number between Min_Data = 0 and Max_Data = 255.
1083   * @param  BreakSignal Break signals assigned to short circuit event.
1084   *         This parameter can be a values combination of @ref DFSDM_BreakSignals.
1085   * @retval HAL status
1086   */
HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,uint32_t Threshold,uint32_t BreakSignal)1087 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
1088                                                uint32_t Threshold,
1089                                                uint32_t BreakSignal)
1090 {
1091   HAL_StatusTypeDef status = HAL_OK;
1092 
1093   /* Check parameters */
1094   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1095   assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
1096   assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
1097 
1098   /* Check DFSDM channel state */
1099   if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1100   {
1101     /* Return error status */
1102     status = HAL_ERROR;
1103   }
1104   else
1105   {
1106     /* Activate short circuit detection interrupt */
1107     DFSDM1_Filter0->FLTCR2 |= DFSDM_FLTCR2_SCDIE;
1108 
1109     /* Configure threshold and break signals */
1110     hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
1111     hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_Pos) | \
1112                                            Threshold);
1113 
1114     /* Start short circuit detection */
1115     hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;
1116   }
1117   /* Return function status */
1118   return status;
1119 }
1120 
1121 /**
1122   * @brief  Short circuit detection callback.
1123   * @param  hdfsdm_channel DFSDM channel handle.
1124   * @retval None
1125   */
HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)1126 __weak void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1127 {
1128   /* Prevent unused argument(s) compilation warning */
1129   UNUSED(hdfsdm_channel);
1130 
1131   /* NOTE : This function should not be modified, when the callback is needed,
1132             the HAL_DFSDM_ChannelScdCallback could be implemented in the user file
1133    */
1134 }
1135 
1136 /**
1137   * @brief  This function allows to stop short circuit detection in interrupt mode.
1138   * @note   Interrupt will be disabled for all channels
1139   * @param  hdfsdm_channel DFSDM channel handle.
1140   * @retval HAL status
1141   */
HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)1142 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1143 {
1144   HAL_StatusTypeDef status = HAL_OK;
1145   uint32_t channel;
1146 
1147   /* Check parameters */
1148   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1149 
1150   /* Check DFSDM channel state */
1151   if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1152   {
1153     /* Return error status */
1154     status = HAL_ERROR;
1155   }
1156   else
1157   {
1158     /* Stop short circuit detection */
1159     hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
1160 
1161     /* Clear short circuit detection flag */
1162     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
1163     DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel));
1164 
1165     /* Disable short circuit detection interrupt */
1166     DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_SCDIE);
1167   }
1168   /* Return function status */
1169   return status;
1170 }
1171 
1172 /**
1173   * @brief  This function allows to get channel analog watchdog value.
1174   * @param  hdfsdm_channel DFSDM channel handle.
1175   * @retval Channel analog watchdog value.
1176   */
HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)1177 int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1178 {
1179   return (int16_t) hdfsdm_channel->Instance->CHWDATAR;
1180 }
1181 
1182 /**
1183   * @brief  This function allows to modify channel offset value.
1184   * @param  hdfsdm_channel DFSDM channel handle.
1185   * @param  Offset DFSDM channel offset.
1186   *         This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607.
1187   * @retval HAL status.
1188   */
HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,int32_t Offset)1189 HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
1190                                                 int32_t Offset)
1191 {
1192   HAL_StatusTypeDef status = HAL_OK;
1193 
1194   /* Check parameters */
1195   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1196   assert_param(IS_DFSDM_CHANNEL_OFFSET(Offset));
1197 
1198   /* Check DFSDM channel state */
1199   if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1200   {
1201     /* Return error status */
1202     status = HAL_ERROR;
1203   }
1204   else
1205   {
1206     /* Modify channel offset */
1207     hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET);
1208     hdfsdm_channel->Instance->CHCFGR2 |= ((uint32_t) Offset << DFSDM_CHCFGR2_OFFSET_Pos);
1209   }
1210   /* Return function status */
1211   return status;
1212 }
1213 
1214 /**
1215   * @}
1216   */
1217 
1218 /** @defgroup DFSDM_Exported_Functions_Group3_Channel Channel state function
1219  *  @brief    Channel state function
1220  *
1221 @verbatim
1222   ==============================================================================
1223                    ##### Channel state function #####
1224   ==============================================================================
1225     [..]  This section provides function allowing to:
1226       (+) Get channel handle state.
1227 @endverbatim
1228   * @{
1229   */
1230 
1231 /**
1232   * @brief  This function allows to get the current DFSDM channel handle state.
1233   * @param  hdfsdm_channel DFSDM channel handle.
1234   * @retval DFSDM channel state.
1235   */
HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)1236 HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1237 {
1238   /* Return DFSDM channel handle state */
1239   return hdfsdm_channel->State;
1240 }
1241 
1242 /**
1243   * @}
1244   */
1245 
1246 /** @defgroup DFSDM_Exported_Functions_Group1_Filter Filter initialization and de-initialization functions
1247  *  @brief    Filter initialization and de-initialization functions
1248  *
1249 @verbatim
1250   ==============================================================================
1251         ##### Filter initialization and de-initialization functions #####
1252   ==============================================================================
1253     [..]  This section provides functions allowing to:
1254       (+) Initialize the DFSDM filter.
1255       (+) De-initialize the DFSDM filter.
1256 @endverbatim
1257   * @{
1258   */
1259 
1260 /**
1261   * @brief  Initialize the DFSDM filter according to the specified parameters
1262   *         in the DFSDM_FilterInitTypeDef structure and initialize the associated handle.
1263   * @param  hdfsdm_filter DFSDM filter handle.
1264   * @retval HAL status.
1265   */
HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1266 HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1267 {
1268   /* Check DFSDM Channel handle */
1269   if (hdfsdm_filter == NULL)
1270   {
1271     return HAL_ERROR;
1272   }
1273 
1274   /* Check parameters */
1275   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1276   assert_param(IS_DFSDM_FILTER_REG_TRIGGER(hdfsdm_filter->Init.RegularParam.Trigger));
1277   assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.FastMode));
1278   assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.DmaMode));
1279   assert_param(IS_DFSDM_FILTER_INJ_TRIGGER(hdfsdm_filter->Init.InjectedParam.Trigger));
1280   assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.ScanMode));
1281   assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.DmaMode));
1282   assert_param(IS_DFSDM_FILTER_SINC_ORDER(hdfsdm_filter->Init.FilterParam.SincOrder));
1283   assert_param(IS_DFSDM_FILTER_OVS_RATIO(hdfsdm_filter->Init.FilterParam.Oversampling));
1284   assert_param(IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(hdfsdm_filter->Init.FilterParam.IntOversampling));
1285 
1286   /* Check parameters compatibility */
1287   if ((hdfsdm_filter->Instance == DFSDM1_Filter0) &&
1288       ((hdfsdm_filter->Init.RegularParam.Trigger  == DFSDM_FILTER_SYNC_TRIGGER) ||
1289        (hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER)))
1290   {
1291     return HAL_ERROR;
1292   }
1293 
1294   /* Initialize DFSDM filter variables with default values */
1295   hdfsdm_filter->RegularContMode     = DFSDM_CONTINUOUS_CONV_OFF;
1296   hdfsdm_filter->InjectedChannelsNbr = 1;
1297   hdfsdm_filter->InjConvRemaining    = 1;
1298   hdfsdm_filter->ErrorCode           = DFSDM_FILTER_ERROR_NONE;
1299 
1300 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
1301   /* Reset callback pointers to the weak predefined callbacks */
1302   hdfsdm_filter->AwdCallback             = HAL_DFSDM_FilterAwdCallback;
1303   hdfsdm_filter->RegConvCpltCallback     = HAL_DFSDM_FilterRegConvCpltCallback;
1304   hdfsdm_filter->RegConvHalfCpltCallback = HAL_DFSDM_FilterRegConvHalfCpltCallback;
1305   hdfsdm_filter->InjConvCpltCallback     = HAL_DFSDM_FilterInjConvCpltCallback;
1306   hdfsdm_filter->InjConvHalfCpltCallback = HAL_DFSDM_FilterInjConvHalfCpltCallback;
1307   hdfsdm_filter->ErrorCallback           = HAL_DFSDM_FilterErrorCallback;
1308 
1309   /* Call MSP init function */
1310   if (hdfsdm_filter->MspInitCallback == NULL)
1311   {
1312     hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit;
1313   }
1314   hdfsdm_filter->MspInitCallback(hdfsdm_filter);
1315 #else
1316   /* Call MSP init function */
1317   HAL_DFSDM_FilterMspInit(hdfsdm_filter);
1318 #endif
1319 
1320   /* Set regular parameters */
1321   hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
1322   if (hdfsdm_filter->Init.RegularParam.FastMode == ENABLE)
1323   {
1324     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_FAST;
1325   }
1326   else
1327   {
1328     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_FAST);
1329   }
1330 
1331   if (hdfsdm_filter->Init.RegularParam.DmaMode == ENABLE)
1332   {
1333     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RDMAEN;
1334   }
1335   else
1336   {
1337     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RDMAEN);
1338   }
1339 
1340   /* Set injected parameters */
1341   hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC | DFSDM_FLTCR1_JEXTEN | DFSDM_FLTCR1_JEXTSEL);
1342   if (hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_EXT_TRIGGER)
1343   {
1344     assert_param(IS_DFSDM_FILTER_EXT_TRIG(hdfsdm_filter->Init.InjectedParam.ExtTrigger));
1345     assert_param(IS_DFSDM_FILTER_EXT_TRIG_EDGE(hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge));
1346     hdfsdm_filter->Instance->FLTCR1 |= (hdfsdm_filter->Init.InjectedParam.ExtTrigger);
1347   }
1348 
1349   if (hdfsdm_filter->Init.InjectedParam.ScanMode == ENABLE)
1350   {
1351     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSCAN;
1352   }
1353   else
1354   {
1355     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSCAN);
1356   }
1357 
1358   if (hdfsdm_filter->Init.InjectedParam.DmaMode == ENABLE)
1359   {
1360     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JDMAEN;
1361   }
1362   else
1363   {
1364     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JDMAEN);
1365   }
1366 
1367   /* Set filter parameters */
1368   hdfsdm_filter->Instance->FLTFCR &= ~(DFSDM_FLTFCR_FORD | DFSDM_FLTFCR_FOSR | DFSDM_FLTFCR_IOSR);
1369   hdfsdm_filter->Instance->FLTFCR |= (hdfsdm_filter->Init.FilterParam.SincOrder |
1370                                       ((hdfsdm_filter->Init.FilterParam.Oversampling - 1U) << DFSDM_FLTFCR_FOSR_Pos) |
1371                                       (hdfsdm_filter->Init.FilterParam.IntOversampling - 1U));
1372 
1373   /* Store regular and injected triggers and injected scan mode*/
1374   hdfsdm_filter->RegularTrigger   = hdfsdm_filter->Init.RegularParam.Trigger;
1375   hdfsdm_filter->InjectedTrigger  = hdfsdm_filter->Init.InjectedParam.Trigger;
1376   hdfsdm_filter->ExtTriggerEdge   = hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge;
1377   hdfsdm_filter->InjectedScanMode = hdfsdm_filter->Init.InjectedParam.ScanMode;
1378 
1379   /* Enable DFSDM filter */
1380   hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
1381 
1382   /* Set DFSDM filter to ready state */
1383   hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_READY;
1384 
1385   return HAL_OK;
1386 }
1387 
1388 /**
1389   * @brief  De-initializes the DFSDM filter.
1390   * @param  hdfsdm_filter DFSDM filter handle.
1391   * @retval HAL status.
1392   */
HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1393 HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1394 {
1395   /* Check DFSDM filter handle */
1396   if (hdfsdm_filter == NULL)
1397   {
1398     return HAL_ERROR;
1399   }
1400 
1401   /* Check parameters */
1402   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1403 
1404   /* Disable the DFSDM filter */
1405   hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
1406 
1407   /* Call MSP deinit function */
1408 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
1409   if (hdfsdm_filter->MspDeInitCallback == NULL)
1410   {
1411     hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit;
1412   }
1413   hdfsdm_filter->MspDeInitCallback(hdfsdm_filter);
1414 #else
1415   HAL_DFSDM_FilterMspDeInit(hdfsdm_filter);
1416 #endif
1417 
1418   /* Set DFSDM filter in reset state */
1419   hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_RESET;
1420 
1421   return HAL_OK;
1422 }
1423 
1424 /**
1425   * @brief  Initializes the DFSDM filter MSP.
1426   * @param  hdfsdm_filter DFSDM filter handle.
1427   * @retval None
1428   */
HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1429 __weak void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1430 {
1431   /* Prevent unused argument(s) compilation warning */
1432   UNUSED(hdfsdm_filter);
1433 
1434   /* NOTE : This function should not be modified, when the function is needed,
1435             the HAL_DFSDM_FilterMspInit could be implemented in the user file.
1436    */
1437 }
1438 
1439 /**
1440   * @brief  De-initializes the DFSDM filter MSP.
1441   * @param  hdfsdm_filter DFSDM filter handle.
1442   * @retval None
1443   */
HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1444 __weak void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1445 {
1446   /* Prevent unused argument(s) compilation warning */
1447   UNUSED(hdfsdm_filter);
1448 
1449   /* NOTE : This function should not be modified, when the function is needed,
1450             the HAL_DFSDM_FilterMspDeInit could be implemented in the user file.
1451    */
1452 }
1453 
1454 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
1455 /**
1456   * @brief  Register a user DFSDM filter callback
1457   *         to be used instead of the weak predefined callback.
1458   * @param  hdfsdm_filter DFSDM filter handle.
1459   * @param  CallbackID ID of the callback to be registered.
1460   *         This parameter can be one of the following values:
1461   *           @arg @ref HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID regular conversion complete callback ID.
1462   *           @arg @ref HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID half regular conversion complete callback ID.
1463   *           @arg @ref HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID injected conversion complete callback ID.
1464   *           @arg @ref HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID half injected conversion complete callback ID.
1465   *           @arg @ref HAL_DFSDM_FILTER_ERROR_CB_ID error callback ID.
1466   *           @arg @ref HAL_DFSDM_FILTER_MSPINIT_CB_ID MSP init callback ID.
1467   *           @arg @ref HAL_DFSDM_FILTER_MSPDEINIT_CB_ID MSP de-init callback ID.
1468   * @param  pCallback pointer to the callback function.
1469   * @retval HAL status.
1470   */
HAL_DFSDM_Filter_RegisterCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID,pDFSDM_Filter_CallbackTypeDef pCallback)1471 HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterCallback(DFSDM_Filter_HandleTypeDef        *hdfsdm_filter,
1472                                                     HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID,
1473                                                     pDFSDM_Filter_CallbackTypeDef      pCallback)
1474 {
1475   HAL_StatusTypeDef status = HAL_OK;
1476 
1477   if (pCallback == NULL)
1478   {
1479     /* update the error code */
1480     hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1481     /* update return status */
1482     status = HAL_ERROR;
1483   }
1484   else
1485   {
1486     if (HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)
1487     {
1488       switch (CallbackID)
1489       {
1490         case HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID :
1491           hdfsdm_filter->RegConvCpltCallback = pCallback;
1492           break;
1493         case HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID :
1494           hdfsdm_filter->RegConvHalfCpltCallback = pCallback;
1495           break;
1496         case HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID :
1497           hdfsdm_filter->InjConvCpltCallback = pCallback;
1498           break;
1499         case HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID :
1500           hdfsdm_filter->InjConvHalfCpltCallback = pCallback;
1501           break;
1502         case HAL_DFSDM_FILTER_ERROR_CB_ID :
1503           hdfsdm_filter->ErrorCallback = pCallback;
1504           break;
1505         case HAL_DFSDM_FILTER_MSPINIT_CB_ID :
1506           hdfsdm_filter->MspInitCallback = pCallback;
1507           break;
1508         case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :
1509           hdfsdm_filter->MspDeInitCallback = pCallback;
1510           break;
1511         default :
1512           /* update the error code */
1513           hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1514           /* update return status */
1515           status = HAL_ERROR;
1516           break;
1517       }
1518     }
1519     else if (HAL_DFSDM_FILTER_STATE_RESET == hdfsdm_filter->State)
1520     {
1521       switch (CallbackID)
1522       {
1523         case HAL_DFSDM_FILTER_MSPINIT_CB_ID :
1524           hdfsdm_filter->MspInitCallback = pCallback;
1525           break;
1526         case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :
1527           hdfsdm_filter->MspDeInitCallback = pCallback;
1528           break;
1529         default :
1530           /* update the error code */
1531           hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1532           /* update return status */
1533           status = HAL_ERROR;
1534           break;
1535       }
1536     }
1537     else
1538     {
1539       /* update the error code */
1540       hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1541       /* update return status */
1542       status = HAL_ERROR;
1543     }
1544   }
1545   return status;
1546 }
1547 
1548 /**
1549   * @brief  Unregister a user DFSDM filter callback.
1550   *         DFSDM filter callback is redirected to the weak predefined callback.
1551   * @param  hdfsdm_filter DFSDM filter handle.
1552   * @param  CallbackID ID of the callback to be unregistered.
1553   *         This parameter can be one of the following values:
1554   *           @arg @ref HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID regular conversion complete callback ID.
1555   *           @arg @ref HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID half regular conversion complete callback ID.
1556   *           @arg @ref HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID injected conversion complete callback ID.
1557   *           @arg @ref HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID half injected conversion complete callback ID.
1558   *           @arg @ref HAL_DFSDM_FILTER_ERROR_CB_ID error callback ID.
1559   *           @arg @ref HAL_DFSDM_FILTER_MSPINIT_CB_ID MSP init callback ID.
1560   *           @arg @ref HAL_DFSDM_FILTER_MSPDEINIT_CB_ID MSP de-init callback ID.
1561   * @retval HAL status.
1562   */
HAL_DFSDM_Filter_UnRegisterCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID)1563 HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterCallback(DFSDM_Filter_HandleTypeDef        *hdfsdm_filter,
1564                                                       HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID)
1565 {
1566   HAL_StatusTypeDef status = HAL_OK;
1567 
1568   if (HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)
1569   {
1570     switch (CallbackID)
1571     {
1572       case HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID :
1573         hdfsdm_filter->RegConvCpltCallback = HAL_DFSDM_FilterRegConvCpltCallback;
1574         break;
1575       case HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID :
1576         hdfsdm_filter->RegConvHalfCpltCallback = HAL_DFSDM_FilterRegConvHalfCpltCallback;
1577         break;
1578       case HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID :
1579         hdfsdm_filter->InjConvCpltCallback = HAL_DFSDM_FilterInjConvCpltCallback;
1580         break;
1581       case HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID :
1582         hdfsdm_filter->InjConvHalfCpltCallback = HAL_DFSDM_FilterInjConvHalfCpltCallback;
1583         break;
1584       case HAL_DFSDM_FILTER_ERROR_CB_ID :
1585         hdfsdm_filter->ErrorCallback = HAL_DFSDM_FilterErrorCallback;
1586         break;
1587       case HAL_DFSDM_FILTER_MSPINIT_CB_ID :
1588         hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit;
1589         break;
1590       case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :
1591         hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit;
1592         break;
1593       default :
1594         /* update the error code */
1595         hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1596         /* update return status */
1597         status = HAL_ERROR;
1598         break;
1599     }
1600   }
1601   else if (HAL_DFSDM_FILTER_STATE_RESET == hdfsdm_filter->State)
1602   {
1603     switch (CallbackID)
1604     {
1605       case HAL_DFSDM_FILTER_MSPINIT_CB_ID :
1606         hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit;
1607         break;
1608       case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :
1609         hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit;
1610         break;
1611       default :
1612         /* update the error code */
1613         hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1614         /* update return status */
1615         status = HAL_ERROR;
1616         break;
1617     }
1618   }
1619   else
1620   {
1621     /* update the error code */
1622     hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1623     /* update return status */
1624     status = HAL_ERROR;
1625   }
1626   return status;
1627 }
1628 
1629 /**
1630   * @brief  Register a user DFSDM filter analog watchdog callback
1631   *         to be used instead of the weak predefined callback.
1632   * @param  hdfsdm_filter DFSDM filter handle.
1633   * @param  pCallback pointer to the DFSDM filter analog watchdog callback function.
1634   * @retval HAL status.
1635   */
HAL_DFSDM_Filter_RegisterAwdCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,pDFSDM_Filter_AwdCallbackTypeDef pCallback)1636 HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterAwdCallback(DFSDM_Filter_HandleTypeDef      *hdfsdm_filter,
1637                                                        pDFSDM_Filter_AwdCallbackTypeDef pCallback)
1638 {
1639   HAL_StatusTypeDef status = HAL_OK;
1640 
1641   if (pCallback == NULL)
1642   {
1643     /* update the error code */
1644     hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1645     /* update return status */
1646     status = HAL_ERROR;
1647   }
1648   else
1649   {
1650     if (HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)
1651     {
1652       hdfsdm_filter->AwdCallback = pCallback;
1653     }
1654     else
1655     {
1656       /* update the error code */
1657       hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1658       /* update return status */
1659       status = HAL_ERROR;
1660     }
1661   }
1662   return status;
1663 }
1664 
1665 /**
1666   * @brief  Unregister a user DFSDM filter analog watchdog callback.
1667   *         DFSDM filter AWD callback is redirected to the weak predefined callback.
1668   * @param  hdfsdm_filter DFSDM filter handle.
1669   * @retval HAL status.
1670   */
HAL_DFSDM_Filter_UnRegisterAwdCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1671 HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1672 {
1673   HAL_StatusTypeDef status = HAL_OK;
1674 
1675   if (HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)
1676   {
1677     hdfsdm_filter->AwdCallback = HAL_DFSDM_FilterAwdCallback;
1678   }
1679   else
1680   {
1681     /* update the error code */
1682     hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1683     /* update return status */
1684     status = HAL_ERROR;
1685   }
1686   return status;
1687 }
1688 #endif /* USE_HAL_DFSDM_REGISTER_CALLBACKS */
1689 
1690 /**
1691   * @}
1692   */
1693 
1694 /** @defgroup DFSDM_Exported_Functions_Group2_Filter Filter control functions
1695  *  @brief    Filter control functions
1696  *
1697 @verbatim
1698   ==============================================================================
1699                     ##### Filter control functions #####
1700   ==============================================================================
1701     [..]  This section provides functions allowing to:
1702       (+) Select channel and enable/disable continuous mode for regular conversion.
1703       (+) Select channels for injected conversion.
1704 @endverbatim
1705   * @{
1706   */
1707 
1708 /**
1709   * @brief  This function allows to select channel and to enable/disable
1710   *         continuous mode for regular conversion.
1711   * @param  hdfsdm_filter DFSDM filter handle.
1712   * @param  Channel Channel for regular conversion.
1713   *         This parameter can be a value of @ref DFSDM_Channel_Selection.
1714   * @param  ContinuousMode Enable/disable continuous mode for regular conversion.
1715   *         This parameter can be a value of @ref DFSDM_ContinuousMode.
1716   * @retval HAL status
1717   */
HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Channel,uint32_t ContinuousMode)1718 HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1719                                                    uint32_t                    Channel,
1720                                                    uint32_t                    ContinuousMode)
1721 {
1722   HAL_StatusTypeDef status = HAL_OK;
1723 
1724   /* Check parameters */
1725   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1726   assert_param(IS_DFSDM_REGULAR_CHANNEL(Channel));
1727   assert_param(IS_DFSDM_CONTINUOUS_MODE(ContinuousMode));
1728 
1729   /* Check DFSDM filter state */
1730   if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
1731       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
1732   {
1733     /* Configure channel and continuous mode for regular conversion */
1734     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RCH | DFSDM_FLTCR1_RCONT);
1735     if (ContinuousMode == DFSDM_CONTINUOUS_CONV_ON)
1736     {
1737       hdfsdm_filter->Instance->FLTCR1 |= (uint32_t)(((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET) |
1738                                                     DFSDM_FLTCR1_RCONT);
1739     }
1740     else
1741     {
1742       hdfsdm_filter->Instance->FLTCR1 |= (uint32_t)((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET);
1743     }
1744     /* Store continuous mode information */
1745     hdfsdm_filter->RegularContMode = ContinuousMode;
1746   }
1747   else
1748   {
1749     status = HAL_ERROR;
1750   }
1751 
1752   /* Return function status */
1753   return status;
1754 }
1755 
1756 /**
1757   * @brief  This function allows to select channels for injected conversion.
1758   * @param  hdfsdm_filter DFSDM filter handle.
1759   * @param  Channel Channels for injected conversion.
1760   *         This parameter can be a values combination of @ref DFSDM_Channel_Selection.
1761   * @retval HAL status
1762   */
HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Channel)1763 HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1764                                                    uint32_t                    Channel)
1765 {
1766   HAL_StatusTypeDef status = HAL_OK;
1767 
1768   /* Check parameters */
1769   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1770   assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
1771 
1772   /* Check DFSDM filter state */
1773   if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
1774       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
1775   {
1776     /* Configure channel for injected conversion */
1777     hdfsdm_filter->Instance->FLTJCHGR = (uint32_t)(Channel & DFSDM_LSB_MASK);
1778     /* Store number of injected channels */
1779     hdfsdm_filter->InjectedChannelsNbr = DFSDM_GetInjChannelsNbr(Channel);
1780     /* Update number of injected channels remaining */
1781     hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
1782                                       hdfsdm_filter->InjectedChannelsNbr : 1U;
1783   }
1784   else
1785   {
1786     status = HAL_ERROR;
1787   }
1788   /* Return function status */
1789   return status;
1790 }
1791 
1792 /**
1793   * @}
1794   */
1795 
1796 /** @defgroup DFSDM_Exported_Functions_Group3_Filter Filter operation functions
1797  *  @brief    Filter operation functions
1798  *
1799 @verbatim
1800   ==============================================================================
1801                     ##### Filter operation functions #####
1802   ==============================================================================
1803     [..]  This section provides functions allowing to:
1804       (+) Start conversion of regular/injected channel.
1805       (+) Poll for the end of regular/injected conversion.
1806       (+) Stop conversion of regular/injected channel.
1807       (+) Start conversion of regular/injected channel and enable interrupt.
1808       (+) Call the callback functions at the end of regular/injected conversions.
1809       (+) Stop conversion of regular/injected channel and disable interrupt.
1810       (+) Start conversion of regular/injected channel and enable DMA transfer.
1811       (+) Stop conversion of regular/injected channel and disable DMA transfer.
1812       (+) Start analog watchdog and enable interrupt.
1813       (+) Call the callback function when analog watchdog occurs.
1814       (+) Stop analog watchdog and disable interrupt.
1815       (+) Start extreme detector.
1816       (+) Stop extreme detector.
1817       (+) Get result of regular channel conversion.
1818       (+) Get result of injected channel conversion.
1819       (+) Get extreme detector maximum and minimum values.
1820       (+) Get conversion time.
1821       (+) Handle DFSDM interrupt request.
1822 @endverbatim
1823   * @{
1824   */
1825 
1826 /**
1827   * @brief  This function allows to start regular conversion in polling mode.
1828   * @note   This function should be called only when DFSDM filter instance is
1829   *         in idle state or if injected conversion is ongoing.
1830   * @param  hdfsdm_filter DFSDM filter handle.
1831   * @retval HAL status
1832   */
HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1833 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1834 {
1835   HAL_StatusTypeDef status = HAL_OK;
1836 
1837   /* Check parameters */
1838   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1839 
1840   /* Check DFSDM filter state */
1841   if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
1842       (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
1843   {
1844     /* Start regular conversion */
1845     DFSDM_RegConvStart(hdfsdm_filter);
1846   }
1847   else
1848   {
1849     status = HAL_ERROR;
1850   }
1851   /* Return function status */
1852   return status;
1853 }
1854 
1855 /**
1856   * @brief  This function allows to poll for the end of regular conversion.
1857   * @note   This function should be called only if regular conversion is ongoing.
1858   * @param  hdfsdm_filter DFSDM filter handle.
1859   * @param  Timeout Timeout value in milliseconds.
1860   * @retval HAL status
1861   */
HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Timeout)1862 HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1863                                                        uint32_t                    Timeout)
1864 {
1865   uint32_t tickstart;
1866 
1867   /* Check parameters */
1868   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1869 
1870   /* Check DFSDM filter state */
1871   if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
1872       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
1873   {
1874     /* Return error status */
1875     return HAL_ERROR;
1876   }
1877   else
1878   {
1879     /* Get timeout */
1880     tickstart = HAL_GetTick();
1881 
1882     /* Wait end of regular conversion */
1883     while ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != DFSDM_FLTISR_REOCF)
1884     {
1885       /* Check the Timeout */
1886       if (Timeout != HAL_MAX_DELAY)
1887       {
1888         if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
1889         {
1890           /* Return timeout status */
1891           return HAL_TIMEOUT;
1892         }
1893       }
1894     }
1895     /* Check if overrun occurs */
1896     if ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) == DFSDM_FLTISR_ROVRF)
1897     {
1898       /* Update error code and call error callback */
1899       hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
1900 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
1901       hdfsdm_filter->ErrorCallback(hdfsdm_filter);
1902 #else
1903       HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
1904 #endif
1905 
1906       /* Clear regular overrun flag */
1907       hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
1908     }
1909     /* Update DFSDM filter state only if not continuous conversion and SW trigger */
1910     if ((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
1911         (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
1912     {
1913       hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
1914                              HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
1915     }
1916     /* Return function status */
1917     return HAL_OK;
1918   }
1919 }
1920 
1921 /**
1922   * @brief  This function allows to stop regular conversion in polling mode.
1923   * @note   This function should be called only if regular conversion is ongoing.
1924   * @param  hdfsdm_filter DFSDM filter handle.
1925   * @retval HAL status
1926   */
HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1927 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1928 {
1929   HAL_StatusTypeDef status = HAL_OK;
1930 
1931   /* Check parameters */
1932   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1933 
1934   /* Check DFSDM filter state */
1935   if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
1936       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
1937   {
1938     /* Return error status */
1939     status = HAL_ERROR;
1940   }
1941   else
1942   {
1943     /* Stop regular conversion */
1944     DFSDM_RegConvStop(hdfsdm_filter);
1945   }
1946   /* Return function status */
1947   return status;
1948 }
1949 
1950 /**
1951   * @brief  This function allows to start regular conversion in interrupt mode.
1952   * @note   This function should be called only when DFSDM filter instance is
1953   *         in idle state or if injected conversion is ongoing.
1954   * @param  hdfsdm_filter DFSDM filter handle.
1955   * @retval HAL status
1956   */
HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1957 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1958 {
1959   HAL_StatusTypeDef status = HAL_OK;
1960 
1961   /* Check parameters */
1962   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1963 
1964   /* Check DFSDM filter state */
1965   if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
1966       (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
1967   {
1968     /* Enable interrupts for regular conversions */
1969     hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);
1970 
1971     /* Start regular conversion */
1972     DFSDM_RegConvStart(hdfsdm_filter);
1973   }
1974   else
1975   {
1976     status = HAL_ERROR;
1977   }
1978   /* Return function status */
1979   return status;
1980 }
1981 
1982 /**
1983   * @brief  This function allows to stop regular conversion in interrupt mode.
1984   * @note   This function should be called only if regular conversion is ongoing.
1985   * @param  hdfsdm_filter DFSDM filter handle.
1986   * @retval HAL status
1987   */
HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1988 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1989 {
1990   HAL_StatusTypeDef status = HAL_OK;
1991 
1992   /* Check parameters */
1993   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1994 
1995   /* Check DFSDM filter state */
1996   if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
1997       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
1998   {
1999     /* Return error status */
2000     status = HAL_ERROR;
2001   }
2002   else
2003   {
2004     /* Disable interrupts for regular conversions */
2005     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);
2006 
2007     /* Stop regular conversion */
2008     DFSDM_RegConvStop(hdfsdm_filter);
2009   }
2010   /* Return function status */
2011   return status;
2012 }
2013 
2014 /**
2015   * @brief  This function allows to start regular conversion in DMA mode.
2016   * @note   This function should be called only when DFSDM filter instance is
2017   *         in idle state or if injected conversion is ongoing.
2018   *         Please note that data on buffer will contain signed regular conversion
2019   *         value on 24 most significant bits and corresponding channel on 3 least
2020   *         significant bits.
2021   * @param  hdfsdm_filter DFSDM filter handle.
2022   * @param  pData The destination buffer address.
2023   * @param  Length The length of data to be transferred from DFSDM filter to memory.
2024   * @retval HAL status
2025   */
HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,int32_t * pData,uint32_t Length)2026 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2027                                                    int32_t                    *pData,
2028                                                    uint32_t                    Length)
2029 {
2030   HAL_StatusTypeDef status = HAL_OK;
2031 
2032   /* Check parameters */
2033   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2034 
2035   /* Check destination address and length */
2036   if ((pData == NULL) || (Length == 0U))
2037   {
2038     status = HAL_ERROR;
2039   }
2040   /* Check that DMA is enabled for regular conversion */
2041   else if ((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
2042   {
2043     status = HAL_ERROR;
2044   }
2045   /* Check parameters compatibility */
2046   else if ((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2047            (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2048            (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
2049            (Length != 1U))
2050   {
2051     status = HAL_ERROR;
2052   }
2053   else if ((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2054            (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2055            (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
2056   {
2057     status = HAL_ERROR;
2058   }
2059   /* Check DFSDM filter state */
2060   else if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2061            (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
2062   {
2063     /* Set callbacks on DMA handler */
2064     hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
2065     hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
2066     hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ? \
2067                                                    DFSDM_DMARegularHalfConvCplt : NULL;
2068 
2069     /* Start DMA in interrupt mode */
2070     if (HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)&hdfsdm_filter->Instance->FLTRDATAR, \
2071                          (uint32_t) pData, Length) != HAL_OK)
2072     {
2073       /* Set DFSDM filter in error state */
2074       hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2075       status = HAL_ERROR;
2076     }
2077     else
2078     {
2079       /* Start regular conversion */
2080       DFSDM_RegConvStart(hdfsdm_filter);
2081     }
2082   }
2083   else
2084   {
2085     status = HAL_ERROR;
2086   }
2087   /* Return function status */
2088   return status;
2089 }
2090 
2091 /**
2092   * @brief  This function allows to start regular conversion in DMA mode and to get
2093   *         only the 16 most significant bits of conversion.
2094   * @note   This function should be called only when DFSDM filter instance is
2095   *         in idle state or if injected conversion is ongoing.
2096   *         Please note that data on buffer will contain signed 16 most significant
2097   *         bits of regular conversion.
2098   * @param  hdfsdm_filter DFSDM filter handle.
2099   * @param  pData The destination buffer address.
2100   * @param  Length The length of data to be transferred from DFSDM filter to memory.
2101   * @retval HAL status
2102   */
HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,int16_t * pData,uint32_t Length)2103 HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2104                                                       int16_t                    *pData,
2105                                                       uint32_t                    Length)
2106 {
2107   HAL_StatusTypeDef status = HAL_OK;
2108 
2109   /* Check parameters */
2110   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2111 
2112   /* Check destination address and length */
2113   if ((pData == NULL) || (Length == 0U))
2114   {
2115     status = HAL_ERROR;
2116   }
2117   /* Check that DMA is enabled for regular conversion */
2118   else if ((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
2119   {
2120     status = HAL_ERROR;
2121   }
2122   /* Check parameters compatibility */
2123   else if ((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2124            (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2125            (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
2126            (Length != 1U))
2127   {
2128     status = HAL_ERROR;
2129   }
2130   else if ((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2131            (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2132            (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
2133   {
2134     status = HAL_ERROR;
2135   }
2136   /* Check DFSDM filter state */
2137   else if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2138            (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
2139   {
2140     /* Set callbacks on DMA handler */
2141     hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
2142     hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
2143     hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ? \
2144                                                    DFSDM_DMARegularHalfConvCplt : NULL;
2145 
2146     /* Start DMA in interrupt mode */
2147     if (HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)(&hdfsdm_filter->Instance->FLTRDATAR) + 2U, \
2148                          (uint32_t) pData, Length) != HAL_OK)
2149     {
2150       /* Set DFSDM filter in error state */
2151       hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2152       status = HAL_ERROR;
2153     }
2154     else
2155     {
2156       /* Start regular conversion */
2157       DFSDM_RegConvStart(hdfsdm_filter);
2158     }
2159   }
2160   else
2161   {
2162     status = HAL_ERROR;
2163   }
2164   /* Return function status */
2165   return status;
2166 }
2167 
2168 /**
2169   * @brief  This function allows to stop regular conversion in DMA mode.
2170   * @note   This function should be called only if regular conversion is ongoing.
2171   * @param  hdfsdm_filter DFSDM filter handle.
2172   * @retval HAL status
2173   */
HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2174 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2175 {
2176   HAL_StatusTypeDef status = HAL_OK;
2177 
2178   /* Check parameters */
2179   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2180 
2181   /* Check DFSDM filter state */
2182   if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
2183       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2184   {
2185     /* Return error status */
2186     status = HAL_ERROR;
2187   }
2188   else
2189   {
2190     /* Stop current DMA transfer */
2191     /* No need to check the returned value of HAL_DMA_Abort. */
2192     /* Only HAL_DMA_ERROR_NO_XFER can be returned in case of error and it's not an error for DFSDM. */
2193     (void) HAL_DMA_Abort(hdfsdm_filter->hdmaReg);
2194 
2195     /* Stop regular conversion */
2196     DFSDM_RegConvStop(hdfsdm_filter);
2197   }
2198   /* Return function status */
2199   return status;
2200 }
2201 
2202 /**
2203   * @brief  This function allows to get regular conversion value.
2204   * @param  hdfsdm_filter DFSDM filter handle.
2205   * @param  Channel Corresponding channel of regular conversion.
2206   * @retval Regular conversion value
2207   */
HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t * Channel)2208 int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2209                                         uint32_t                   *Channel)
2210 {
2211   uint32_t reg;
2212   int32_t  value;
2213 
2214   /* Check parameters */
2215   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2216   assert_param(Channel != (void *)0);
2217 
2218   /* Get value of data register for regular channel */
2219   reg = hdfsdm_filter->Instance->FLTRDATAR;
2220 
2221   /* Extract channel and regular conversion value */
2222   *Channel = (reg & DFSDM_FLTRDATAR_RDATACH);
2223   /* Regular conversion value is a signed value located on 24 MSB of register */
2224   /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */
2225   reg &= DFSDM_FLTRDATAR_RDATA;
2226   value = ((int32_t)reg) / 256;
2227 
2228   /* return regular conversion value */
2229   return value;
2230 }
2231 
2232 /**
2233   * @brief  This function allows to start injected conversion in polling mode.
2234   * @note   This function should be called only when DFSDM filter instance is
2235   *         in idle state or if regular conversion is ongoing.
2236   * @param  hdfsdm_filter DFSDM filter handle.
2237   * @retval HAL status
2238   */
HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2239 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2240 {
2241   HAL_StatusTypeDef status = HAL_OK;
2242 
2243   /* Check parameters */
2244   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2245 
2246   /* Check DFSDM filter state */
2247   if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2248       (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
2249   {
2250     /* Start injected conversion */
2251     DFSDM_InjConvStart(hdfsdm_filter);
2252   }
2253   else
2254   {
2255     status = HAL_ERROR;
2256   }
2257   /* Return function status */
2258   return status;
2259 }
2260 
2261 /**
2262   * @brief  This function allows to poll for the end of injected conversion.
2263   * @note   This function should be called only if injected conversion is ongoing.
2264   * @param  hdfsdm_filter DFSDM filter handle.
2265   * @param  Timeout Timeout value in milliseconds.
2266   * @retval HAL status
2267   */
HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Timeout)2268 HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2269                                                        uint32_t                    Timeout)
2270 {
2271   uint32_t tickstart;
2272 
2273   /* Check parameters */
2274   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2275 
2276   /* Check DFSDM filter state */
2277   if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
2278       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2279   {
2280     /* Return error status */
2281     return HAL_ERROR;
2282   }
2283   else
2284   {
2285     /* Get timeout */
2286     tickstart = HAL_GetTick();
2287 
2288     /* Wait end of injected conversions */
2289     while ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != DFSDM_FLTISR_JEOCF)
2290     {
2291       /* Check the Timeout */
2292       if (Timeout != HAL_MAX_DELAY)
2293       {
2294         if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
2295         {
2296           /* Return timeout status */
2297           return HAL_TIMEOUT;
2298         }
2299       }
2300     }
2301     /* Check if overrun occurs */
2302     if ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) == DFSDM_FLTISR_JOVRF)
2303     {
2304       /* Update error code and call error callback */
2305       hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
2306 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
2307       hdfsdm_filter->ErrorCallback(hdfsdm_filter);
2308 #else
2309       HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
2310 #endif
2311 
2312       /* Clear injected overrun flag */
2313       hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
2314     }
2315 
2316     /* Update remaining injected conversions */
2317     hdfsdm_filter->InjConvRemaining--;
2318     if (hdfsdm_filter->InjConvRemaining == 0U)
2319     {
2320       /* Update DFSDM filter state only if trigger is software */
2321       if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
2322       {
2323         hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
2324                                HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
2325       }
2326 
2327       /* end of injected sequence, reset the value */
2328       hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
2329                                         hdfsdm_filter->InjectedChannelsNbr : 1U;
2330     }
2331 
2332     /* Return function status */
2333     return HAL_OK;
2334   }
2335 }
2336 
2337 /**
2338   * @brief  This function allows to stop injected conversion in polling mode.
2339   * @note   This function should be called only if injected conversion is ongoing.
2340   * @param  hdfsdm_filter DFSDM filter handle.
2341   * @retval HAL status
2342   */
HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2343 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2344 {
2345   HAL_StatusTypeDef status = HAL_OK;
2346 
2347   /* Check parameters */
2348   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2349 
2350   /* Check DFSDM filter state */
2351   if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
2352       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2353   {
2354     /* Return error status */
2355     status = HAL_ERROR;
2356   }
2357   else
2358   {
2359     /* Stop injected conversion */
2360     DFSDM_InjConvStop(hdfsdm_filter);
2361   }
2362   /* Return function status */
2363   return status;
2364 }
2365 
2366 /**
2367   * @brief  This function allows to start injected conversion in interrupt mode.
2368   * @note   This function should be called only when DFSDM filter instance is
2369   *         in idle state or if regular conversion is ongoing.
2370   * @param  hdfsdm_filter DFSDM filter handle.
2371   * @retval HAL status
2372   */
HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2373 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2374 {
2375   HAL_StatusTypeDef status = HAL_OK;
2376 
2377   /* Check parameters */
2378   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2379 
2380   /* Check DFSDM filter state */
2381   if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2382       (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
2383   {
2384     /* Enable interrupts for injected conversions */
2385     hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);
2386 
2387     /* Start injected conversion */
2388     DFSDM_InjConvStart(hdfsdm_filter);
2389   }
2390   else
2391   {
2392     status = HAL_ERROR;
2393   }
2394   /* Return function status */
2395   return status;
2396 }
2397 
2398 /**
2399   * @brief  This function allows to stop injected conversion in interrupt mode.
2400   * @note   This function should be called only if injected conversion is ongoing.
2401   * @param  hdfsdm_filter DFSDM filter handle.
2402   * @retval HAL status
2403   */
HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2404 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2405 {
2406   HAL_StatusTypeDef status = HAL_OK;
2407 
2408   /* Check parameters */
2409   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2410 
2411   /* Check DFSDM filter state */
2412   if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
2413       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2414   {
2415     /* Return error status */
2416     status = HAL_ERROR;
2417   }
2418   else
2419   {
2420     /* Disable interrupts for injected conversions */
2421     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);
2422 
2423     /* Stop injected conversion */
2424     DFSDM_InjConvStop(hdfsdm_filter);
2425   }
2426   /* Return function status */
2427   return status;
2428 }
2429 
2430 /**
2431   * @brief  This function allows to start injected conversion in DMA mode.
2432   * @note   This function should be called only when DFSDM filter instance is
2433   *         in idle state or if regular conversion is ongoing.
2434   *         Please note that data on buffer will contain signed injected conversion
2435   *         value on 24 most significant bits and corresponding channel on 3 least
2436   *         significant bits.
2437   * @param  hdfsdm_filter DFSDM filter handle.
2438   * @param  pData The destination buffer address.
2439   * @param  Length The length of data to be transferred from DFSDM filter to memory.
2440   * @retval HAL status
2441   */
HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,int32_t * pData,uint32_t Length)2442 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2443                                                     int32_t                    *pData,
2444                                                     uint32_t                    Length)
2445 {
2446   HAL_StatusTypeDef status = HAL_OK;
2447 
2448   /* Check parameters */
2449   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2450 
2451   /* Check destination address and length */
2452   if ((pData == NULL) || (Length == 0U))
2453   {
2454     status = HAL_ERROR;
2455   }
2456   /* Check that DMA is enabled for injected conversion */
2457   else if ((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
2458   {
2459     status = HAL_ERROR;
2460   }
2461   /* Check parameters compatibility */
2462   else if ((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2463            (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
2464            (Length > hdfsdm_filter->InjConvRemaining))
2465   {
2466     status = HAL_ERROR;
2467   }
2468   else if ((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2469            (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
2470   {
2471     status = HAL_ERROR;
2472   }
2473   /* Check DFSDM filter state */
2474   else if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2475            (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
2476   {
2477     /* Set callbacks on DMA handler */
2478     hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
2479     hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
2480     hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ? \
2481                                                    DFSDM_DMAInjectedHalfConvCplt : NULL;
2482 
2483     /* Start DMA in interrupt mode */
2484     if (HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)&hdfsdm_filter->Instance->FLTJDATAR, \
2485                          (uint32_t) pData, Length) != HAL_OK)
2486     {
2487       /* Set DFSDM filter in error state */
2488       hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2489       status = HAL_ERROR;
2490     }
2491     else
2492     {
2493       /* Start injected conversion */
2494       DFSDM_InjConvStart(hdfsdm_filter);
2495     }
2496   }
2497   else
2498   {
2499     status = HAL_ERROR;
2500   }
2501   /* Return function status */
2502   return status;
2503 }
2504 
2505 /**
2506   * @brief  This function allows to start injected conversion in DMA mode and to get
2507   *         only the 16 most significant bits of conversion.
2508   * @note   This function should be called only when DFSDM filter instance is
2509   *         in idle state or if regular conversion is ongoing.
2510   *         Please note that data on buffer will contain signed 16 most significant
2511   *         bits of injected conversion.
2512   * @param  hdfsdm_filter DFSDM filter handle.
2513   * @param  pData The destination buffer address.
2514   * @param  Length The length of data to be transferred from DFSDM filter to memory.
2515   * @retval HAL status
2516   */
HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,int16_t * pData,uint32_t Length)2517 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2518                                                        int16_t                    *pData,
2519                                                        uint32_t                    Length)
2520 {
2521   HAL_StatusTypeDef status = HAL_OK;
2522 
2523   /* Check parameters */
2524   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2525 
2526   /* Check destination address and length */
2527   if ((pData == NULL) || (Length == 0U))
2528   {
2529     status = HAL_ERROR;
2530   }
2531   /* Check that DMA is enabled for injected conversion */
2532   else if ((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
2533   {
2534     status = HAL_ERROR;
2535   }
2536   /* Check parameters compatibility */
2537   else if ((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2538            (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
2539            (Length > hdfsdm_filter->InjConvRemaining))
2540   {
2541     status = HAL_ERROR;
2542   }
2543   else if ((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2544            (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
2545   {
2546     status = HAL_ERROR;
2547   }
2548   /* Check DFSDM filter state */
2549   else if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2550            (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
2551   {
2552     /* Set callbacks on DMA handler */
2553     hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
2554     hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
2555     hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ? \
2556                                                    DFSDM_DMAInjectedHalfConvCplt : NULL;
2557 
2558     /* Start DMA in interrupt mode */
2559     if (HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)(&hdfsdm_filter->Instance->FLTJDATAR) + 2U, \
2560                          (uint32_t) pData, Length) != HAL_OK)
2561     {
2562       /* Set DFSDM filter in error state */
2563       hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2564       status = HAL_ERROR;
2565     }
2566     else
2567     {
2568       /* Start injected conversion */
2569       DFSDM_InjConvStart(hdfsdm_filter);
2570     }
2571   }
2572   else
2573   {
2574     status = HAL_ERROR;
2575   }
2576   /* Return function status */
2577   return status;
2578 }
2579 
2580 /**
2581   * @brief  This function allows to stop injected conversion in DMA mode.
2582   * @note   This function should be called only if injected conversion is ongoing.
2583   * @param  hdfsdm_filter DFSDM filter handle.
2584   * @retval HAL status
2585   */
HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2586 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2587 {
2588   HAL_StatusTypeDef status = HAL_OK;
2589 
2590   /* Check parameters */
2591   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2592 
2593   /* Check DFSDM filter state */
2594   if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
2595       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2596   {
2597     /* Return error status */
2598     status = HAL_ERROR;
2599   }
2600   else
2601   {
2602     /* Stop current DMA transfer */
2603     /* No need to check the returned value of HAL_DMA_Abort. */
2604     /* Only HAL_DMA_ERROR_NO_XFER can be returned in case of error and it's not an error for DFSDM. */
2605     (void) HAL_DMA_Abort(hdfsdm_filter->hdmaInj);
2606 
2607     /* Stop regular conversion */
2608     DFSDM_InjConvStop(hdfsdm_filter);
2609   }
2610   /* Return function status */
2611   return status;
2612 }
2613 
2614 /**
2615   * @brief  This function allows to get injected conversion value.
2616   * @param  hdfsdm_filter DFSDM filter handle.
2617   * @param  Channel Corresponding channel of injected conversion.
2618   * @retval Injected conversion value
2619   */
HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t * Channel)2620 int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2621                                          uint32_t                   *Channel)
2622 {
2623   uint32_t reg;
2624   int32_t  value;
2625 
2626   /* Check parameters */
2627   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2628   assert_param(Channel != (void *)0);
2629 
2630   /* Get value of data register for injected channel */
2631   reg = hdfsdm_filter->Instance->FLTJDATAR;
2632 
2633   /* Extract channel and injected conversion value */
2634   *Channel = (reg & DFSDM_FLTJDATAR_JDATACH);
2635   /* Injected conversion value is a signed value located on 24 MSB of register */
2636   /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */
2637   reg &= DFSDM_FLTJDATAR_JDATA;
2638   value = ((int32_t)reg) / 256;
2639 
2640   /* return regular conversion value */
2641   return value;
2642 }
2643 
2644 /**
2645   * @brief  This function allows to start filter analog watchdog in interrupt mode.
2646   * @param  hdfsdm_filter DFSDM filter handle.
2647   * @param  awdParam DFSDM filter analog watchdog parameters.
2648   * @retval HAL status
2649   */
HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,DFSDM_Filter_AwdParamTypeDef * awdParam)2650 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef   *hdfsdm_filter,
2651                                               DFSDM_Filter_AwdParamTypeDef *awdParam)
2652 {
2653   HAL_StatusTypeDef status = HAL_OK;
2654 
2655   /* Check parameters */
2656   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2657   assert_param(IS_DFSDM_FILTER_AWD_DATA_SOURCE(awdParam->DataSource));
2658   assert_param(IS_DFSDM_INJECTED_CHANNEL(awdParam->Channel));
2659   assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->HighThreshold));
2660   assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->LowThreshold));
2661   assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->HighBreakSignal));
2662   assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->LowBreakSignal));
2663 
2664   /* Check DFSDM filter state */
2665   if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
2666       (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
2667   {
2668     /* Return error status */
2669     status = HAL_ERROR;
2670   }
2671   else
2672   {
2673     /* Set analog watchdog data source */
2674     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
2675     hdfsdm_filter->Instance->FLTCR1 |= awdParam->DataSource;
2676 
2677     /* Set thresholds and break signals */
2678     hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
2679     hdfsdm_filter->Instance->FLTAWHTR |= (((uint32_t) awdParam->HighThreshold << DFSDM_FLTAWHTR_AWHT_Pos) | \
2680                                           awdParam->HighBreakSignal);
2681     hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
2682     hdfsdm_filter->Instance->FLTAWLTR |= (((uint32_t) awdParam->LowThreshold << DFSDM_FLTAWLTR_AWLT_Pos) | \
2683                                           awdParam->LowBreakSignal);
2684 
2685     /* Set channels and interrupt for analog watchdog */
2686     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH);
2687     hdfsdm_filter->Instance->FLTCR2 |= (((awdParam->Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_AWDCH_Pos) | \
2688                                         DFSDM_FLTCR2_AWDIE);
2689   }
2690   /* Return function status */
2691   return status;
2692 }
2693 
2694 /**
2695   * @brief  This function allows to stop filter analog watchdog in interrupt mode.
2696   * @param  hdfsdm_filter DFSDM filter handle.
2697   * @retval HAL status
2698   */
HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2699 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2700 {
2701   HAL_StatusTypeDef status = HAL_OK;
2702 
2703   /* Check parameters */
2704   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2705 
2706   /* Check DFSDM filter state */
2707   if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
2708       (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
2709   {
2710     /* Return error status */
2711     status = HAL_ERROR;
2712   }
2713   else
2714   {
2715     /* Reset channels for analog watchdog and deactivate interrupt */
2716     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH | DFSDM_FLTCR2_AWDIE);
2717 
2718     /* Clear all analog watchdog flags */
2719     hdfsdm_filter->Instance->FLTAWCFR = (DFSDM_FLTAWCFR_CLRAWHTF | DFSDM_FLTAWCFR_CLRAWLTF);
2720 
2721     /* Reset thresholds and break signals */
2722     hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
2723     hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
2724 
2725     /* Reset analog watchdog data source */
2726     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
2727   }
2728   /* Return function status */
2729   return status;
2730 }
2731 
2732 /**
2733   * @brief  This function allows to start extreme detector feature.
2734   * @param  hdfsdm_filter DFSDM filter handle.
2735   * @param  Channel Channels where extreme detector is enabled.
2736   *         This parameter can be a values combination of @ref DFSDM_Channel_Selection.
2737   * @retval HAL status
2738   */
HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Channel)2739 HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2740                                            uint32_t                    Channel)
2741 {
2742   HAL_StatusTypeDef status = HAL_OK;
2743 
2744   /* Check parameters */
2745   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2746   assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
2747 
2748   /* Check DFSDM filter state */
2749   if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
2750       (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
2751   {
2752     /* Return error status */
2753     status = HAL_ERROR;
2754   }
2755   else
2756   {
2757     /* Set channels for extreme detector */
2758     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
2759     hdfsdm_filter->Instance->FLTCR2 |= ((Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_EXCH_Pos);
2760   }
2761   /* Return function status */
2762   return status;
2763 }
2764 
2765 /**
2766   * @brief  This function allows to stop extreme detector feature.
2767   * @param  hdfsdm_filter DFSDM filter handle.
2768   * @retval HAL status
2769   */
HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2770 HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2771 {
2772   HAL_StatusTypeDef status = HAL_OK;
2773   __IO uint32_t     reg1;
2774   __IO uint32_t     reg2;
2775 
2776   /* Check parameters */
2777   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2778 
2779   /* Check DFSDM filter state */
2780   if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
2781       (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
2782   {
2783     /* Return error status */
2784     status = HAL_ERROR;
2785   }
2786   else
2787   {
2788     /* Reset channels for extreme detector */
2789     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
2790 
2791     /* Clear extreme detector values */
2792     reg1 = hdfsdm_filter->Instance->FLTEXMAX;
2793     reg2 = hdfsdm_filter->Instance->FLTEXMIN;
2794     UNUSED(reg1); /* To avoid GCC warning */
2795     UNUSED(reg2); /* To avoid GCC warning */
2796   }
2797   /* Return function status */
2798   return status;
2799 }
2800 
2801 /**
2802   * @brief  This function allows to get extreme detector maximum value.
2803   * @param  hdfsdm_filter DFSDM filter handle.
2804   * @param  Channel Corresponding channel.
2805   * @retval Extreme detector maximum value
2806   *         This value is between Min_Data = -8388608 and Max_Data = 8388607.
2807   */
HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t * Channel)2808 int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2809                                        uint32_t                   *Channel)
2810 {
2811   uint32_t reg;
2812   int32_t  value;
2813 
2814   /* Check parameters */
2815   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2816   assert_param(Channel != (void *)0);
2817 
2818   /* Get value of extreme detector maximum register */
2819   reg = hdfsdm_filter->Instance->FLTEXMAX;
2820 
2821   /* Extract channel and extreme detector maximum value */
2822   *Channel = (reg & DFSDM_FLTEXMAX_EXMAXCH);
2823   /* Extreme detector maximum value is a signed value located on 24 MSB of register */
2824   /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */
2825   reg &= DFSDM_FLTEXMAX_EXMAX;
2826   value = ((int32_t)reg) / 256;
2827 
2828   /* return extreme detector maximum value */
2829   return value;
2830 }
2831 
2832 /**
2833   * @brief  This function allows to get extreme detector minimum value.
2834   * @param  hdfsdm_filter DFSDM filter handle.
2835   * @param  Channel Corresponding channel.
2836   * @retval Extreme detector minimum value
2837   *         This value is between Min_Data = -8388608 and Max_Data = 8388607.
2838   */
HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t * Channel)2839 int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2840                                        uint32_t                   *Channel)
2841 {
2842   uint32_t reg;
2843   int32_t  value;
2844 
2845   /* Check parameters */
2846   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2847   assert_param(Channel != (void *)0);
2848 
2849   /* Get value of extreme detector minimum register */
2850   reg = hdfsdm_filter->Instance->FLTEXMIN;
2851 
2852   /* Extract channel and extreme detector minimum value */
2853   *Channel = (reg & DFSDM_FLTEXMIN_EXMINCH);
2854   /* Extreme detector minimum value is a signed value located on 24 MSB of register */
2855   /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */
2856   reg &= DFSDM_FLTEXMIN_EXMIN;
2857   value = ((int32_t)reg) / 256;
2858 
2859   /* return extreme detector minimum value */
2860   return value;
2861 }
2862 
2863 /**
2864   * @brief  This function allows to get conversion time value.
2865   * @param  hdfsdm_filter DFSDM filter handle.
2866   * @retval Conversion time value
2867   * @note   To get time in second, this value has to be divided by DFSDM clock frequency.
2868   */
HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2869 uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2870 {
2871   uint32_t reg;
2872   uint32_t value;
2873 
2874   /* Check parameters */
2875   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2876 
2877   /* Get value of conversion timer register */
2878   reg = hdfsdm_filter->Instance->FLTCNVTIMR;
2879 
2880   /* Extract conversion time value */
2881   value = ((reg & DFSDM_FLTCNVTIMR_CNVCNT) >> DFSDM_FLTCNVTIMR_CNVCNT_Pos);
2882 
2883   /* return extreme detector minimum value */
2884   return value;
2885 }
2886 
2887 /**
2888   * @brief  This function handles the DFSDM interrupts.
2889   * @param  hdfsdm_filter DFSDM filter handle.
2890   * @retval None
2891   */
HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2892 void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2893 {
2894   /* Get FTLISR and FLTCR2 register values */
2895   const uint32_t temp_fltisr = hdfsdm_filter->Instance->FLTISR;
2896   const uint32_t temp_fltcr2 = hdfsdm_filter->Instance->FLTCR2;
2897 
2898   /* Check if overrun occurs during regular conversion */
2899   if (((temp_fltisr & DFSDM_FLTISR_ROVRF) != 0U) && \
2900       ((temp_fltcr2 & DFSDM_FLTCR2_ROVRIE) != 0U))
2901   {
2902     /* Clear regular overrun flag */
2903     hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
2904 
2905     /* Update error code */
2906     hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
2907 
2908     /* Call error callback */
2909 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
2910     hdfsdm_filter->ErrorCallback(hdfsdm_filter);
2911 #else
2912     HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
2913 #endif
2914   }
2915   /* Check if overrun occurs during injected conversion */
2916   else if (((temp_fltisr & DFSDM_FLTISR_JOVRF) != 0U) && \
2917            ((temp_fltcr2 & DFSDM_FLTCR2_JOVRIE) != 0U))
2918   {
2919     /* Clear injected overrun flag */
2920     hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
2921 
2922     /* Update error code */
2923     hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
2924 
2925     /* Call error callback */
2926 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
2927     hdfsdm_filter->ErrorCallback(hdfsdm_filter);
2928 #else
2929     HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
2930 #endif
2931   }
2932   /* Check if end of regular conversion */
2933   else if (((temp_fltisr & DFSDM_FLTISR_REOCF) != 0U) && \
2934            ((temp_fltcr2 & DFSDM_FLTCR2_REOCIE) != 0U))
2935   {
2936     /* Call regular conversion complete callback */
2937 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
2938     hdfsdm_filter->RegConvCpltCallback(hdfsdm_filter);
2939 #else
2940     HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
2941 #endif
2942 
2943     /* End of conversion if mode is not continuous and software trigger */
2944     if ((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2945         (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
2946     {
2947       /* Disable interrupts for regular conversions */
2948       hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE);
2949 
2950       /* Update DFSDM filter state */
2951       hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
2952                              HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
2953     }
2954   }
2955   /* Check if end of injected conversion */
2956   else if (((temp_fltisr & DFSDM_FLTISR_JEOCF) != 0U) && \
2957            ((temp_fltcr2 & DFSDM_FLTCR2_JEOCIE) != 0U))
2958   {
2959     /* Call injected conversion complete callback */
2960 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
2961     hdfsdm_filter->InjConvCpltCallback(hdfsdm_filter);
2962 #else
2963     HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
2964 #endif
2965 
2966     /* Update remaining injected conversions */
2967     hdfsdm_filter->InjConvRemaining--;
2968     if (hdfsdm_filter->InjConvRemaining == 0U)
2969     {
2970       /* End of conversion if trigger is software */
2971       if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
2972       {
2973         /* Disable interrupts for injected conversions */
2974         hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE);
2975 
2976         /* Update DFSDM filter state */
2977         hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
2978                                HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
2979       }
2980       /* end of injected sequence, reset the value */
2981       hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
2982                                         hdfsdm_filter->InjectedChannelsNbr : 1U;
2983     }
2984   }
2985   /* Check if analog watchdog occurs */
2986   else if (((temp_fltisr & DFSDM_FLTISR_AWDF) != 0U) && \
2987            ((temp_fltcr2 & DFSDM_FLTCR2_AWDIE) != 0U))
2988   {
2989     uint32_t reg;
2990     uint32_t threshold;
2991     uint32_t channel = 0;
2992 
2993     /* Get channel and threshold */
2994     reg = hdfsdm_filter->Instance->FLTAWSR;
2995     threshold = ((reg & DFSDM_FLTAWSR_AWLTF) != 0U) ? DFSDM_AWD_LOW_THRESHOLD : DFSDM_AWD_HIGH_THRESHOLD;
2996     if (threshold == DFSDM_AWD_HIGH_THRESHOLD)
2997     {
2998       reg = reg >> DFSDM_FLTAWSR_AWHTF_Pos;
2999     }
3000     while (((reg & 1U) == 0U) && (channel < (DFSDM1_CHANNEL_NUMBER - 1U)))
3001     {
3002       channel++;
3003       reg = reg >> 1;
3004     }
3005     /* Clear analog watchdog flag */
3006     hdfsdm_filter->Instance->FLTAWCFR = (threshold == DFSDM_AWD_HIGH_THRESHOLD) ? \
3007                                         (1UL << (DFSDM_FLTAWSR_AWHTF_Pos + channel)) : \
3008                                         (1UL << channel);
3009 
3010     /* Call analog watchdog callback */
3011 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3012     hdfsdm_filter->AwdCallback(hdfsdm_filter, channel, threshold);
3013 #else
3014     HAL_DFSDM_FilterAwdCallback(hdfsdm_filter, channel, threshold);
3015 #endif
3016   }
3017   /* Check if clock absence occurs */
3018   else if ((hdfsdm_filter->Instance == DFSDM1_Filter0) && \
3019            ((temp_fltisr & DFSDM_FLTISR_CKABF) != 0U) && \
3020            ((temp_fltcr2 & DFSDM_FLTCR2_CKABIE) != 0U))
3021   {
3022     uint32_t reg;
3023     uint32_t channel = 0;
3024 
3025     reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) >> DFSDM_FLTISR_CKABF_Pos);
3026 
3027     while (channel < DFSDM1_CHANNEL_NUMBER)
3028     {
3029       /* Check if flag is set and corresponding channel is enabled */
3030       if (((reg & 1U) != 0U) && (a_dfsdm1ChannelHandle[channel] != NULL))
3031       {
3032         /* Check clock absence has been enabled for this channel */
3033         if ((a_dfsdm1ChannelHandle[channel]->Instance->CHCFGR1 & DFSDM_CHCFGR1_CKABEN) != 0U)
3034         {
3035           /* Clear clock absence flag */
3036           hdfsdm_filter->Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
3037 
3038           /* Call clock absence callback */
3039 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3040           a_dfsdm1ChannelHandle[channel]->CkabCallback(a_dfsdm1ChannelHandle[channel]);
3041 #else
3042           HAL_DFSDM_ChannelCkabCallback(a_dfsdm1ChannelHandle[channel]);
3043 #endif
3044         }
3045       }
3046       channel++;
3047       reg = reg >> 1;
3048     }
3049   }
3050   /* Check if short circuit detection occurs */
3051   else if ((hdfsdm_filter->Instance == DFSDM1_Filter0) && \
3052            ((temp_fltisr & DFSDM_FLTISR_SCDF) != 0U) && \
3053            ((temp_fltcr2 & DFSDM_FLTCR2_SCDIE) != 0U))
3054   {
3055     uint32_t reg;
3056     uint32_t channel = 0;
3057 
3058     /* Get channel */
3059     reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) >> DFSDM_FLTISR_SCDF_Pos);
3060     while (((reg & 1U) == 0U) && (channel < (DFSDM1_CHANNEL_NUMBER - 1U)))
3061     {
3062       channel++;
3063       reg = reg >> 1;
3064     }
3065 
3066     /* Clear short circuit detection flag */
3067     hdfsdm_filter->Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel));
3068 
3069     /* Call short circuit detection callback */
3070 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3071     a_dfsdm1ChannelHandle[channel]->ScdCallback(a_dfsdm1ChannelHandle[channel]);
3072 #else
3073     HAL_DFSDM_ChannelScdCallback(a_dfsdm1ChannelHandle[channel]);
3074 #endif
3075   }
3076 }
3077 
3078 /**
3079   * @brief  Regular conversion complete callback.
3080   * @note   In interrupt mode, user has to read conversion value in this function
3081   *         using HAL_DFSDM_FilterGetRegularValue.
3082   * @param  hdfsdm_filter DFSDM filter handle.
3083   * @retval None
3084   */
HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3085 __weak void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3086 {
3087   /* Prevent unused argument(s) compilation warning */
3088   UNUSED(hdfsdm_filter);
3089 
3090   /* NOTE : This function should not be modified, when the callback is needed,
3091             the HAL_DFSDM_FilterRegConvCpltCallback could be implemented in the user file.
3092    */
3093 }
3094 
3095 /**
3096   * @brief  Half regular conversion complete callback.
3097   * @param  hdfsdm_filter DFSDM filter handle.
3098   * @retval None
3099   */
HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3100 __weak void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3101 {
3102   /* Prevent unused argument(s) compilation warning */
3103   UNUSED(hdfsdm_filter);
3104 
3105   /* NOTE : This function should not be modified, when the callback is needed,
3106             the HAL_DFSDM_FilterRegConvHalfCpltCallback could be implemented in the user file.
3107    */
3108 }
3109 
3110 /**
3111   * @brief  Injected conversion complete callback.
3112   * @note   In interrupt mode, user has to read conversion value in this function
3113   *         using HAL_DFSDM_FilterGetInjectedValue.
3114   * @param  hdfsdm_filter DFSDM filter handle.
3115   * @retval None
3116   */
HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3117 __weak void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3118 {
3119   /* Prevent unused argument(s) compilation warning */
3120   UNUSED(hdfsdm_filter);
3121 
3122   /* NOTE : This function should not be modified, when the callback is needed,
3123             the HAL_DFSDM_FilterInjConvCpltCallback could be implemented in the user file.
3124    */
3125 }
3126 
3127 /**
3128   * @brief  Half injected conversion complete callback.
3129   * @param  hdfsdm_filter DFSDM filter handle.
3130   * @retval None
3131   */
HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3132 __weak void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3133 {
3134   /* Prevent unused argument(s) compilation warning */
3135   UNUSED(hdfsdm_filter);
3136 
3137   /* NOTE : This function should not be modified, when the callback is needed,
3138             the HAL_DFSDM_FilterInjConvHalfCpltCallback could be implemented in the user file.
3139    */
3140 }
3141 
3142 /**
3143   * @brief  Filter analog watchdog callback.
3144   * @param  hdfsdm_filter DFSDM filter handle.
3145   * @param  Channel Corresponding channel.
3146   * @param  Threshold Low or high threshold has been reached.
3147   * @retval None
3148   */
HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Channel,uint32_t Threshold)3149 __weak void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
3150                                         uint32_t Channel, uint32_t Threshold)
3151 {
3152   /* Prevent unused argument(s) compilation warning */
3153   UNUSED(hdfsdm_filter);
3154   UNUSED(Channel);
3155   UNUSED(Threshold);
3156 
3157   /* NOTE : This function should not be modified, when the callback is needed,
3158             the HAL_DFSDM_FilterAwdCallback could be implemented in the user file.
3159    */
3160 }
3161 
3162 /**
3163   * @brief  Error callback.
3164   * @param  hdfsdm_filter DFSDM filter handle.
3165   * @retval None
3166   */
HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3167 __weak void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3168 {
3169   /* Prevent unused argument(s) compilation warning */
3170   UNUSED(hdfsdm_filter);
3171 
3172   /* NOTE : This function should not be modified, when the callback is needed,
3173             the HAL_DFSDM_FilterErrorCallback could be implemented in the user file.
3174    */
3175 }
3176 
3177 /**
3178   * @}
3179   */
3180 
3181 /** @defgroup DFSDM_Exported_Functions_Group4_Filter Filter state functions
3182  *  @brief    Filter state functions
3183  *
3184 @verbatim
3185   ==============================================================================
3186                      ##### Filter state functions #####
3187   ==============================================================================
3188     [..]  This section provides functions allowing to:
3189       (+) Get the DFSDM filter state.
3190       (+) Get the DFSDM filter error.
3191 @endverbatim
3192   * @{
3193   */
3194 
3195 /**
3196   * @brief  This function allows to get the current DFSDM filter handle state.
3197   * @param  hdfsdm_filter DFSDM filter handle.
3198   * @retval DFSDM filter state.
3199   */
HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3200 HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3201 {
3202   /* Return DFSDM filter handle state */
3203   return hdfsdm_filter->State;
3204 }
3205 
3206 /**
3207   * @brief  This function allows to get the current DFSDM filter error.
3208   * @param  hdfsdm_filter DFSDM filter handle.
3209   * @retval DFSDM filter error code.
3210   */
HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3211 uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3212 {
3213   return hdfsdm_filter->ErrorCode;
3214 }
3215 
3216 /**
3217   * @}
3218   */
3219 
3220 /**
3221   * @}
3222   */
3223 /* End of exported functions -------------------------------------------------*/
3224 
3225 /* Private functions ---------------------------------------------------------*/
3226 /** @addtogroup DFSDM_Private_Functions DFSDM Private Functions
3227   * @{
3228   */
3229 
3230 /**
3231   * @brief  DMA half transfer complete callback for regular conversion.
3232   * @param  hdma DMA handle.
3233   * @retval None
3234   */
DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef * hdma)3235 static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma)
3236 {
3237   /* Get DFSDM filter handle */
3238   DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
3239 
3240   /* Call regular half conversion complete callback */
3241 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3242   hdfsdm_filter->RegConvHalfCpltCallback(hdfsdm_filter);
3243 #else
3244   HAL_DFSDM_FilterRegConvHalfCpltCallback(hdfsdm_filter);
3245 #endif
3246 }
3247 
3248 /**
3249   * @brief  DMA transfer complete callback for regular conversion.
3250   * @param  hdma DMA handle.
3251   * @retval None
3252   */
DFSDM_DMARegularConvCplt(DMA_HandleTypeDef * hdma)3253 static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma)
3254 {
3255   /* Get DFSDM filter handle */
3256   DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
3257 
3258   /* Call regular conversion complete callback */
3259 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3260   hdfsdm_filter->RegConvCpltCallback(hdfsdm_filter);
3261 #else
3262   HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
3263 #endif
3264 }
3265 
3266 /**
3267   * @brief  DMA half transfer complete callback for injected conversion.
3268   * @param  hdma DMA handle.
3269   * @retval None
3270   */
DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef * hdma)3271 static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma)
3272 {
3273   /* Get DFSDM filter handle */
3274   DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
3275 
3276   /* Call injected half conversion complete callback */
3277 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3278   hdfsdm_filter->InjConvHalfCpltCallback(hdfsdm_filter);
3279 #else
3280   HAL_DFSDM_FilterInjConvHalfCpltCallback(hdfsdm_filter);
3281 #endif
3282 }
3283 
3284 /**
3285   * @brief  DMA transfer complete callback for injected conversion.
3286   * @param  hdma DMA handle.
3287   * @retval None
3288   */
DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef * hdma)3289 static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma)
3290 {
3291   /* Get DFSDM filter handle */
3292   DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
3293 
3294   /* Call injected conversion complete callback */
3295 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3296   hdfsdm_filter->InjConvCpltCallback(hdfsdm_filter);
3297 #else
3298   HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
3299 #endif
3300 }
3301 
3302 /**
3303   * @brief  DMA error callback.
3304   * @param  hdma DMA handle.
3305   * @retval None
3306   */
DFSDM_DMAError(DMA_HandleTypeDef * hdma)3307 static void DFSDM_DMAError(DMA_HandleTypeDef *hdma)
3308 {
3309   /* Get DFSDM filter handle */
3310   DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
3311 
3312   /* Update error code */
3313   hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_DMA;
3314 
3315   /* Call error callback */
3316 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3317   hdfsdm_filter->ErrorCallback(hdfsdm_filter);
3318 #else
3319   HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
3320 #endif
3321 }
3322 
3323 /**
3324   * @brief  This function allows to get the number of injected channels.
3325   * @param  Channels bitfield of injected channels.
3326   * @retval Number of injected channels.
3327   */
DFSDM_GetInjChannelsNbr(uint32_t Channels)3328 static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels)
3329 {
3330   uint32_t nbChannels = 0;
3331   uint32_t tmp;
3332 
3333   /* Get the number of channels from bitfield */
3334   tmp = (uint32_t)(Channels & DFSDM_LSB_MASK);
3335   while (tmp != 0U)
3336   {
3337     if ((tmp & 1U) != 0U)
3338     {
3339       nbChannels++;
3340     }
3341     tmp = (uint32_t)(tmp >> 1);
3342   }
3343   return nbChannels;
3344 }
3345 
3346 /**
3347   * @brief  This function allows to get the channel number from channel instance.
3348   * @param  Instance DFSDM channel instance.
3349   * @retval Channel number.
3350   */
DFSDM_GetChannelFromInstance(const DFSDM_Channel_TypeDef * Instance)3351 static uint32_t DFSDM_GetChannelFromInstance(const DFSDM_Channel_TypeDef *Instance)
3352 {
3353   uint32_t channel;
3354 
3355   /* Get channel from instance */
3356   if (Instance == DFSDM1_Channel0)
3357   {
3358     channel = 0;
3359   }
3360   else if (Instance == DFSDM1_Channel1)
3361   {
3362     channel = 1;
3363   }
3364   else if (Instance == DFSDM1_Channel2)
3365   {
3366     channel = 2;
3367   }
3368 #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \
3369     defined(STM32L496xx) || defined(STM32L4A6xx) || \
3370     defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
3371   else if (Instance == DFSDM1_Channel4)
3372   {
3373     channel = 4;
3374   }
3375   else if (Instance == DFSDM1_Channel5)
3376   {
3377     channel = 5;
3378   }
3379   else if (Instance == DFSDM1_Channel6)
3380   {
3381     channel = 6;
3382   }
3383   else if (Instance == DFSDM1_Channel7)
3384   {
3385     channel = 7;
3386   }
3387 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || STM32L496xx || STM32L4A6xx || STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
3388   else /* DFSDM1_Channel3 */
3389   {
3390     channel = 3;
3391   }
3392 
3393   return channel;
3394 }
3395 
3396 /**
3397   * @brief  This function allows to really start regular conversion.
3398   * @param  hdfsdm_filter DFSDM filter handle.
3399   * @retval None
3400   */
DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3401 static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3402 {
3403   /* Check regular trigger */
3404   if (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER)
3405   {
3406     /* Software start of regular conversion */
3407     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
3408   }
3409   else /* synchronous trigger */
3410   {
3411     /* Disable DFSDM filter */
3412     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
3413 
3414     /* Set RSYNC bit in DFSDM_FLTCR1 register */
3415     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSYNC;
3416 
3417     /* Enable DFSDM  filter */
3418     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
3419 
3420     /* If injected conversion was in progress, restart it */
3421     if (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ)
3422     {
3423       if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
3424       {
3425         hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
3426       }
3427       /* Update remaining injected conversions */
3428       hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
3429                                         hdfsdm_filter->InjectedChannelsNbr : 1U;
3430     }
3431   }
3432   /* Update DFSDM filter state */
3433   hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
3434                          HAL_DFSDM_FILTER_STATE_REG : HAL_DFSDM_FILTER_STATE_REG_INJ;
3435 }
3436 
3437 /**
3438   * @brief  This function allows to really stop regular conversion.
3439   * @param  hdfsdm_filter DFSDM filter handle.
3440   * @retval None
3441   */
DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3442 static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3443 {
3444   /* Disable DFSDM filter */
3445   hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
3446 
3447   /* If regular trigger was synchronous, reset RSYNC bit in DFSDM_FLTCR1 register */
3448   if (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SYNC_TRIGGER)
3449   {
3450     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
3451   }
3452 
3453   /* Enable DFSDM filter */
3454   hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
3455 
3456   /* If injected conversion was in progress, restart it */
3457   if (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ)
3458   {
3459     if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
3460     {
3461       hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
3462     }
3463     /* Update remaining injected conversions */
3464     hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
3465                                       hdfsdm_filter->InjectedChannelsNbr : 1U;
3466   }
3467 
3468   /* Update DFSDM filter state */
3469   hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
3470                          HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
3471 }
3472 
3473 /**
3474   * @brief  This function allows to really start injected conversion.
3475   * @param  hdfsdm_filter DFSDM filter handle.
3476   * @retval None
3477   */
DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3478 static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3479 {
3480   /* Check injected trigger */
3481   if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
3482   {
3483     /* Software start of injected conversion */
3484     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
3485   }
3486   else /* external or synchronous trigger */
3487   {
3488     /* Disable DFSDM filter */
3489     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
3490 
3491     if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
3492     {
3493       /* Set JSYNC bit in DFSDM_FLTCR1 register */
3494       hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSYNC;
3495     }
3496     else /* external trigger */
3497     {
3498       /* Set JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
3499       hdfsdm_filter->Instance->FLTCR1 |= hdfsdm_filter->ExtTriggerEdge;
3500     }
3501 
3502     /* Enable DFSDM filter */
3503     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
3504 
3505     /* If regular conversion was in progress, restart it */
3506     if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) && \
3507         (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
3508     {
3509       hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
3510     }
3511   }
3512   /* Update DFSDM filter state */
3513   hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
3514                          HAL_DFSDM_FILTER_STATE_INJ : HAL_DFSDM_FILTER_STATE_REG_INJ;
3515 }
3516 
3517 /**
3518   * @brief  This function allows to really stop injected conversion.
3519   * @param  hdfsdm_filter DFSDM filter handle.
3520   * @retval None
3521   */
DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3522 static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3523 {
3524   /* Disable DFSDM filter */
3525   hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
3526 
3527   /* If injected trigger was synchronous, reset JSYNC bit in DFSDM_FLTCR1 register */
3528   if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
3529   {
3530     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC);
3531   }
3532   else if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_EXT_TRIGGER)
3533   {
3534     /* Reset JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
3535     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JEXTEN);
3536   }
3537   else
3538   {
3539     /* Nothing to do */
3540   }
3541 
3542   /* Enable DFSDM filter */
3543   hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
3544 
3545   /* If regular conversion was in progress, restart it */
3546   if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ) && \
3547       (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
3548   {
3549     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
3550   }
3551 
3552   /* Update remaining injected conversions */
3553   hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
3554                                     hdfsdm_filter->InjectedChannelsNbr : 1U;
3555 
3556   /* Update DFSDM filter state */
3557   hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
3558                          HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
3559 }
3560 
3561 /**
3562   * @}
3563   */
3564 /* End of private functions --------------------------------------------------*/
3565 
3566 /**
3567   * @}
3568   */
3569 
3570 #endif /* STM32L451xx || STM32L452xx || STM32L462xx || STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || STM32L496xx || STM32L4A6xx || STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx || STM32L4P5xx || STM32L4Q5xx */
3571 
3572 #endif /* HAL_DFSDM_MODULE_ENABLED */
3573 
3574 /**
3575   * @}
3576   */
3577 
3578 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
3579