1 /**
2 ******************************************************************************
3 * @file stm32l4xx_hal_lptim.c
4 * @author MCD Application Team
5 * @brief LPTIM HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Low Power Timer (LPTIM) peripheral:
8 * + Initialization and de-initialization functions.
9 * + Start/Stop operation functions in polling mode.
10 * + Start/Stop operation functions in interrupt mode.
11 * + Reading operation functions.
12 * + Peripheral State functions.
13 *
14 @verbatim
15 ==============================================================================
16 ##### How to use this driver #####
17 ==============================================================================
18 [..]
19 The LPTIM HAL driver can be used as follows:
20
21 (#)Initialize the LPTIM low level resources by implementing the
22 HAL_LPTIM_MspInit():
23 (++) Enable the LPTIM interface clock using __HAL_RCC_LPTIMx_CLK_ENABLE().
24 (++) In case of using interrupts (e.g. HAL_LPTIM_PWM_Start_IT()):
25 (+++) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority().
26 (+++) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ().
27 (+++) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler().
28
29 (#)Initialize the LPTIM HAL using HAL_LPTIM_Init(). This function
30 configures mainly:
31 (++) The instance: LPTIM1 or LPTIM2.
32 (++) Clock: the counter clock.
33 (+++) Source : it can be either the ULPTIM input (IN1) or one of
34 the internal clock; (APB, LSE, LSI or MSI).
35 (+++) Prescaler: select the clock divider.
36 (++) UltraLowPowerClock : To be used only if the ULPTIM is selected
37 as counter clock source.
38 (+++) Polarity: polarity of the active edge for the counter unit
39 if the ULPTIM input is selected.
40 (+++) SampleTime: clock sampling time to configure the clock glitch
41 filter.
42 (++) Trigger: How the counter start.
43 (+++) Source: trigger can be software or one of the hardware triggers.
44 (+++) ActiveEdge : only for hardware trigger.
45 (+++) SampleTime : trigger sampling time to configure the trigger
46 glitch filter.
47 (++) OutputPolarity : 2 opposite polarities are possible.
48 (++) UpdateMode: specifies whether the update of the autoreload and
49 the compare values is done immediately or after the end of current
50 period.
51 (++) Input1Source: Source selected for input1 (GPIO or comparator output).
52 (++) Input2Source: Source selected for input2 (GPIO or comparator output).
53 Input2 is used only for encoder feature so is used only for LPTIM1 instance.
54
55 (#)Six modes are available:
56
57 (++) PWM Mode: To generate a PWM signal with specified period and pulse,
58 call HAL_LPTIM_PWM_Start() or HAL_LPTIM_PWM_Start_IT() for interruption
59 mode.
60
61 (++) One Pulse Mode: To generate pulse with specified width in response
62 to a stimulus, call HAL_LPTIM_OnePulse_Start() or
63 HAL_LPTIM_OnePulse_Start_IT() for interruption mode.
64
65 (++) Set once Mode: In this mode, the output changes the level (from
66 low level to high level if the output polarity is configured high, else
67 the opposite) when a compare match occurs. To start this mode, call
68 HAL_LPTIM_SetOnce_Start() or HAL_LPTIM_SetOnce_Start_IT() for
69 interruption mode.
70
71 (++) Encoder Mode: To use the encoder interface call
72 HAL_LPTIM_Encoder_Start() or HAL_LPTIM_Encoder_Start_IT() for
73 interruption mode. Only available for LPTIM1 instance.
74
75 (++) Time out Mode: an active edge on one selected trigger input rests
76 the counter. The first trigger event will start the timer, any
77 successive trigger event will reset the counter and the timer will
78 restart. To start this mode call HAL_LPTIM_TimeOut_Start_IT() or
79 HAL_LPTIM_TimeOut_Start_IT() for interruption mode.
80
81 (++) Counter Mode: counter can be used to count external events on
82 the LPTIM Input1 or it can be used to count internal clock cycles.
83 To start this mode, call HAL_LPTIM_Counter_Start() or
84 HAL_LPTIM_Counter_Start_IT() for interruption mode.
85
86
87 (#) User can stop any process by calling the corresponding API:
88 HAL_LPTIM_Xxx_Stop() or HAL_LPTIM_Xxx_Stop_IT() if the process is
89 already started in interruption mode.
90
91 (#) De-initialize the LPTIM peripheral using HAL_LPTIM_DeInit().
92
93 *** Callback registration ***
94 =============================================
95 [..]
96 The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS when set to 1
97 allows the user to configure dynamically the driver callbacks.
98 [..]
99 Use Function @ref HAL_LPTIM_RegisterCallback() to register a callback.
100 @ref HAL_LPTIM_RegisterCallback() takes as parameters the HAL peripheral handle,
101 the Callback ID and a pointer to the user callback function.
102 [..]
103 Use function @ref HAL_LPTIM_UnRegisterCallback() to reset a callback to the
104 default weak function.
105 @ref HAL_LPTIM_UnRegisterCallback takes as parameters the HAL peripheral handle,
106 and the Callback ID.
107 [..]
108 These functions allow to register/unregister following callbacks:
109
110 (+) MspInitCallback : LPTIM Base Msp Init Callback.
111 (+) MspDeInitCallback : LPTIM Base Msp DeInit Callback.
112 (+) CompareMatchCallback : Compare match Callback.
113 (+) AutoReloadMatchCallback : Auto-reload match Callback.
114 (+) TriggerCallback : External trigger event detection Callback.
115 (+) CompareWriteCallback : Compare register write complete Callback.
116 (+) AutoReloadWriteCallback : Auto-reload register write complete Callback.
117 (+) DirectionUpCallback : Up-counting direction change Callback.
118 (+) DirectionDownCallback : Down-counting direction change Callback.
119
120 [..]
121 By default, after the Init and when the state is HAL_LPTIM_STATE_RESET
122 all interrupt callbacks are set to the corresponding weak functions:
123 examples @ref HAL_LPTIM_TriggerCallback(), @ref HAL_LPTIM_CompareMatchCallback().
124
125 [..]
126 Exception done for MspInit and MspDeInit functions that are reset to the legacy weak
127 functionalities in the Init/DeInit only when these callbacks are null
128 (not registered beforehand). If not, MspInit or MspDeInit are not null, the Init/DeInit
129 keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
130
131 [..]
132 Callbacks can be registered/unregistered in HAL_LPTIM_STATE_READY state only.
133 Exception done MspInit/MspDeInit that can be registered/unregistered
134 in HAL_LPTIM_STATE_READY or HAL_LPTIM_STATE_RESET state,
135 thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
136 In that case first register the MspInit/MspDeInit user callbacks
137 using @ref HAL_LPTIM_RegisterCallback() before calling DeInit or Init function.
138
139 [..]
140 When The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS is set to 0 or
141 not defined, the callback registration feature is not available and all callbacks
142 are set to the corresponding weak functions.
143
144 @endverbatim
145 ******************************************************************************
146 * @attention
147 *
148 * <h2><center>© Copyright (c) 2017 STMicroelectronics.
149 * All rights reserved.</center></h2>
150 *
151 * This software component is licensed by ST under BSD 3-Clause license,
152 * the "License"; You may not use this file except in compliance with the
153 * License. You may obtain a copy of the License at:
154 * opensource.org/licenses/BSD-3-Clause
155 *
156 ******************************************************************************
157 */
158
159 /* Includes ------------------------------------------------------------------*/
160 #include "stm32l4xx_hal.h"
161
162 /** @addtogroup STM32L4xx_HAL_Driver
163 * @{
164 */
165
166 /** @defgroup LPTIM LPTIM
167 * @brief LPTIM HAL module driver.
168 * @{
169 */
170
171 #ifdef HAL_LPTIM_MODULE_ENABLED
172
173 #if defined (LPTIM1) || defined (LPTIM2)
174
175 /* Private typedef -----------------------------------------------------------*/
176 /* Private define ------------------------------------------------------------*/
177 /** @addtogroup LPTIM_Private_Constants
178 * @{
179 */
180 #define TIMEOUT 1000UL /* Timeout is 1s */
181 /**
182 * @}
183 */
184
185 /* Private macro -------------------------------------------------------------*/
186 /** @addtogroup LPTIM_Private_Macros
187 * @{
188 */
189 #if defined(LPTIM2)
190 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(__INSTANCE__) \
191 (((__INSTANCE__) == LPTIM1) ? __HAL_LPTIM_LPTIM1_EXTI_ENABLE_IT() : __HAL_LPTIM_LPTIM2_EXTI_ENABLE_IT())
192
193 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(__INSTANCE__) \
194 (((__INSTANCE__) == LPTIM1) ? __HAL_LPTIM_LPTIM1_EXTI_DISABLE_IT() : __HAL_LPTIM_LPTIM2_EXTI_DISABLE_IT())
195 #else
196 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(__INSTANCE__) __HAL_LPTIM_LPTIM1_EXTI_ENABLE_IT()
197
198 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(__INSTANCE__) __HAL_LPTIM_LPTIM1_EXTI_DISABLE_IT()
199 #endif /* LPTIM2 */
200 /**
201 * @}
202 */
203
204 /* Private variables ---------------------------------------------------------*/
205 /* Private function prototypes -----------------------------------------------*/
206 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
207 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim);
208 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
209 static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag);
210
211 /* Exported functions --------------------------------------------------------*/
212
213 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
214 * @{
215 */
216
217 /** @defgroup LPTIM_Exported_Functions_Group1 Initialization/de-initialization functions
218 * @brief Initialization and Configuration functions.
219 *
220 @verbatim
221 ==============================================================================
222 ##### Initialization and de-initialization functions #####
223 ==============================================================================
224 [..] This section provides functions allowing to:
225 (+) Initialize the LPTIM according to the specified parameters in the
226 LPTIM_InitTypeDef and initialize the associated handle.
227 (+) DeInitialize the LPTIM peripheral.
228 (+) Initialize the LPTIM MSP.
229 (+) DeInitialize the LPTIM MSP.
230
231 @endverbatim
232 * @{
233 */
234
235 /**
236 * @brief Initialize the LPTIM according to the specified parameters in the
237 * LPTIM_InitTypeDef and initialize the associated handle.
238 * @param hlptim LPTIM handle
239 * @retval HAL status
240 */
HAL_LPTIM_Init(LPTIM_HandleTypeDef * hlptim)241 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
242 {
243 uint32_t tmpcfgr;
244
245 /* Check the LPTIM handle allocation */
246 if (hlptim == NULL)
247 {
248 return HAL_ERROR;
249 }
250
251 /* Check the parameters */
252 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
253
254 assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source));
255 assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler));
256 if ((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM)
257 {
258 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
259 assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime));
260 }
261 assert_param(IS_LPTIM_TRG_SOURCE(hlptim->Init.Trigger.Source));
262 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
263 {
264 assert_param(IS_LPTIM_TRIG_SAMPLE_TIME(hlptim->Init.Trigger.SampleTime));
265 assert_param(IS_LPTIM_EXT_TRG_POLARITY(hlptim->Init.Trigger.ActiveEdge));
266 }
267 assert_param(IS_LPTIM_OUTPUT_POLARITY(hlptim->Init.OutputPolarity));
268 assert_param(IS_LPTIM_UPDATE_MODE(hlptim->Init.UpdateMode));
269 assert_param(IS_LPTIM_COUNTER_SOURCE(hlptim->Init.CounterSource));
270 #if defined(LPTIM_RCR_REP)
271 assert_param(IS_LPTIM_REPETITION(hlptim->Init.RepetitionCounter));
272 #endif
273
274 if (hlptim->State == HAL_LPTIM_STATE_RESET)
275 {
276 /* Allocate lock resource and initialize it */
277 hlptim->Lock = HAL_UNLOCKED;
278
279 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
280 /* Reset interrupt callbacks to legacy weak callbacks */
281 LPTIM_ResetCallback(hlptim);
282
283 if (hlptim->MspInitCallback == NULL)
284 {
285 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
286 }
287
288 /* Init the low level hardware : GPIO, CLOCK, NVIC */
289 hlptim->MspInitCallback(hlptim);
290 #else
291 /* Init the low level hardware : GPIO, CLOCK, NVIC */
292 HAL_LPTIM_MspInit(hlptim);
293 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
294 }
295
296 /* Change the LPTIM state */
297 hlptim->State = HAL_LPTIM_STATE_BUSY;
298 #if defined(LPTIM_RCR_REP)
299
300 /* Enable the Peripheral */
301 __HAL_LPTIM_ENABLE(hlptim);
302
303 /* Clear flag */
304 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_REPOK);
305
306 /* Set the repetition counter */
307 __HAL_LPTIM_REPETITIONCOUNTER_SET(hlptim, hlptim->Init.RepetitionCounter);
308
309 /* Wait for the completion of the write operation to the LPTIM_RCR register */
310 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_REPOK) == HAL_TIMEOUT)
311 {
312 return HAL_TIMEOUT;
313 }
314
315 /* Disable the Peripheral */
316 __HAL_LPTIM_DISABLE(hlptim);
317
318 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
319 {
320 return HAL_TIMEOUT;
321 }
322
323 #endif
324
325 /* Get the LPTIMx CFGR value */
326 tmpcfgr = hlptim->Instance->CFGR;
327
328 if (((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM) || ((hlptim->Init.CounterSource) == LPTIM_COUNTERSOURCE_EXTERNAL))
329 {
330 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL | LPTIM_CFGR_CKFLT));
331 }
332 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
333 {
334 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGSEL));
335 }
336
337 /* Clear CKSEL, CKPOL, PRESC, TRIGEN, TRGFLT, WAVPOL, PRELOAD & COUNTMODE bits */
338 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKSEL | LPTIM_CFGR_CKPOL | LPTIM_CFGR_TRIGEN | LPTIM_CFGR_PRELOAD |
339 LPTIM_CFGR_WAVPOL | LPTIM_CFGR_PRESC | LPTIM_CFGR_COUNTMODE));
340
341 /* Set initialization parameters */
342 tmpcfgr |= (hlptim->Init.Clock.Source |
343 hlptim->Init.Clock.Prescaler |
344 hlptim->Init.OutputPolarity |
345 hlptim->Init.UpdateMode |
346 hlptim->Init.CounterSource);
347
348 if (((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM) || ((hlptim->Init.CounterSource) == LPTIM_COUNTERSOURCE_EXTERNAL))
349 {
350 tmpcfgr |= (hlptim->Init.UltraLowPowerClock.Polarity |
351 hlptim->Init.UltraLowPowerClock.SampleTime);
352 }
353
354 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
355 {
356 /* Enable External trigger and set the trigger source */
357 tmpcfgr |= (hlptim->Init.Trigger.Source |
358 hlptim->Init.Trigger.ActiveEdge |
359 hlptim->Init.Trigger.SampleTime);
360 }
361
362 /* Write to LPTIMx CFGR */
363 hlptim->Instance->CFGR = tmpcfgr;
364
365 /* Configure LPTIM input sources */
366 if (hlptim->Instance == LPTIM1)
367 {
368 /* Check LPTIM Input1 and Input2 sources */
369 assert_param(IS_LPTIM_INPUT1_SOURCE(hlptim->Instance, hlptim->Init.Input1Source));
370 assert_param(IS_LPTIM_INPUT2_SOURCE(hlptim->Instance, hlptim->Init.Input2Source));
371
372 /* Configure LPTIM Input1 and Input2 sources */
373 hlptim->Instance->OR = (hlptim->Init.Input1Source | hlptim->Init.Input2Source);
374 }
375 else
376 {
377 /* Check LPTIM2 Input1 source */
378 assert_param(IS_LPTIM_INPUT1_SOURCE(hlptim->Instance, hlptim->Init.Input1Source));
379
380 /* Configure LPTIM2 Input1 source */
381 hlptim->Instance->OR = hlptim->Init.Input1Source;
382 }
383
384 /* Change the LPTIM state */
385 hlptim->State = HAL_LPTIM_STATE_READY;
386
387 /* Return function status */
388 return HAL_OK;
389 }
390
391 /**
392 * @brief DeInitialize the LPTIM peripheral.
393 * @param hlptim LPTIM handle
394 * @retval HAL status
395 */
HAL_LPTIM_DeInit(LPTIM_HandleTypeDef * hlptim)396 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
397 {
398 /* Check the LPTIM handle allocation */
399 if (hlptim == NULL)
400 {
401 return HAL_ERROR;
402 }
403
404 /* Change the LPTIM state */
405 hlptim->State = HAL_LPTIM_STATE_BUSY;
406
407 /* Disable the LPTIM Peripheral Clock */
408 __HAL_LPTIM_DISABLE(hlptim);
409
410 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
411 {
412 return HAL_TIMEOUT;
413 }
414
415 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
416 if (hlptim->MspDeInitCallback == NULL)
417 {
418 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
419 }
420
421 /* DeInit the low level hardware: CLOCK, NVIC.*/
422 hlptim->MspDeInitCallback(hlptim);
423 #else
424 /* DeInit the low level hardware: CLOCK, NVIC.*/
425 HAL_LPTIM_MspDeInit(hlptim);
426 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
427
428 /* Change the LPTIM state */
429 hlptim->State = HAL_LPTIM_STATE_RESET;
430
431 /* Release Lock */
432 __HAL_UNLOCK(hlptim);
433
434 /* Return function status */
435 return HAL_OK;
436 }
437
438 /**
439 * @brief Initialize the LPTIM MSP.
440 * @param hlptim LPTIM handle
441 * @retval None
442 */
HAL_LPTIM_MspInit(LPTIM_HandleTypeDef * hlptim)443 __weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
444 {
445 /* Prevent unused argument(s) compilation warning */
446 UNUSED(hlptim);
447
448 /* NOTE : This function should not be modified, when the callback is needed,
449 the HAL_LPTIM_MspInit could be implemented in the user file
450 */
451 }
452
453 /**
454 * @brief DeInitialize LPTIM MSP.
455 * @param hlptim LPTIM handle
456 * @retval None
457 */
HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef * hlptim)458 __weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim)
459 {
460 /* Prevent unused argument(s) compilation warning */
461 UNUSED(hlptim);
462
463 /* NOTE : This function should not be modified, when the callback is needed,
464 the HAL_LPTIM_MspDeInit could be implemented in the user file
465 */
466 }
467
468 /**
469 * @}
470 */
471
472 /** @defgroup LPTIM_Exported_Functions_Group2 LPTIM Start-Stop operation functions
473 * @brief Start-Stop operation functions.
474 *
475 @verbatim
476 ==============================================================================
477 ##### LPTIM Start Stop operation functions #####
478 ==============================================================================
479 [..] This section provides functions allowing to:
480 (+) Start the PWM mode.
481 (+) Stop the PWM mode.
482 (+) Start the One pulse mode.
483 (+) Stop the One pulse mode.
484 (+) Start the Set once mode.
485 (+) Stop the Set once mode.
486 (+) Start the Encoder mode.
487 (+) Stop the Encoder mode.
488 (+) Start the Timeout mode.
489 (+) Stop the Timeout mode.
490 (+) Start the Counter mode.
491 (+) Stop the Counter mode.
492
493
494 @endverbatim
495 * @{
496 */
497
498 /**
499 * @brief Start the LPTIM PWM generation.
500 * @param hlptim LPTIM handle
501 * @param Period Specifies the Autoreload value.
502 * This parameter must be a value between 0x0000 and 0xFFFF.
503 * @param Pulse Specifies the compare value.
504 * This parameter must be a value between 0x0000 and 0xFFFF.
505 * @retval HAL status
506 */
HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)507 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
508 {
509 /* Check the parameters */
510 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
511 assert_param(IS_LPTIM_PERIOD(Period));
512 assert_param(IS_LPTIM_PULSE(Pulse));
513
514 /* Set the LPTIM state */
515 hlptim->State = HAL_LPTIM_STATE_BUSY;
516
517 /* Reset WAVE bit to set PWM mode */
518 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
519
520 /* Enable the Peripheral */
521 __HAL_LPTIM_ENABLE(hlptim);
522
523 /* Clear flag */
524 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
525
526 /* Load the period value in the autoreload register */
527 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
528
529 /* Wait for the completion of the write operation to the LPTIM_ARR register */
530 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
531 {
532 return HAL_TIMEOUT;
533 }
534
535 /* Clear flag */
536 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
537
538 /* Load the pulse value in the compare register */
539 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
540
541 /* Wait for the completion of the write operation to the LPTIM_CMP register */
542 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
543 {
544 return HAL_TIMEOUT;
545 }
546
547 /* Start timer in continuous mode */
548 __HAL_LPTIM_START_CONTINUOUS(hlptim);
549
550 /* Change the TIM state*/
551 hlptim->State = HAL_LPTIM_STATE_READY;
552
553 /* Return function status */
554 return HAL_OK;
555 }
556
557 /**
558 * @brief Stop the LPTIM PWM generation.
559 * @param hlptim LPTIM handle
560 * @retval HAL status
561 */
HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef * hlptim)562 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
563 {
564 /* Check the parameters */
565 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
566
567 /* Set the LPTIM state */
568 hlptim->State = HAL_LPTIM_STATE_BUSY;
569
570 /* Disable the Peripheral */
571 __HAL_LPTIM_DISABLE(hlptim);
572
573 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
574 {
575 return HAL_TIMEOUT;
576 }
577
578 /* Change the TIM state*/
579 hlptim->State = HAL_LPTIM_STATE_READY;
580
581 /* Return function status */
582 return HAL_OK;
583 }
584
585 /**
586 * @brief Start the LPTIM PWM generation in interrupt mode.
587 * @param hlptim LPTIM handle
588 * @param Period Specifies the Autoreload value.
589 * This parameter must be a value between 0x0000 and 0xFFFF
590 * @param Pulse Specifies the compare value.
591 * This parameter must be a value between 0x0000 and 0xFFFF
592 * @retval HAL status
593 */
HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)594 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
595 {
596 /* Check the parameters */
597 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
598 assert_param(IS_LPTIM_PERIOD(Period));
599 assert_param(IS_LPTIM_PULSE(Pulse));
600
601 /* Set the LPTIM state */
602 hlptim->State = HAL_LPTIM_STATE_BUSY;
603
604 /* Reset WAVE bit to set PWM mode */
605 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
606
607 /* Enable the Peripheral */
608 __HAL_LPTIM_ENABLE(hlptim);
609
610 /* Clear flag */
611 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
612
613 /* Load the period value in the autoreload register */
614 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
615
616 /* Wait for the completion of the write operation to the LPTIM_ARR register */
617 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
618 {
619 return HAL_TIMEOUT;
620 }
621
622 /* Clear flag */
623 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
624
625 /* Load the pulse value in the compare register */
626 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
627
628 /* Wait for the completion of the write operation to the LPTIM_CMP register */
629 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
630 {
631 return HAL_TIMEOUT;
632 }
633
634 /* Disable the Peripheral */
635 __HAL_LPTIM_DISABLE(hlptim);
636
637 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
638 {
639 return HAL_TIMEOUT;
640 }
641
642 /* Enable Autoreload write complete interrupt */
643 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
644
645 /* Enable Compare write complete interrupt */
646 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
647
648 /* Enable Autoreload match interrupt */
649 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
650
651 /* Enable Compare match interrupt */
652 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
653
654 /* If external trigger source is used, then enable external trigger interrupt */
655 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
656 {
657 /* Enable external trigger interrupt */
658 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
659 }
660 #if defined(LPTIM_RCR_REP)
661
662 /* Enable Rep Update Ok interrupt */
663 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_REPOK);
664
665 /* Enable Update Event interrupt */
666 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UPDATE);
667 #endif
668
669 /* Enable the Peripheral */
670 __HAL_LPTIM_ENABLE(hlptim);
671
672 /* Start timer in continuous mode */
673 __HAL_LPTIM_START_CONTINUOUS(hlptim);
674
675 /* Change the TIM state*/
676 hlptim->State = HAL_LPTIM_STATE_READY;
677
678 /* Return function status */
679 return HAL_OK;
680 }
681
682 /**
683 * @brief Stop the LPTIM PWM generation in interrupt mode.
684 * @param hlptim LPTIM handle
685 * @retval HAL status
686 */
HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef * hlptim)687 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
688 {
689 /* Check the parameters */
690 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
691
692 /* Set the LPTIM state */
693 hlptim->State = HAL_LPTIM_STATE_BUSY;
694
695 /* Disable the Peripheral */
696 __HAL_LPTIM_DISABLE(hlptim);
697
698 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
699 {
700 return HAL_TIMEOUT;
701 }
702
703 /* Disable Autoreload write complete interrupt */
704 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
705
706 /* Disable Compare write complete interrupt */
707 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
708
709 /* Disable Autoreload match interrupt */
710 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
711
712 /* Disable Compare match interrupt */
713 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
714
715 /* If external trigger source is used, then disable external trigger interrupt */
716 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
717 {
718 /* Disable external trigger interrupt */
719 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
720 }
721 #if defined(LPTIM_RCR_REP)
722
723 /* Enable Rep Update Ok interrupt */
724 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_REPOK);
725
726 /* Enable Update Event interrupt */
727 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UPDATE);
728 #endif
729
730 /* Change the TIM state*/
731 hlptim->State = HAL_LPTIM_STATE_READY;
732
733 /* Return function status */
734 return HAL_OK;
735 }
736
737 /**
738 * @brief Start the LPTIM One pulse generation.
739 * @param hlptim LPTIM handle
740 * @param Period Specifies the Autoreload value.
741 * This parameter must be a value between 0x0000 and 0xFFFF.
742 * @param Pulse Specifies the compare value.
743 * This parameter must be a value between 0x0000 and 0xFFFF.
744 * @retval HAL status
745 */
HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)746 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
747 {
748 /* Check the parameters */
749 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
750 assert_param(IS_LPTIM_PERIOD(Period));
751 assert_param(IS_LPTIM_PULSE(Pulse));
752
753 /* Set the LPTIM state */
754 hlptim->State = HAL_LPTIM_STATE_BUSY;
755
756 /* Reset WAVE bit to set one pulse mode */
757 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
758
759 /* Enable the Peripheral */
760 __HAL_LPTIM_ENABLE(hlptim);
761
762 /* Clear flag */
763 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
764
765 /* Load the period value in the autoreload register */
766 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
767
768 /* Wait for the completion of the write operation to the LPTIM_ARR register */
769 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
770 {
771 return HAL_TIMEOUT;
772 }
773
774 /* Clear flag */
775 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
776
777 /* Load the pulse value in the compare register */
778 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
779
780 /* Wait for the completion of the write operation to the LPTIM_CMP register */
781 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
782 {
783 return HAL_TIMEOUT;
784 }
785
786 /* Start timer in single (one shot) mode */
787 __HAL_LPTIM_START_SINGLE(hlptim);
788
789 /* Change the TIM state*/
790 hlptim->State = HAL_LPTIM_STATE_READY;
791
792 /* Return function status */
793 return HAL_OK;
794 }
795
796 /**
797 * @brief Stop the LPTIM One pulse generation.
798 * @param hlptim LPTIM handle
799 * @retval HAL status
800 */
HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef * hlptim)801 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim)
802 {
803 /* Check the parameters */
804 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
805
806 /* Set the LPTIM state */
807 hlptim->State = HAL_LPTIM_STATE_BUSY;
808
809 /* Disable the Peripheral */
810 __HAL_LPTIM_DISABLE(hlptim);
811
812 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
813 {
814 return HAL_TIMEOUT;
815 }
816
817 /* Change the TIM state*/
818 hlptim->State = HAL_LPTIM_STATE_READY;
819
820 /* Return function status */
821 return HAL_OK;
822 }
823
824 /**
825 * @brief Start the LPTIM One pulse generation in interrupt mode.
826 * @param hlptim LPTIM handle
827 * @param Period Specifies the Autoreload value.
828 * This parameter must be a value between 0x0000 and 0xFFFF.
829 * @param Pulse Specifies the compare value.
830 * This parameter must be a value between 0x0000 and 0xFFFF.
831 * @retval HAL status
832 */
HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)833 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
834 {
835 /* Check the parameters */
836 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
837 assert_param(IS_LPTIM_PERIOD(Period));
838 assert_param(IS_LPTIM_PULSE(Pulse));
839
840 /* Set the LPTIM state */
841 hlptim->State = HAL_LPTIM_STATE_BUSY;
842
843 /* Reset WAVE bit to set one pulse mode */
844 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
845
846 /* Enable the Peripheral */
847 __HAL_LPTIM_ENABLE(hlptim);
848
849 /* Clear flag */
850 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
851
852 /* Load the period value in the autoreload register */
853 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
854
855 /* Wait for the completion of the write operation to the LPTIM_ARR register */
856 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
857 {
858 return HAL_TIMEOUT;
859 }
860
861 /* Clear flag */
862 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
863
864 /* Load the pulse value in the compare register */
865 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
866
867 /* Wait for the completion of the write operation to the LPTIM_CMP register */
868 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
869 {
870 return HAL_TIMEOUT;
871 }
872
873 /* Disable the Peripheral */
874 __HAL_LPTIM_DISABLE(hlptim);
875
876 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
877 {
878 return HAL_TIMEOUT;
879 }
880
881 /* Enable Autoreload write complete interrupt */
882 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
883
884 /* Enable Compare write complete interrupt */
885 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
886
887 /* Enable Autoreload match interrupt */
888 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
889
890 /* Enable Compare match interrupt */
891 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
892
893 /* If external trigger source is used, then enable external trigger interrupt */
894 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
895 {
896 /* Enable external trigger interrupt */
897 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
898 }
899 #if defined(LPTIM_RCR_REP)
900
901 /* Enable Rep Update Ok interrupt */
902 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_REPOK);
903
904 /* Enable Update Event interrupt */
905 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UPDATE);
906 #endif
907
908 /* Enable the Peripheral */
909 __HAL_LPTIM_ENABLE(hlptim);
910
911 /* Start timer in single (one shot) mode */
912 __HAL_LPTIM_START_SINGLE(hlptim);
913
914 /* Change the TIM state*/
915 hlptim->State = HAL_LPTIM_STATE_READY;
916
917 /* Return function status */
918 return HAL_OK;
919 }
920
921 /**
922 * @brief Stop the LPTIM One pulse generation in interrupt mode.
923 * @param hlptim LPTIM handle
924 * @retval HAL status
925 */
HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef * hlptim)926 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim)
927 {
928 /* Check the parameters */
929 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
930
931 /* Set the LPTIM state */
932 hlptim->State = HAL_LPTIM_STATE_BUSY;
933
934 /* Disable the Peripheral */
935 __HAL_LPTIM_DISABLE(hlptim);
936
937 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
938 {
939 return HAL_TIMEOUT;
940 }
941
942 /* Disable Autoreload write complete interrupt */
943 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
944
945 /* Disable Compare write complete interrupt */
946 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
947
948 /* Disable Autoreload match interrupt */
949 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
950
951 /* Disable Compare match interrupt */
952 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
953
954 /* If external trigger source is used, then disable external trigger interrupt */
955 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
956 {
957 /* Disable external trigger interrupt */
958 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
959 }
960 #if defined(LPTIM_RCR_REP)
961
962 /* Enable Rep Update Ok interrupt */
963 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_REPOK);
964
965 /* Enable Update Event interrupt */
966 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UPDATE);
967 #endif
968
969 /* Change the TIM state*/
970 hlptim->State = HAL_LPTIM_STATE_READY;
971
972 /* Return function status */
973 return HAL_OK;
974 }
975
976 /**
977 * @brief Start the LPTIM in Set once mode.
978 * @param hlptim LPTIM handle
979 * @param Period Specifies the Autoreload value.
980 * This parameter must be a value between 0x0000 and 0xFFFF.
981 * @param Pulse Specifies the compare value.
982 * This parameter must be a value between 0x0000 and 0xFFFF.
983 * @retval HAL status
984 */
HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)985 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
986 {
987 /* Check the parameters */
988 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
989 assert_param(IS_LPTIM_PERIOD(Period));
990 assert_param(IS_LPTIM_PULSE(Pulse));
991
992 /* Set the LPTIM state */
993 hlptim->State = HAL_LPTIM_STATE_BUSY;
994
995 /* Set WAVE bit to enable the set once mode */
996 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
997
998 /* Enable the Peripheral */
999 __HAL_LPTIM_ENABLE(hlptim);
1000
1001 /* Clear flag */
1002 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1003
1004 /* Load the period value in the autoreload register */
1005 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1006
1007 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1008 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1009 {
1010 return HAL_TIMEOUT;
1011 }
1012
1013 /* Clear flag */
1014 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1015
1016 /* Load the pulse value in the compare register */
1017 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
1018
1019 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1020 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1021 {
1022 return HAL_TIMEOUT;
1023 }
1024
1025 /* Start timer in single (one shot) mode */
1026 __HAL_LPTIM_START_SINGLE(hlptim);
1027
1028 /* Change the TIM state*/
1029 hlptim->State = HAL_LPTIM_STATE_READY;
1030
1031 /* Return function status */
1032 return HAL_OK;
1033 }
1034
1035 /**
1036 * @brief Stop the LPTIM Set once mode.
1037 * @param hlptim LPTIM handle
1038 * @retval HAL status
1039 */
HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef * hlptim)1040 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
1041 {
1042 /* Check the parameters */
1043 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1044
1045 /* Set the LPTIM state */
1046 hlptim->State = HAL_LPTIM_STATE_BUSY;
1047
1048 /* Disable the Peripheral */
1049 __HAL_LPTIM_DISABLE(hlptim);
1050
1051 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1052 {
1053 return HAL_TIMEOUT;
1054 }
1055
1056 /* Change the TIM state*/
1057 hlptim->State = HAL_LPTIM_STATE_READY;
1058
1059 /* Return function status */
1060 return HAL_OK;
1061 }
1062
1063 /**
1064 * @brief Start the LPTIM Set once mode in interrupt mode.
1065 * @param hlptim LPTIM handle
1066 * @param Period Specifies the Autoreload value.
1067 * This parameter must be a value between 0x0000 and 0xFFFF.
1068 * @param Pulse Specifies the compare value.
1069 * This parameter must be a value between 0x0000 and 0xFFFF.
1070 * @retval HAL status
1071 */
HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)1072 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
1073 {
1074 /* Check the parameters */
1075 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1076 assert_param(IS_LPTIM_PERIOD(Period));
1077 assert_param(IS_LPTIM_PULSE(Pulse));
1078
1079 /* Set the LPTIM state */
1080 hlptim->State = HAL_LPTIM_STATE_BUSY;
1081
1082 /* Set WAVE bit to enable the set once mode */
1083 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
1084
1085 /* Enable the Peripheral */
1086 __HAL_LPTIM_ENABLE(hlptim);
1087
1088 /* Clear flag */
1089 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1090
1091 /* Load the period value in the autoreload register */
1092 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1093
1094 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1095 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1096 {
1097 return HAL_TIMEOUT;
1098 }
1099
1100 /* Clear flag */
1101 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1102
1103 /* Load the pulse value in the compare register */
1104 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
1105
1106 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1107 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1108 {
1109 return HAL_TIMEOUT;
1110 }
1111
1112 /* Disable the Peripheral */
1113 __HAL_LPTIM_DISABLE(hlptim);
1114
1115 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1116 {
1117 return HAL_TIMEOUT;
1118 }
1119
1120 /* Enable Autoreload write complete interrupt */
1121 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1122
1123 /* Enable Compare write complete interrupt */
1124 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
1125
1126 /* Enable Autoreload match interrupt */
1127 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1128
1129 /* Enable Compare match interrupt */
1130 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1131
1132 /* If external trigger source is used, then enable external trigger interrupt */
1133 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1134 {
1135 /* Enable external trigger interrupt */
1136 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1137 }
1138
1139 /* Enable the Peripheral */
1140 __HAL_LPTIM_ENABLE(hlptim);
1141
1142 /* Start timer in single (one shot) mode */
1143 __HAL_LPTIM_START_SINGLE(hlptim);
1144
1145 /* Change the TIM state*/
1146 hlptim->State = HAL_LPTIM_STATE_READY;
1147
1148 /* Return function status */
1149 return HAL_OK;
1150 }
1151
1152 /**
1153 * @brief Stop the LPTIM Set once mode in interrupt mode.
1154 * @param hlptim LPTIM handle
1155 * @retval HAL status
1156 */
HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef * hlptim)1157 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1158 {
1159 /* Check the parameters */
1160 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1161
1162 /* Set the LPTIM state */
1163 hlptim->State = HAL_LPTIM_STATE_BUSY;
1164
1165 /* Disable the Peripheral */
1166 __HAL_LPTIM_DISABLE(hlptim);
1167
1168 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1169 {
1170 return HAL_TIMEOUT;
1171 }
1172
1173 /* Disable Autoreload write complete interrupt */
1174 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1175
1176 /* Disable Compare write complete interrupt */
1177 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
1178
1179 /* Disable Autoreload match interrupt */
1180 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1181
1182 /* Disable Compare match interrupt */
1183 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1184
1185 /* If external trigger source is used, then disable external trigger interrupt */
1186 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1187 {
1188 /* Disable external trigger interrupt */
1189 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1190 }
1191
1192 /* Change the TIM state*/
1193 hlptim->State = HAL_LPTIM_STATE_READY;
1194
1195 /* Return function status */
1196 return HAL_OK;
1197 }
1198
1199 /**
1200 * @brief Start the Encoder interface.
1201 * @param hlptim LPTIM handle
1202 * @param Period Specifies the Autoreload value.
1203 * This parameter must be a value between 0x0000 and 0xFFFF.
1204 * @retval HAL status
1205 */
HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1206 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1207 {
1208 uint32_t tmpcfgr;
1209
1210 /* Check the parameters */
1211 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1212 assert_param(IS_LPTIM_PERIOD(Period));
1213 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1214 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1215 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1216
1217 /* Set the LPTIM state */
1218 hlptim->State = HAL_LPTIM_STATE_BUSY;
1219
1220 /* Get the LPTIMx CFGR value */
1221 tmpcfgr = hlptim->Instance->CFGR;
1222
1223 /* Clear CKPOL bits */
1224 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1225
1226 /* Set Input polarity */
1227 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1228
1229 /* Write to LPTIMx CFGR */
1230 hlptim->Instance->CFGR = tmpcfgr;
1231
1232 /* Set ENC bit to enable the encoder interface */
1233 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1234
1235 /* Enable the Peripheral */
1236 __HAL_LPTIM_ENABLE(hlptim);
1237
1238 /* Clear flag */
1239 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1240
1241 /* Load the period value in the autoreload register */
1242 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1243
1244 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1245 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1246 {
1247 return HAL_TIMEOUT;
1248 }
1249
1250 /* Start timer in continuous mode */
1251 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1252
1253 /* Change the TIM state*/
1254 hlptim->State = HAL_LPTIM_STATE_READY;
1255
1256 /* Return function status */
1257 return HAL_OK;
1258 }
1259
1260 /**
1261 * @brief Stop the Encoder interface.
1262 * @param hlptim LPTIM handle
1263 * @retval HAL status
1264 */
HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef * hlptim)1265 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim)
1266 {
1267 /* Check the parameters */
1268 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1269
1270 /* Set the LPTIM state */
1271 hlptim->State = HAL_LPTIM_STATE_BUSY;
1272
1273 /* Disable the Peripheral */
1274 __HAL_LPTIM_DISABLE(hlptim);
1275
1276 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1277 {
1278 return HAL_TIMEOUT;
1279 }
1280
1281 /* Reset ENC bit to disable the encoder interface */
1282 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1283
1284 /* Change the TIM state*/
1285 hlptim->State = HAL_LPTIM_STATE_READY;
1286
1287 /* Return function status */
1288 return HAL_OK;
1289 }
1290
1291 /**
1292 * @brief Start the Encoder interface in interrupt mode.
1293 * @param hlptim LPTIM handle
1294 * @param Period Specifies the Autoreload value.
1295 * This parameter must be a value between 0x0000 and 0xFFFF.
1296 * @retval HAL status
1297 */
HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1298 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1299 {
1300 uint32_t tmpcfgr;
1301
1302 /* Check the parameters */
1303 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1304 assert_param(IS_LPTIM_PERIOD(Period));
1305 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1306 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1307 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1308
1309 /* Set the LPTIM state */
1310 hlptim->State = HAL_LPTIM_STATE_BUSY;
1311
1312 /* Configure edge sensitivity for encoder mode */
1313 /* Get the LPTIMx CFGR value */
1314 tmpcfgr = hlptim->Instance->CFGR;
1315
1316 /* Clear CKPOL bits */
1317 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1318
1319 /* Set Input polarity */
1320 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1321
1322 /* Write to LPTIMx CFGR */
1323 hlptim->Instance->CFGR = tmpcfgr;
1324
1325 /* Set ENC bit to enable the encoder interface */
1326 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1327
1328 /* Enable the Peripheral */
1329 __HAL_LPTIM_ENABLE(hlptim);
1330
1331 /* Clear flag */
1332 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1333
1334 /* Load the period value in the autoreload register */
1335 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1336
1337 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1338 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1339 {
1340 return HAL_TIMEOUT;
1341 }
1342
1343 /* Disable the Peripheral */
1344 __HAL_LPTIM_DISABLE(hlptim);
1345
1346 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1347 {
1348 return HAL_TIMEOUT;
1349 }
1350
1351 /* Enable "switch to down direction" interrupt */
1352 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_DOWN);
1353
1354 /* Enable "switch to up direction" interrupt */
1355 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UP);
1356
1357 /* Enable the Peripheral */
1358 __HAL_LPTIM_ENABLE(hlptim);
1359
1360 /* Start timer in continuous mode */
1361 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1362
1363 /* Change the TIM state*/
1364 hlptim->State = HAL_LPTIM_STATE_READY;
1365
1366 /* Return function status */
1367 return HAL_OK;
1368 }
1369
1370 /**
1371 * @brief Stop the Encoder interface in interrupt mode.
1372 * @param hlptim LPTIM handle
1373 * @retval HAL status
1374 */
HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef * hlptim)1375 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1376 {
1377 /* Check the parameters */
1378 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1379
1380 /* Set the LPTIM state */
1381 hlptim->State = HAL_LPTIM_STATE_BUSY;
1382
1383 /* Disable the Peripheral */
1384 __HAL_LPTIM_DISABLE(hlptim);
1385
1386 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1387 {
1388 return HAL_TIMEOUT;
1389 }
1390
1391 /* Reset ENC bit to disable the encoder interface */
1392 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1393
1394 /* Disable "switch to down direction" interrupt */
1395 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_DOWN);
1396
1397 /* Disable "switch to up direction" interrupt */
1398 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UP);
1399
1400 /* Change the TIM state*/
1401 hlptim->State = HAL_LPTIM_STATE_READY;
1402
1403 /* Return function status */
1404 return HAL_OK;
1405 }
1406
1407 /**
1408 * @brief Start the Timeout function.
1409 * @note The first trigger event will start the timer, any successive
1410 * trigger event will reset the counter and the timer restarts.
1411 * @param hlptim LPTIM handle
1412 * @param Period Specifies the Autoreload value.
1413 * This parameter must be a value between 0x0000 and 0xFFFF.
1414 * @param Timeout Specifies the TimeOut value to reset the counter.
1415 * This parameter must be a value between 0x0000 and 0xFFFF.
1416 * @retval HAL status
1417 */
HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Timeout)1418 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1419 {
1420 /* Check the parameters */
1421 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1422 assert_param(IS_LPTIM_PERIOD(Period));
1423 assert_param(IS_LPTIM_PULSE(Timeout));
1424
1425 /* Set the LPTIM state */
1426 hlptim->State = HAL_LPTIM_STATE_BUSY;
1427
1428 /* Set TIMOUT bit to enable the timeout function */
1429 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1430
1431 /* Enable the Peripheral */
1432 __HAL_LPTIM_ENABLE(hlptim);
1433
1434 /* Clear flag */
1435 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1436
1437 /* Load the period value in the autoreload register */
1438 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1439
1440 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1441 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1442 {
1443 return HAL_TIMEOUT;
1444 }
1445
1446 /* Clear flag */
1447 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1448
1449 /* Load the Timeout value in the compare register */
1450 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1451
1452 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1453 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1454 {
1455 return HAL_TIMEOUT;
1456 }
1457
1458 /* Start timer in continuous mode */
1459 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1460
1461 /* Change the TIM state*/
1462 hlptim->State = HAL_LPTIM_STATE_READY;
1463
1464 /* Return function status */
1465 return HAL_OK;
1466 }
1467
1468 /**
1469 * @brief Stop the Timeout function.
1470 * @param hlptim LPTIM handle
1471 * @retval HAL status
1472 */
HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef * hlptim)1473 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim)
1474 {
1475 /* Check the parameters */
1476 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1477
1478 /* Set the LPTIM state */
1479 hlptim->State = HAL_LPTIM_STATE_BUSY;
1480
1481 /* Disable the Peripheral */
1482 __HAL_LPTIM_DISABLE(hlptim);
1483
1484 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1485 {
1486 return HAL_TIMEOUT;
1487 }
1488
1489 /* Reset TIMOUT bit to enable the timeout function */
1490 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1491
1492 /* Change the TIM state*/
1493 hlptim->State = HAL_LPTIM_STATE_READY;
1494
1495 /* Return function status */
1496 return HAL_OK;
1497 }
1498
1499 /**
1500 * @brief Start the Timeout function in interrupt mode.
1501 * @note The first trigger event will start the timer, any successive
1502 * trigger event will reset the counter and the timer restarts.
1503 * @param hlptim LPTIM handle
1504 * @param Period Specifies the Autoreload value.
1505 * This parameter must be a value between 0x0000 and 0xFFFF.
1506 * @param Timeout Specifies the TimeOut value to reset the counter.
1507 * This parameter must be a value between 0x0000 and 0xFFFF.
1508 * @retval HAL status
1509 */
HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Timeout)1510 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1511 {
1512 /* Check the parameters */
1513 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1514 assert_param(IS_LPTIM_PERIOD(Period));
1515 assert_param(IS_LPTIM_PULSE(Timeout));
1516
1517 /* Set the LPTIM state */
1518 hlptim->State = HAL_LPTIM_STATE_BUSY;
1519
1520 /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1521 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(hlptim->Instance);
1522
1523 /* Set TIMOUT bit to enable the timeout function */
1524 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1525
1526 /* Enable the Peripheral */
1527 __HAL_LPTIM_ENABLE(hlptim);
1528
1529 /* Clear flag */
1530 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1531
1532 /* Load the period value in the autoreload register */
1533 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1534
1535 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1536 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1537 {
1538 return HAL_TIMEOUT;
1539 }
1540
1541 /* Clear flag */
1542 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1543
1544 /* Load the Timeout value in the compare register */
1545 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1546
1547 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1548 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1549 {
1550 return HAL_TIMEOUT;
1551 }
1552
1553 /* Disable the Peripheral */
1554 __HAL_LPTIM_DISABLE(hlptim);
1555
1556 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1557 {
1558 return HAL_TIMEOUT;
1559 }
1560
1561 /* Enable Compare match interrupt */
1562 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1563
1564 /* Enable the Peripheral */
1565 __HAL_LPTIM_ENABLE(hlptim);
1566
1567 /* Start timer in continuous mode */
1568 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1569
1570 /* Change the TIM state*/
1571 hlptim->State = HAL_LPTIM_STATE_READY;
1572
1573 /* Return function status */
1574 return HAL_OK;
1575 }
1576
1577 /**
1578 * @brief Stop the Timeout function in interrupt mode.
1579 * @param hlptim LPTIM handle
1580 * @retval HAL status
1581 */
HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef * hlptim)1582 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1583 {
1584 /* Check the parameters */
1585 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1586
1587 /* Set the LPTIM state */
1588 hlptim->State = HAL_LPTIM_STATE_BUSY;
1589
1590 /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1591 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(hlptim->Instance);
1592
1593 /* Disable the Peripheral */
1594 __HAL_LPTIM_DISABLE(hlptim);
1595
1596 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1597 {
1598 return HAL_TIMEOUT;
1599 }
1600
1601 /* Reset TIMOUT bit to enable the timeout function */
1602 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1603
1604 /* Disable Compare match interrupt */
1605 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1606
1607 /* Change the TIM state*/
1608 hlptim->State = HAL_LPTIM_STATE_READY;
1609
1610 /* Return function status */
1611 return HAL_OK;
1612 }
1613
1614 /**
1615 * @brief Start the Counter mode.
1616 * @param hlptim LPTIM handle
1617 * @param Period Specifies the Autoreload value.
1618 * This parameter must be a value between 0x0000 and 0xFFFF.
1619 * @retval HAL status
1620 */
HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1621 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1622 {
1623 /* Check the parameters */
1624 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1625 assert_param(IS_LPTIM_PERIOD(Period));
1626
1627 /* Set the LPTIM state */
1628 hlptim->State = HAL_LPTIM_STATE_BUSY;
1629
1630 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1631 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM) && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1632 {
1633 /* Check if clock is prescaled */
1634 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1635 /* Set clock prescaler to 0 */
1636 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1637 }
1638
1639 /* Enable the Peripheral */
1640 __HAL_LPTIM_ENABLE(hlptim);
1641
1642 /* Clear flag */
1643 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1644
1645 /* Load the period value in the autoreload register */
1646 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1647
1648 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1649 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1650 {
1651 return HAL_TIMEOUT;
1652 }
1653
1654 /* Start timer in continuous mode */
1655 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1656
1657 /* Change the TIM state*/
1658 hlptim->State = HAL_LPTIM_STATE_READY;
1659
1660 /* Return function status */
1661 return HAL_OK;
1662 }
1663
1664 /**
1665 * @brief Stop the Counter mode.
1666 * @param hlptim LPTIM handle
1667 * @retval HAL status
1668 */
HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef * hlptim)1669 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim)
1670 {
1671 /* Check the parameters */
1672 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1673
1674 /* Set the LPTIM state */
1675 hlptim->State = HAL_LPTIM_STATE_BUSY;
1676
1677 /* Disable the Peripheral */
1678 __HAL_LPTIM_DISABLE(hlptim);
1679
1680 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1681 {
1682 return HAL_TIMEOUT;
1683 }
1684
1685 /* Change the TIM state*/
1686 hlptim->State = HAL_LPTIM_STATE_READY;
1687
1688 /* Return function status */
1689 return HAL_OK;
1690 }
1691
1692 /**
1693 * @brief Start the Counter mode in interrupt mode.
1694 * @param hlptim LPTIM handle
1695 * @param Period Specifies the Autoreload value.
1696 * This parameter must be a value between 0x0000 and 0xFFFF.
1697 * @retval HAL status
1698 */
HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1699 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1700 {
1701 /* Check the parameters */
1702 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1703 assert_param(IS_LPTIM_PERIOD(Period));
1704
1705 /* Set the LPTIM state */
1706 hlptim->State = HAL_LPTIM_STATE_BUSY;
1707
1708 /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1709 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(hlptim->Instance);
1710
1711 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1712 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM) && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1713 {
1714 /* Check if clock is prescaled */
1715 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1716 /* Set clock prescaler to 0 */
1717 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1718 }
1719
1720 /* Enable the Peripheral */
1721 __HAL_LPTIM_ENABLE(hlptim);
1722
1723 /* Clear flag */
1724 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1725
1726 /* Load the period value in the autoreload register */
1727 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1728
1729 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1730 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1731 {
1732 return HAL_TIMEOUT;
1733 }
1734
1735 /* Disable the Peripheral */
1736 __HAL_LPTIM_DISABLE(hlptim);
1737
1738 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1739 {
1740 return HAL_TIMEOUT;
1741 }
1742
1743 /* Enable Autoreload write complete interrupt */
1744 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1745
1746 /* Enable Autoreload match interrupt */
1747 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1748
1749 #if defined(LPTIM_RCR_REP)
1750 /* Enable Rep Update Ok interrupt */
1751 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_REPOK);
1752
1753 /* Enable Update Event interrupt */
1754 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UPDATE);
1755
1756 #endif
1757 /* Enable the Peripheral */
1758 __HAL_LPTIM_ENABLE(hlptim);
1759
1760 /* Start timer in continuous mode */
1761 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1762
1763 /* Change the TIM state*/
1764 hlptim->State = HAL_LPTIM_STATE_READY;
1765
1766 /* Return function status */
1767 return HAL_OK;
1768 }
1769
1770 /**
1771 * @brief Stop the Counter mode in interrupt mode.
1772 * @param hlptim LPTIM handle
1773 * @retval HAL status
1774 */
HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef * hlptim)1775 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1776 {
1777 /* Check the parameters */
1778 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1779
1780 /* Set the LPTIM state */
1781 hlptim->State = HAL_LPTIM_STATE_BUSY;
1782
1783 /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1784 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(hlptim->Instance);
1785
1786 /* Disable the Peripheral */
1787 __HAL_LPTIM_DISABLE(hlptim);
1788
1789 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1790 {
1791 return HAL_TIMEOUT;
1792 }
1793
1794 /* Disable Autoreload write complete interrupt */
1795 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1796
1797 /* Disable Autoreload match interrupt */
1798 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1799 #if defined(LPTIM_RCR_REP)
1800
1801 /* Disable Rep Update Ok interrupt */
1802 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_REPOK);
1803
1804 /* Disable Update Event interrupt */
1805 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UPDATE);
1806 #endif
1807 /* Change the TIM state*/
1808 hlptim->State = HAL_LPTIM_STATE_READY;
1809
1810 /* Return function status */
1811 return HAL_OK;
1812 }
1813
1814 /**
1815 * @}
1816 */
1817
1818 /** @defgroup LPTIM_Exported_Functions_Group3 LPTIM Read operation functions
1819 * @brief Read operation functions.
1820 *
1821 @verbatim
1822 ==============================================================================
1823 ##### LPTIM Read operation functions #####
1824 ==============================================================================
1825 [..] This section provides LPTIM Reading functions.
1826 (+) Read the counter value.
1827 (+) Read the period (Auto-reload) value.
1828 (+) Read the pulse (Compare)value.
1829 @endverbatim
1830 * @{
1831 */
1832
1833 /**
1834 * @brief Return the current counter value.
1835 * @param hlptim LPTIM handle
1836 * @retval Counter value.
1837 */
HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef * hlptim)1838 uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim)
1839 {
1840 /* Check the parameters */
1841 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1842
1843 return (hlptim->Instance->CNT);
1844 }
1845
1846 /**
1847 * @brief Return the current Autoreload (Period) value.
1848 * @param hlptim LPTIM handle
1849 * @retval Autoreload value.
1850 */
HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef * hlptim)1851 uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim)
1852 {
1853 /* Check the parameters */
1854 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1855
1856 return (hlptim->Instance->ARR);
1857 }
1858
1859 /**
1860 * @brief Return the current Compare (Pulse) value.
1861 * @param hlptim LPTIM handle
1862 * @retval Compare value.
1863 */
HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef * hlptim)1864 uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim)
1865 {
1866 /* Check the parameters */
1867 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1868
1869 return (hlptim->Instance->CMP);
1870 }
1871
1872 /**
1873 * @}
1874 */
1875
1876 /** @defgroup LPTIM_Exported_Functions_Group4 LPTIM IRQ handler and callbacks
1877 * @brief LPTIM IRQ handler.
1878 *
1879 @verbatim
1880 ==============================================================================
1881 ##### LPTIM IRQ handler and callbacks #####
1882 ==============================================================================
1883 [..] This section provides LPTIM IRQ handler and callback functions called within
1884 the IRQ handler:
1885 (+) LPTIM interrupt request handler
1886 (+) Compare match Callback
1887 (+) Auto-reload match Callback
1888 (+) External trigger event detection Callback
1889 (+) Compare register write complete Callback
1890 (+) Auto-reload register write complete Callback
1891 (+) Up-counting direction change Callback
1892 (+) Down-counting direction change Callback
1893
1894 @endverbatim
1895 * @{
1896 */
1897
1898 /**
1899 * @brief Handle LPTIM interrupt request.
1900 * @param hlptim LPTIM handle
1901 * @retval None
1902 */
HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef * hlptim)1903 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
1904 {
1905 /* Compare match interrupt */
1906 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPM) != RESET)
1907 {
1908 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPM) != RESET)
1909 {
1910 /* Clear Compare match flag */
1911 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPM);
1912
1913 /* Compare match Callback */
1914 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1915 hlptim->CompareMatchCallback(hlptim);
1916 #else
1917 HAL_LPTIM_CompareMatchCallback(hlptim);
1918 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1919 }
1920 }
1921
1922 /* Autoreload match interrupt */
1923 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARRM) != RESET)
1924 {
1925 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARRM) != RESET)
1926 {
1927 /* Clear Autoreload match flag */
1928 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARRM);
1929
1930 /* Autoreload match Callback */
1931 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1932 hlptim->AutoReloadMatchCallback(hlptim);
1933 #else
1934 HAL_LPTIM_AutoReloadMatchCallback(hlptim);
1935 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1936 }
1937 }
1938
1939 /* Trigger detected interrupt */
1940 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_EXTTRIG) != RESET)
1941 {
1942 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_EXTTRIG) != RESET)
1943 {
1944 /* Clear Trigger detected flag */
1945 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_EXTTRIG);
1946
1947 /* Trigger detected callback */
1948 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1949 hlptim->TriggerCallback(hlptim);
1950 #else
1951 HAL_LPTIM_TriggerCallback(hlptim);
1952 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1953 }
1954 }
1955
1956 /* Compare write interrupt */
1957 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPOK) != RESET)
1958 {
1959 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPOK) != RESET)
1960 {
1961 /* Clear Compare write flag */
1962 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1963
1964 /* Compare write Callback */
1965 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1966 hlptim->CompareWriteCallback(hlptim);
1967 #else
1968 HAL_LPTIM_CompareWriteCallback(hlptim);
1969 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1970 }
1971 }
1972
1973 /* Autoreload write interrupt */
1974 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARROK) != RESET)
1975 {
1976 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARROK) != RESET)
1977 {
1978 /* Clear Autoreload write flag */
1979 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1980
1981 /* Autoreload write Callback */
1982 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1983 hlptim->AutoReloadWriteCallback(hlptim);
1984 #else
1985 HAL_LPTIM_AutoReloadWriteCallback(hlptim);
1986 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1987 }
1988 }
1989
1990 /* Direction counter changed from Down to Up interrupt */
1991 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UP) != RESET)
1992 {
1993 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UP) != RESET)
1994 {
1995 /* Clear Direction counter changed from Down to Up flag */
1996 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UP);
1997
1998 /* Direction counter changed from Down to Up Callback */
1999 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2000 hlptim->DirectionUpCallback(hlptim);
2001 #else
2002 HAL_LPTIM_DirectionUpCallback(hlptim);
2003 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2004 }
2005 }
2006
2007 /* Direction counter changed from Up to Down interrupt */
2008 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_DOWN) != RESET)
2009 {
2010 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_DOWN) != RESET)
2011 {
2012 /* Clear Direction counter changed from Up to Down flag */
2013 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_DOWN);
2014
2015 /* Direction counter changed from Up to Down Callback */
2016 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2017 hlptim->DirectionDownCallback(hlptim);
2018 #else
2019 HAL_LPTIM_DirectionDownCallback(hlptim);
2020 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2021 }
2022 }
2023 #if defined(LPTIM_RCR_REP)
2024
2025 /* Repetition counter underflowed (or contains zero) and the LPTIM counter
2026 overflowed */
2027 if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UPDATE) != RESET)
2028 {
2029 if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UPDATE) != RESET)
2030 {
2031 /* Clear update event flag */
2032 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UPDATE);
2033
2034 /* Update event Callback */
2035 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2036 hlptim->UpdateEventCallback(hlptim);
2037 #else
2038 HAL_LPTIM_UpdateEventCallback(hlptim);
2039 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2040 }
2041 }
2042
2043 /* Successful APB bus write to repetition counter register */
2044 if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_REPOK) != RESET)
2045 {
2046 if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_REPOK) != RESET)
2047 {
2048 /* Clear successful APB bus write to repetition counter flag */
2049 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_REPOK);
2050
2051 /* Successful APB bus write to repetition counter Callback */
2052 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2053 hlptim->RepCounterWriteCallback(hlptim);
2054 #else
2055 HAL_LPTIM_RepCounterWriteCallback(hlptim);
2056 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2057 }
2058 }
2059 #endif
2060 }
2061
2062 /**
2063 * @brief Compare match callback in non-blocking mode.
2064 * @param hlptim LPTIM handle
2065 * @retval None
2066 */
HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef * hlptim)2067 __weak void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
2068 {
2069 /* Prevent unused argument(s) compilation warning */
2070 UNUSED(hlptim);
2071
2072 /* NOTE : This function should not be modified, when the callback is needed,
2073 the HAL_LPTIM_CompareMatchCallback could be implemented in the user file
2074 */
2075 }
2076
2077 /**
2078 * @brief Autoreload match callback in non-blocking mode.
2079 * @param hlptim LPTIM handle
2080 * @retval None
2081 */
HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef * hlptim)2082 __weak void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
2083 {
2084 /* Prevent unused argument(s) compilation warning */
2085 UNUSED(hlptim);
2086
2087 /* NOTE : This function should not be modified, when the callback is needed,
2088 the HAL_LPTIM_AutoReloadMatchCallback could be implemented in the user file
2089 */
2090 }
2091
2092 /**
2093 * @brief Trigger detected callback in non-blocking mode.
2094 * @param hlptim LPTIM handle
2095 * @retval None
2096 */
HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef * hlptim)2097 __weak void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim)
2098 {
2099 /* Prevent unused argument(s) compilation warning */
2100 UNUSED(hlptim);
2101
2102 /* NOTE : This function should not be modified, when the callback is needed,
2103 the HAL_LPTIM_TriggerCallback could be implemented in the user file
2104 */
2105 }
2106
2107 /**
2108 * @brief Compare write callback in non-blocking mode.
2109 * @param hlptim LPTIM handle
2110 * @retval None
2111 */
HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef * hlptim)2112 __weak void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim)
2113 {
2114 /* Prevent unused argument(s) compilation warning */
2115 UNUSED(hlptim);
2116
2117 /* NOTE : This function should not be modified, when the callback is needed,
2118 the HAL_LPTIM_CompareWriteCallback could be implemented in the user file
2119 */
2120 }
2121
2122 /**
2123 * @brief Autoreload write callback in non-blocking mode.
2124 * @param hlptim LPTIM handle
2125 * @retval None
2126 */
HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef * hlptim)2127 __weak void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim)
2128 {
2129 /* Prevent unused argument(s) compilation warning */
2130 UNUSED(hlptim);
2131
2132 /* NOTE : This function should not be modified, when the callback is needed,
2133 the HAL_LPTIM_AutoReloadWriteCallback could be implemented in the user file
2134 */
2135 }
2136
2137 /**
2138 * @brief Direction counter changed from Down to Up callback in non-blocking mode.
2139 * @param hlptim LPTIM handle
2140 * @retval None
2141 */
HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef * hlptim)2142 __weak void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim)
2143 {
2144 /* Prevent unused argument(s) compilation warning */
2145 UNUSED(hlptim);
2146
2147 /* NOTE : This function should not be modified, when the callback is needed,
2148 the HAL_LPTIM_DirectionUpCallback could be implemented in the user file
2149 */
2150 }
2151
2152 /**
2153 * @brief Direction counter changed from Up to Down callback in non-blocking mode.
2154 * @param hlptim LPTIM handle
2155 * @retval None
2156 */
HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef * hlptim)2157 __weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim)
2158 {
2159 /* Prevent unused argument(s) compilation warning */
2160 UNUSED(hlptim);
2161
2162 /* NOTE : This function should not be modified, when the callback is needed,
2163 the HAL_LPTIM_DirectionDownCallback could be implemented in the user file
2164 */
2165 }
2166 #if defined(LPTIM_RCR_REP)
2167
2168 /**
2169 * @brief Repetition counter underflowed (or contains zero) and LPTIM counter overflowed callback in non-blocking mode.
2170 * @param hlptim LPTIM handle
2171 * @retval None
2172 */
HAL_LPTIM_UpdateEventCallback(LPTIM_HandleTypeDef * hlptim)2173 __weak void HAL_LPTIM_UpdateEventCallback(LPTIM_HandleTypeDef *hlptim)
2174 {
2175 /* Prevent unused argument(s) compilation warning */
2176 UNUSED(hlptim);
2177
2178 /* NOTE : This function should not be modified, when the callback is needed,
2179 the HAL_LPTIM_UpdateEventCallback could be implemented in the user file
2180 */
2181 }
2182
2183 /**
2184 * @brief Successful APB bus write to repetition counter register callback in non-blocking mode.
2185 * @param hlptim LPTIM handle
2186 * @retval None
2187 */
HAL_LPTIM_RepCounterWriteCallback(LPTIM_HandleTypeDef * hlptim)2188 __weak void HAL_LPTIM_RepCounterWriteCallback(LPTIM_HandleTypeDef *hlptim)
2189 {
2190 /* Prevent unused argument(s) compilation warning */
2191 UNUSED(hlptim);
2192
2193 /* NOTE : This function should not be modified, when the callback is needed,
2194 the HAL_LPTIM_RepCounterWriteCallback could be implemented in the user file
2195 */
2196 }
2197 #endif
2198
2199 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2200 /**
2201 * @brief Register a User LPTIM callback to be used instead of the weak predefined callback
2202 * @param hlptim LPTIM handle
2203 * @param CallbackID ID of the callback to be registered
2204 * This parameter can be one of the following values:
2205 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
2206 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
2207 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
2208 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2209 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
2210 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
2211 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2212 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
2213 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
2214 * @arg @ref HAL_LPTIM_UPDATE_EVENT_CB_ID Update event detection Callback ID (when available)
2215 * @arg @ref HAL_LPTIM_REP_COUNTER_WRITE_CB_ID Repetition counter register write complete Callback ID (when available)
2216 * @param pCallback pointer to the callback function
2217 * @retval status
2218 */
HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef * hlptim,HAL_LPTIM_CallbackIDTypeDef CallbackID,pLPTIM_CallbackTypeDef pCallback)2219 HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *hlptim,
2220 HAL_LPTIM_CallbackIDTypeDef CallbackID,
2221 pLPTIM_CallbackTypeDef pCallback)
2222 {
2223 HAL_StatusTypeDef status = HAL_OK;
2224
2225 if (pCallback == NULL)
2226 {
2227 return HAL_ERROR;
2228 }
2229
2230 /* Process locked */
2231 __HAL_LOCK(hlptim);
2232
2233 if (hlptim->State == HAL_LPTIM_STATE_READY)
2234 {
2235 switch (CallbackID)
2236 {
2237 case HAL_LPTIM_MSPINIT_CB_ID :
2238 hlptim->MspInitCallback = pCallback;
2239 break;
2240
2241 case HAL_LPTIM_MSPDEINIT_CB_ID :
2242 hlptim->MspDeInitCallback = pCallback;
2243 break;
2244
2245 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2246 hlptim->CompareMatchCallback = pCallback;
2247 break;
2248
2249 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2250 hlptim->AutoReloadMatchCallback = pCallback;
2251 break;
2252
2253 case HAL_LPTIM_TRIGGER_CB_ID :
2254 hlptim->TriggerCallback = pCallback;
2255 break;
2256
2257 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2258 hlptim->CompareWriteCallback = pCallback;
2259 break;
2260
2261 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2262 hlptim->AutoReloadWriteCallback = pCallback;
2263 break;
2264
2265 case HAL_LPTIM_DIRECTION_UP_CB_ID :
2266 hlptim->DirectionUpCallback = pCallback;
2267 break;
2268
2269 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2270 hlptim->DirectionDownCallback = pCallback;
2271 break;
2272 #if defined(LPTIM_RCR_REP)
2273
2274 case HAL_LPTIM_UPDATE_EVENT_CB_ID :
2275 hlptim->UpdateEventCallback = pCallback;
2276 break;
2277
2278 case HAL_LPTIM_REP_COUNTER_WRITE_CB_ID :
2279 hlptim->RepCounterWriteCallback = pCallback;
2280 break;
2281 #endif
2282
2283 default :
2284 /* Return error status */
2285 status = HAL_ERROR;
2286 break;
2287 }
2288 }
2289 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2290 {
2291 switch (CallbackID)
2292 {
2293 case HAL_LPTIM_MSPINIT_CB_ID :
2294 hlptim->MspInitCallback = pCallback;
2295 break;
2296
2297 case HAL_LPTIM_MSPDEINIT_CB_ID :
2298 hlptim->MspDeInitCallback = pCallback;
2299 break;
2300
2301 default :
2302 /* Return error status */
2303 status = HAL_ERROR;
2304 break;
2305 }
2306 }
2307 else
2308 {
2309 /* Return error status */
2310 status = HAL_ERROR;
2311 }
2312
2313 /* Release Lock */
2314 __HAL_UNLOCK(hlptim);
2315
2316 return status;
2317 }
2318
2319 /**
2320 * @brief Unregister a LPTIM callback
2321 * LLPTIM callback is redirected to the weak predefined callback
2322 * @param hlptim LPTIM handle
2323 * @param CallbackID ID of the callback to be unregistered
2324 * This parameter can be one of the following values:
2325 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
2326 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
2327 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
2328 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2329 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
2330 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
2331 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2332 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
2333 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
2334 * @arg @ref HAL_LPTIM_UPDATE_EVENT_CB_ID Update event detection Callback ID (when available)
2335 * @arg @ref HAL_LPTIM_REP_COUNTER_WRITE_CB_ID Repetition counter register write complete Callback ID (when available)
2336 * @retval status
2337 */
HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef * hlptim,HAL_LPTIM_CallbackIDTypeDef CallbackID)2338 HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *hlptim,
2339 HAL_LPTIM_CallbackIDTypeDef CallbackID)
2340 {
2341 HAL_StatusTypeDef status = HAL_OK;
2342
2343 /* Process locked */
2344 __HAL_LOCK(hlptim);
2345
2346 if (hlptim->State == HAL_LPTIM_STATE_READY)
2347 {
2348 switch (CallbackID)
2349 {
2350 case HAL_LPTIM_MSPINIT_CB_ID :
2351 hlptim->MspInitCallback = HAL_LPTIM_MspInit; /* Legacy weak MspInit Callback */
2352 break;
2353
2354 case HAL_LPTIM_MSPDEINIT_CB_ID :
2355 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; /* Legacy weak Msp DeInit Callback */
2356 break;
2357
2358 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2359 hlptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback; /* Legacy weak Compare match Callback */
2360 break;
2361
2362 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2363 hlptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback; /* Legacy weak Auto-reload match Callback */
2364 break;
2365
2366 case HAL_LPTIM_TRIGGER_CB_ID :
2367 hlptim->TriggerCallback = HAL_LPTIM_TriggerCallback; /* Legacy weak External trigger event detection Callback */
2368 break;
2369
2370 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2371 hlptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback; /* Legacy weak Compare register write complete Callback */
2372 break;
2373
2374 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2375 hlptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback; /* Legacy weak Auto-reload register write complete Callback */
2376 break;
2377
2378 case HAL_LPTIM_DIRECTION_UP_CB_ID :
2379 hlptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback; /* Legacy weak Up-counting direction change Callback */
2380 break;
2381
2382 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2383 hlptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback; /* Legacy weak Down-counting direction change Callback */
2384 break;
2385 #if defined(LPTIM_RCR_REP)
2386
2387 case HAL_LPTIM_UPDATE_EVENT_CB_ID :
2388 hlptim->UpdateEventCallback = HAL_LPTIM_UpdateEventCallback; /* Legacy weak Update event detection Callback */
2389 break;
2390
2391 case HAL_LPTIM_REP_COUNTER_WRITE_CB_ID :
2392 hlptim->RepCounterWriteCallback = HAL_LPTIM_RepCounterWriteCallback; /* Legacy weak Repetition counter register write complete Callback */
2393 break;
2394 #endif
2395
2396 default :
2397 /* Return error status */
2398 status = HAL_ERROR;
2399 break;
2400 }
2401 }
2402 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2403 {
2404 switch (CallbackID)
2405 {
2406 case HAL_LPTIM_MSPINIT_CB_ID :
2407 hlptim->MspInitCallback = HAL_LPTIM_MspInit; /* Legacy weak MspInit Callback */
2408 break;
2409
2410 case HAL_LPTIM_MSPDEINIT_CB_ID :
2411 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; /* Legacy weak Msp DeInit Callback */
2412 break;
2413
2414 default :
2415 /* Return error status */
2416 status = HAL_ERROR;
2417 break;
2418 }
2419 }
2420 else
2421 {
2422 /* Return error status */
2423 status = HAL_ERROR;
2424 }
2425
2426 /* Release Lock */
2427 __HAL_UNLOCK(hlptim);
2428
2429 return status;
2430 }
2431 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2432
2433 /**
2434 * @}
2435 */
2436
2437 /** @defgroup LPTIM_Group5 Peripheral State functions
2438 * @brief Peripheral State functions.
2439 *
2440 @verbatim
2441 ==============================================================================
2442 ##### Peripheral State functions #####
2443 ==============================================================================
2444 [..]
2445 This subsection permits to get in run-time the status of the peripheral.
2446
2447 @endverbatim
2448 * @{
2449 */
2450
2451 /**
2452 * @brief Return the LPTIM handle state.
2453 * @param hlptim LPTIM handle
2454 * @retval HAL state
2455 */
HAL_LPTIM_GetState(LPTIM_HandleTypeDef * hlptim)2456 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim)
2457 {
2458 /* Return LPTIM handle state */
2459 return hlptim->State;
2460 }
2461
2462 /**
2463 * @}
2464 */
2465
2466
2467 /**
2468 * @}
2469 */
2470
2471 /* Private functions ---------------------------------------------------------*/
2472
2473 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions
2474 * @{
2475 */
2476 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2477 /**
2478 * @brief Reset interrupt callbacks to the legacy weak callbacks.
2479 * @param lptim pointer to a LPTIM_HandleTypeDef structure that contains
2480 * the configuration information for LPTIM module.
2481 * @retval None
2482 */
LPTIM_ResetCallback(LPTIM_HandleTypeDef * lptim)2483 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim)
2484 {
2485 /* Reset the LPTIM callback to the legacy weak callbacks */
2486 lptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback; /* Compare match Callback */
2487 lptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback; /* Auto-reload match Callback */
2488 lptim->TriggerCallback = HAL_LPTIM_TriggerCallback; /* External trigger event detection Callback */
2489 lptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback; /* Compare register write complete Callback */
2490 lptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback; /* Auto-reload register write complete Callback */
2491 lptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback; /* Up-counting direction change Callback */
2492 lptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback; /* Down-counting direction change Callback */
2493 #if defined(LPTIM_RCR_REP)
2494 lptim->UpdateEventCallback = HAL_LPTIM_UpdateEventCallback; /* Update event detection Callback */
2495 lptim->RepCounterWriteCallback = HAL_LPTIM_RepCounterWriteCallback; /* Repetition counter register write complete Callback */
2496 #endif
2497 }
2498 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2499
2500 /**
2501 * @brief LPTimer Wait for flag set
2502 * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2503 * the configuration information for LPTIM module.
2504 * @param flag The lptim flag
2505 * @retval HAL status
2506 */
LPTIM_WaitForFlag(LPTIM_HandleTypeDef * hlptim,uint32_t flag)2507 static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag)
2508 {
2509 HAL_StatusTypeDef result = HAL_OK;
2510 uint32_t count = TIMEOUT * (SystemCoreClock / 20UL / 1000UL);
2511 do
2512 {
2513 count--;
2514 if (count == 0UL)
2515 {
2516 result = HAL_TIMEOUT;
2517 }
2518 }
2519 while((!(__HAL_LPTIM_GET_FLAG((hlptim), (flag)))) && (count != 0UL));
2520
2521 return result;
2522 }
2523
2524 /**
2525 * @brief Disable LPTIM HW instance.
2526 * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2527 * the configuration information for LPTIM module.
2528 * @note The following sequence is required to solve LPTIM disable HW limitation.
2529 * Please check Errata Sheet ES0335 for more details under "MCU may remain
2530 * stuck in LPTIM interrupt when entering Stop mode" section.
2531 * @retval None
2532 */
LPTIM_Disable(LPTIM_HandleTypeDef * hlptim)2533 void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim)
2534 {
2535 uint32_t tmpclksource = 0;
2536 uint32_t tmpIER;
2537 uint32_t tmpCFGR;
2538 uint32_t tmpCMP;
2539 uint32_t tmpARR;
2540 uint32_t tmpOR;
2541 #if defined(LPTIM_RCR_REP)
2542 uint32_t tmpRCR;
2543 #endif
2544
2545 __disable_irq();
2546
2547 /*********** Save LPTIM Config ***********/
2548 /* Save LPTIM source clock */
2549 switch ((uint32_t)hlptim->Instance)
2550 {
2551 case LPTIM1_BASE:
2552 tmpclksource = __HAL_RCC_GET_LPTIM1_SOURCE();
2553 break;
2554 #if defined(LPTIM2)
2555 case LPTIM2_BASE:
2556 tmpclksource = __HAL_RCC_GET_LPTIM2_SOURCE();
2557 break;
2558 #endif /* LPTIM2 */
2559 default:
2560 break;
2561 }
2562
2563 /* Save LPTIM configuration registers */
2564 tmpIER = hlptim->Instance->IER;
2565 tmpCFGR = hlptim->Instance->CFGR;
2566 tmpCMP = hlptim->Instance->CMP;
2567 tmpARR = hlptim->Instance->ARR;
2568 tmpOR = hlptim->Instance->OR;
2569 #if defined(LPTIM_RCR_REP)
2570 tmpRCR = hlptim->Instance->RCR;
2571 #endif
2572
2573 /*********** Reset LPTIM ***********/
2574 switch ((uint32_t)hlptim->Instance)
2575 {
2576 case LPTIM1_BASE:
2577 __HAL_RCC_LPTIM1_FORCE_RESET();
2578 __HAL_RCC_LPTIM1_RELEASE_RESET();
2579 break;
2580 #if defined(LPTIM2)
2581 case LPTIM2_BASE:
2582 __HAL_RCC_LPTIM2_FORCE_RESET();
2583 __HAL_RCC_LPTIM2_RELEASE_RESET();
2584 break;
2585 #endif /* LPTIM2 */
2586 default:
2587 break;
2588 }
2589
2590 /*********** Restore LPTIM Config ***********/
2591 #if defined(LPTIM_RCR_REP)
2592 if ((tmpCMP != 0UL) || (tmpARR != 0UL) || (tmpRCR != 0UL))
2593 #else
2594 if ((tmpCMP != 0UL) || (tmpARR != 0UL))
2595 #endif
2596 {
2597 /* Force LPTIM source kernel clock from APB */
2598 switch ((uint32_t)hlptim->Instance)
2599 {
2600 case LPTIM1_BASE:
2601 __HAL_RCC_LPTIM1_CONFIG(RCC_LPTIM1CLKSOURCE_PCLK1);
2602 break;
2603 #if defined(LPTIM2)
2604 case LPTIM2_BASE:
2605 __HAL_RCC_LPTIM2_CONFIG(RCC_LPTIM2CLKSOURCE_PCLK1);
2606 break;
2607 #endif /* LPTIM2 */
2608 default:
2609 break;
2610 }
2611
2612 if (tmpCMP != 0UL)
2613 {
2614 /* Restore CMP register (LPTIM should be enabled first) */
2615 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2616 hlptim->Instance->CMP = tmpCMP;
2617
2618 /* Wait for the completion of the write operation to the LPTIM_CMP register */
2619 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
2620 {
2621 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2622 }
2623 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
2624 }
2625
2626 if (tmpARR != 0UL)
2627 {
2628 /* Restore ARR register (LPTIM should be enabled first) */
2629 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2630 hlptim->Instance->ARR = tmpARR;
2631
2632 /* Wait for the completion of the write operation to the LPTIM_ARR register */
2633 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
2634 {
2635 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2636 }
2637
2638 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
2639 }
2640 #if defined(LPTIM_RCR_REP)
2641
2642 if (tmpRCR != 0UL)
2643 {
2644 /* Restore RCR register (LPTIM should be enabled first) */
2645 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2646 hlptim->Instance->RCR = tmpRCR;
2647
2648 /* Wait for the completion of the write operation to the LPTIM_RCR register */
2649 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_REPOK) == HAL_TIMEOUT)
2650 {
2651 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2652 }
2653 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_REPOK);
2654 }
2655 #endif
2656
2657 /* Restore LPTIM source kernel clock */
2658 switch ((uint32_t)hlptim->Instance)
2659 {
2660 case LPTIM1_BASE:
2661 __HAL_RCC_LPTIM1_CONFIG(tmpclksource);
2662 break;
2663 #if defined(LPTIM2)
2664 case LPTIM2_BASE:
2665 __HAL_RCC_LPTIM2_CONFIG(tmpclksource);
2666 break;
2667 #endif /* LPTIM2 */
2668 default:
2669 break;
2670 }
2671 }
2672
2673 /* Restore configuration registers (LPTIM should be disabled first) */
2674 hlptim->Instance->CR &= ~(LPTIM_CR_ENABLE);
2675 hlptim->Instance->IER = tmpIER;
2676 hlptim->Instance->CFGR = tmpCFGR;
2677 hlptim->Instance->OR = tmpOR;
2678
2679 __enable_irq();
2680 }
2681 /**
2682 * @}
2683 */
2684 #endif /* LPTIM1 || LPTIM2 */
2685
2686 #endif /* HAL_LPTIM_MODULE_ENABLED */
2687 /**
2688 * @}
2689 */
2690
2691 /**
2692 * @}
2693 */
2694
2695 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
2696