1# SPDX-License-Identifier: (GPL-2.0 OR MIT)
2# Copyright 2019 Linaro Ltd.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: QCOM SoC Temperature Sensor (TSENS)
9
10maintainers:
11  - Amit Kucheria <[email protected]>
12
13description: |
14  QCOM SoCs have TSENS IP to allow temperature measurement. There are currently
15  three distinct major versions of the IP that is supported by a single driver.
16  The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures
17  everything before v1 when there was no versioning information.
18
19properties:
20  compatible:
21    oneOf:
22      - description: msm8960 TSENS based
23        items:
24          - enum:
25              - qcom,ipq8064-tsens
26              - qcom,msm8960-tsens
27
28      - description: v0.1 of TSENS
29        items:
30          - enum:
31              - qcom,mdm9607-tsens
32              - qcom,msm8226-tsens
33              - qcom,msm8909-tsens
34              - qcom,msm8916-tsens
35              - qcom,msm8939-tsens
36              - qcom,msm8974-tsens
37          - const: qcom,tsens-v0_1
38
39      - description: v1 of TSENS
40        items:
41          - enum:
42              - qcom,msm8937-tsens
43              - qcom,msm8956-tsens
44              - qcom,msm8976-tsens
45              - qcom,qcs404-tsens
46          - const: qcom,tsens-v1
47
48      - description: v2 of TSENS
49        items:
50          - enum:
51              - qcom,msm8953-tsens
52              - qcom,msm8996-tsens
53              - qcom,msm8998-tsens
54              - qcom,qcm2290-tsens
55              - qcom,sa8255p-tsens
56              - qcom,sa8775p-tsens
57              - qcom,sar2130p-tsens
58              - qcom,sc7180-tsens
59              - qcom,sc7280-tsens
60              - qcom,sc8180x-tsens
61              - qcom,sc8280xp-tsens
62              - qcom,sdm630-tsens
63              - qcom,sdm845-tsens
64              - qcom,sm6115-tsens
65              - qcom,sm6350-tsens
66              - qcom,sm6375-tsens
67              - qcom,sm8150-tsens
68              - qcom,sm8250-tsens
69              - qcom,sm8350-tsens
70              - qcom,sm8450-tsens
71              - qcom,sm8550-tsens
72              - qcom,sm8650-tsens
73              - qcom,x1e80100-tsens
74          - const: qcom,tsens-v2
75
76      - description: v2 of TSENS with combined interrupt
77        enum:
78          - qcom,ipq8074-tsens
79
80      - description: v2 of TSENS with combined interrupt
81        items:
82          - enum:
83              - qcom,ipq6018-tsens
84              - qcom,ipq9574-tsens
85          - const: qcom,ipq8074-tsens
86
87  reg:
88    items:
89      - description: TM registers
90      - description: SROT registers
91
92  interrupts:
93    minItems: 1
94    maxItems: 2
95
96  interrupt-names:
97    minItems: 1
98    maxItems: 2
99
100  nvmem-cells:
101    oneOf:
102      - minItems: 1
103        maxItems: 2
104        description:
105          Reference to an nvmem node for the calibration data
106      - minItems: 5
107        maxItems: 35
108        description: |
109          Reference to nvmem cells for the calibration mode, two calibration
110          bases and two cells per each sensor
111        # special case for msm8974 / apq8084
112      - maxItems: 51
113        description: |
114          Reference to nvmem cells for the calibration mode, two calibration
115          bases and two cells per each sensor, main and backup copies, plus use_backup cell
116
117  nvmem-cell-names:
118    oneOf:
119      - minItems: 1
120        items:
121          - const: calib
122          - enum:
123              - calib_backup
124              - calib_sel
125      - minItems: 5
126        items:
127          - const: mode
128          - const: base1
129          - const: base2
130          - pattern: '^s[0-9]+_p1$'
131          - pattern: '^s[0-9]+_p2$'
132          - pattern: '^s[0-9]+_p1$'
133          - pattern: '^s[0-9]+_p2$'
134          - pattern: '^s[0-9]+_p1$'
135          - pattern: '^s[0-9]+_p2$'
136          - pattern: '^s[0-9]+_p1$'
137          - pattern: '^s[0-9]+_p2$'
138          - pattern: '^s[0-9]+_p1$'
139          - pattern: '^s[0-9]+_p2$'
140          - pattern: '^s[0-9]+_p1$'
141          - pattern: '^s[0-9]+_p2$'
142          - pattern: '^s[0-9]+_p1$'
143          - pattern: '^s[0-9]+_p2$'
144          - pattern: '^s[0-9]+_p1$'
145          - pattern: '^s[0-9]+_p2$'
146          - pattern: '^s[0-9]+_p1$'
147          - pattern: '^s[0-9]+_p2$'
148          - pattern: '^s[0-9]+_p1$'
149          - pattern: '^s[0-9]+_p2$'
150          - pattern: '^s[0-9]+_p1$'
151          - pattern: '^s[0-9]+_p2$'
152          - pattern: '^s[0-9]+_p1$'
153          - pattern: '^s[0-9]+_p2$'
154          - pattern: '^s[0-9]+_p1$'
155          - pattern: '^s[0-9]+_p2$'
156          - pattern: '^s[0-9]+_p1$'
157          - pattern: '^s[0-9]+_p2$'
158          - pattern: '^s[0-9]+_p1$'
159          - pattern: '^s[0-9]+_p2$'
160          - pattern: '^s[0-9]+_p1$'
161          - pattern: '^s[0-9]+_p2$'
162        # special case for msm8974 / apq8084
163      - items:
164          - const: mode
165          - const: base1
166          - const: base2
167          - const: use_backup
168          - const: mode_backup
169          - const: base1_backup
170          - const: base2_backup
171          - const: s0_p1
172          - const: s0_p2
173          - const: s1_p1
174          - const: s1_p2
175          - const: s2_p1
176          - const: s2_p2
177          - const: s3_p1
178          - const: s3_p2
179          - const: s4_p1
180          - const: s4_p2
181          - const: s5_p1
182          - const: s5_p2
183          - const: s6_p1
184          - const: s6_p2
185          - const: s7_p1
186          - const: s7_p2
187          - const: s8_p1
188          - const: s8_p2
189          - const: s9_p1
190          - const: s9_p2
191          - const: s10_p1
192          - const: s10_p2
193          - const: s0_p1_backup
194          - const: s0_p2_backup
195          - const: s1_p1_backup
196          - const: s1_p2_backup
197          - const: s2_p1_backup
198          - const: s2_p2_backup
199          - const: s3_p1_backup
200          - const: s3_p2_backup
201          - const: s4_p1_backup
202          - const: s4_p2_backup
203          - const: s5_p1_backup
204          - const: s5_p2_backup
205          - const: s6_p1_backup
206          - const: s6_p2_backup
207          - const: s7_p1_backup
208          - const: s7_p2_backup
209          - const: s8_p1_backup
210          - const: s8_p2_backup
211          - const: s9_p1_backup
212          - const: s9_p2_backup
213          - const: s10_p1_backup
214          - const: s10_p2_backup
215
216  "#qcom,sensors":
217    description:
218      Number of sensors enabled on this platform
219    $ref: /schemas/types.yaml#/definitions/uint32
220    minimum: 1
221    maximum: 16
222
223  "#thermal-sensor-cells":
224    const: 1
225
226required:
227  - compatible
228  - interrupts
229  - interrupt-names
230  - "#qcom,sensors"
231
232allOf:
233  - $ref: thermal-sensor.yaml#
234
235  - if:
236      properties:
237        compatible:
238          contains:
239            enum:
240              - qcom,ipq8064-tsens
241              - qcom,msm8960-tsens
242              - qcom,tsens-v0_1
243              - qcom,tsens-v1
244    then:
245      properties:
246        interrupts:
247          items:
248            - description: Combined interrupt if upper or lower threshold crossed
249        interrupt-names:
250          items:
251            - const: uplow
252
253  - if:
254      properties:
255        compatible:
256          contains:
257            const: qcom,tsens-v2
258    then:
259      properties:
260        interrupts:
261          items:
262            - description: Combined interrupt if upper or lower threshold crossed
263            - description: Interrupt if critical threshold crossed
264        interrupt-names:
265          items:
266            - const: uplow
267            - const: critical
268
269  - if:
270      properties:
271        compatible:
272          contains:
273            enum:
274              - qcom,ipq8074-tsens
275    then:
276      properties:
277        interrupts:
278          items:
279            - description: Combined interrupt if upper, lower or critical thresholds crossed
280        interrupt-names:
281          items:
282            - const: combined
283
284  - if:
285      properties:
286        compatible:
287          contains:
288            enum:
289              - qcom,ipq8074-tsens
290              - qcom,tsens-v0_1
291              - qcom,tsens-v1
292              - qcom,tsens-v2
293
294    then:
295      required:
296        - reg
297
298unevaluatedProperties: false
299
300examples:
301  - |
302    #include <dt-bindings/interrupt-controller/arm-gic.h>
303    thermal-sensor {
304        compatible = "qcom,ipq8064-tsens";
305
306        nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
307        nvmem-cell-names = "calib", "calib_backup";
308        interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
309        interrupt-names = "uplow";
310
311        #qcom,sensors = <11>;
312        #thermal-sensor-cells = <1>;
313    };
314
315  - |
316    #include <dt-bindings/interrupt-controller/arm-gic.h>
317    // Example 1 (new calibration data: for pre v1 IP):
318    thermal-sensor@4a9000 {
319        compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
320        reg = <0x4a9000 0x1000>, /* TM */
321              <0x4a8000 0x1000>; /* SROT */
322
323        nvmem-cells = <&tsens_mode>,
324                      <&tsens_base1>, <&tsens_base2>,
325                      <&tsens_s0_p1>, <&tsens_s0_p2>,
326                      <&tsens_s1_p1>, <&tsens_s1_p2>,
327                      <&tsens_s2_p1>, <&tsens_s2_p2>,
328                      <&tsens_s4_p1>, <&tsens_s4_p2>,
329                      <&tsens_s5_p1>, <&tsens_s5_p2>;
330        nvmem-cell-names = "mode",
331                           "base1", "base2",
332                           "s0_p1", "s0_p2",
333                           "s1_p1", "s1_p2",
334                           "s2_p1", "s2_p2",
335                           "s4_p1", "s4_p2",
336                           "s5_p1", "s5_p2";
337
338        interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
339        interrupt-names = "uplow";
340
341        #qcom,sensors = <5>;
342        #thermal-sensor-cells = <1>;
343    };
344
345  - |
346    #include <dt-bindings/interrupt-controller/arm-gic.h>
347    // Example 1 (legacy: for pre v1 IP):
348    tsens1: thermal-sensor@4a9000 {
349        compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
350        reg = <0x4a9000 0x1000>, /* TM */
351              <0x4a8000 0x1000>; /* SROT */
352
353        nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
354        nvmem-cell-names = "calib", "calib_sel";
355
356        interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
357        interrupt-names = "uplow";
358
359        #qcom,sensors = <5>;
360        #thermal-sensor-cells = <1>;
361    };
362
363  - |
364    #include <dt-bindings/interrupt-controller/arm-gic.h>
365    // Example 2 (for any platform containing v1 of the TSENS IP):
366    tsens2: thermal-sensor@4a9000 {
367        compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
368        reg = <0x004a9000 0x1000>, /* TM */
369              <0x004a8000 0x1000>; /* SROT */
370
371        nvmem-cells = <&tsens_caldata>;
372        nvmem-cell-names = "calib";
373
374        interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
375        interrupt-names = "uplow";
376
377        #qcom,sensors = <10>;
378        #thermal-sensor-cells = <1>;
379    };
380
381  - |
382    #include <dt-bindings/interrupt-controller/arm-gic.h>
383    // Example 3 (for any platform containing v2 of the TSENS IP):
384    tsens3: thermal-sensor@c263000 {
385        compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
386        reg = <0xc263000 0x1ff>,
387              <0xc222000 0x1ff>;
388
389        interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
390                     <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
391        interrupt-names = "uplow", "critical";
392
393        #qcom,sensors = <13>;
394        #thermal-sensor-cells = <1>;
395    };
396
397  - |
398    #include <dt-bindings/interrupt-controller/arm-gic.h>
399    // Example 4 (for any IPQ8074 based SoC-s):
400    tsens4: thermal-sensor@4a9000 {
401        compatible = "qcom,ipq8074-tsens";
402        reg = <0x4a9000 0x1000>,
403              <0x4a8000 0x1000>;
404
405        interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
406        interrupt-names = "combined";
407
408        #qcom,sensors = <16>;
409        #thermal-sensor-cells = <1>;
410    };
411...
412