1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2024 Intel Corporation */ 3 4 #ifndef _QUICKI2C_DEV_H_ 5 #define _QUICKI2C_DEV_H_ 6 7 #include <linux/hid-over-i2c.h> 8 #include <linux/workqueue.h> 9 10 #define THC_LNL_DEVICE_ID_I2C_PORT1 0xA848 11 #define THC_LNL_DEVICE_ID_I2C_PORT2 0xA84A 12 #define THC_PTL_H_DEVICE_ID_I2C_PORT1 0xE348 13 #define THC_PTL_H_DEVICE_ID_I2C_PORT2 0xE34A 14 #define THC_PTL_U_DEVICE_ID_I2C_PORT1 0xE448 15 #define THC_PTL_U_DEVICE_ID_I2C_PORT2 0xE44A 16 17 /* Packet size value, the unit is 16 bytes */ 18 #define MAX_PACKET_SIZE_VALUE_LNL 256 19 20 /* HIDI2C special ACPI parameters DSD name */ 21 #define QUICKI2C_ACPI_METHOD_NAME_ICRS "ICRS" 22 #define QUICKI2C_ACPI_METHOD_NAME_ISUB "ISUB" 23 24 /* HIDI2C special ACPI parameters DSM methods */ 25 #define QUICKI2C_ACPI_REVISION_NUM 1 26 #define QUICKI2C_ACPI_FUNC_NUM_HID_DESC_ADDR 1 27 #define QUICKI2C_ACPI_FUNC_NUM_ACTIVE_LTR_VAL 1 28 #define QUICKI2C_ACPI_FUNC_NUM_LP_LTR_VAL 2 29 30 #define QUICKI2C_SUBIP_STANDARD_MODE_MAX_SPEED 100000 31 #define QUICKI2C_SUBIP_FAST_MODE_MAX_SPEED 400000 32 #define QUICKI2C_SUBIP_FASTPLUS_MODE_MAX_SPEED 1000000 33 #define QUICKI2C_SUBIP_HIGH_SPEED_MODE_MAX_SPEED 3400000 34 35 #define QUICKI2C_DEFAULT_ACTIVE_LTR_VALUE 5 36 #define QUICKI2C_DEFAULT_LP_LTR_VALUE 500 37 #define QUICKI2C_RPM_TIMEOUT_MS 500 38 39 /* 40 * THC uses runtime auto suspend to dynamically switch between THC active LTR 41 * and low power LTR to save CPU power. 42 * Default value is 5000ms, that means if no touch event in this time, THC will 43 * change to low power LTR mode. 44 */ 45 #define DEFAULT_AUTO_SUSPEND_DELAY_MS 5000 46 47 enum quicki2c_dev_state { 48 QUICKI2C_NONE, 49 QUICKI2C_RESETING, 50 QUICKI2C_RESETED, 51 QUICKI2C_INITED, 52 QUICKI2C_ENABLED, 53 QUICKI2C_DISABLED, 54 }; 55 56 enum { 57 HIDI2C_ADDRESSING_MODE_7BIT, 58 HIDI2C_ADDRESSING_MODE_10BIT, 59 }; 60 61 /** 62 * struct quicki2c_subip_acpi_parameter - QuickI2C ACPI DSD parameters 63 * @device_address: I2C device slave address 64 * @connection_speed: I2C device expected connection speed 65 * @addressing_mode: I2C device slave address mode, 7bit or 10bit 66 * 67 * Those properties get from QUICKI2C_ACPI_METHOD_NAME_ICRS method, used for 68 * Bus parameter. 69 */ 70 struct quicki2c_subip_acpi_parameter { 71 u16 device_address; 72 u64 connection_speed; 73 u8 addressing_mode; 74 } __packed; 75 76 /** 77 * struct quicki2c_subip_acpi_config - QuickI2C ACPI DSD parameters 78 * @SMHX: Standard Mode (100 kbit/s) Serial Clock Line HIGH Period 79 * @SMLX: Standard Mode (100 kbit/s) Serial Clock Line LOW Period 80 * @SMTD: Standard Mode (100 kbit/s) Serial Data Line Transmit Hold Period 81 * @SMRD: Standard Mode (100 kbit/s) Serial Data Receive Hold Period 82 * @FMHX: Fast Mode (400 kbit/s) Serial Clock Line HIGH Period 83 * @FMLX: Fast Mode (400 kbit/s) Serial Clock Line LOW Period 84 * @FMTD: Fast Mode (400 kbit/s) Serial Data Line Transmit Hold Period 85 * @FMRD: Fast Mode (400 kbit/s) Serial Data Line Receive Hold Period 86 * @FMSL: Maximum length (in ic_clk_cycles) of suppressed spikes 87 * in Standard Mode, Fast Mode and Fast Mode Plus 88 * @FPHX: Fast Mode Plus (1Mbit/sec) Serial Clock Line HIGH Period 89 * @FPLX: Fast Mode Plus (1Mbit/sec) Serial Clock Line LOW Period 90 * @FPTD: Fast Mode Plus (1Mbit/sec) Serial Data Line Transmit HOLD Period 91 * @FPRD: Fast Mode Plus (1Mbit/sec) Serial Data Line Receive HOLD Period 92 * @HMHX: High Speed Mode Plus (3.4Mbits/sec) Serial Clock Line HIGH Period 93 * @HMLX: High Speed Mode Plus (3.4Mbits/sec) Serial Clock Line LOW Period 94 * @HMTD: High Speed Mode Plus (3.4Mbits/sec) Serial Data Line Transmit HOLD Period 95 * @HMRD: High Speed Mode Plus (3.4Mbits/sec) Serial Data Line Receive HOLD Period 96 * @HMSL: Maximum length (in ic_clk_cycles) of suppressed spikes in High Speed Mode 97 * 98 * Those properties get from QUICKI2C_ACPI_METHOD_NAME_ISUB method, used for 99 * I2C timing configure. 100 */ 101 struct quicki2c_subip_acpi_config { 102 u64 SMHX; 103 u64 SMLX; 104 u64 SMTD; 105 u64 SMRD; 106 107 u64 FMHX; 108 u64 FMLX; 109 u64 FMTD; 110 u64 FMRD; 111 u64 FMSL; 112 113 u64 FPHX; 114 u64 FPLX; 115 u64 FPTD; 116 u64 FPRD; 117 118 u64 HMHX; 119 u64 HMLX; 120 u64 HMTD; 121 u64 HMRD; 122 u64 HMSL; 123 }; 124 125 struct device; 126 struct pci_dev; 127 struct thc_device; 128 struct hid_device; 129 struct acpi_device; 130 131 /** 132 * struct quicki2c_device - THC QuickI2C device struct 133 * @dev: point to kernel device 134 * @pdev: point to PCI device 135 * @thc_hw: point to THC device 136 * @hid_dev: point to hid device 137 * @acpi_dev: point to ACPI device 138 * @driver_data: point to quicki2c specific driver data 139 * @state: THC I2C device state 140 * @mem_addr: MMIO memory address 141 * @dev_desc: device descriptor for HIDI2C protocol 142 * @i2c_slave_addr: HIDI2C device slave address 143 * @hid_desc_addr: Register address for retrieve HID device descriptor 144 * @active_ltr_val: THC active LTR value 145 * @low_power_ltr_val: THC low power LTR value 146 * @i2c_speed_mode: 0 - standard mode, 1 - fast mode, 2 - fast mode plus 147 * @i2c_clock_hcnt: I2C CLK high period time (unit in cycle count) 148 * @i2c_clock_lcnt: I2C CLK low period time (unit in cycle count) 149 * @report_descriptor: store a copy of device report descriptor 150 * @input_buf: store a copy of latest input report data 151 * @report_buf: store a copy of latest input/output report packet from set/get feature 152 * @report_len: the length of input/output report packet 153 * @reset_ack_wq: workqueue for waiting reset response from device 154 * @reset_ack: indicate reset response received or not 155 */ 156 struct quicki2c_device { 157 struct device *dev; 158 struct pci_dev *pdev; 159 struct thc_device *thc_hw; 160 struct hid_device *hid_dev; 161 struct acpi_device *acpi_dev; 162 enum quicki2c_dev_state state; 163 164 void __iomem *mem_addr; 165 166 struct hidi2c_dev_descriptor dev_desc; 167 u8 i2c_slave_addr; 168 u16 hid_desc_addr; 169 170 u32 active_ltr_val; 171 u32 low_power_ltr_val; 172 173 u32 i2c_speed_mode; 174 u32 i2c_clock_hcnt; 175 u32 i2c_clock_lcnt; 176 177 u8 *report_descriptor; 178 u8 *input_buf; 179 u8 *report_buf; 180 u32 report_len; 181 182 wait_queue_head_t reset_ack_wq; 183 bool reset_ack; 184 }; 185 186 #endif /* _QUICKI2C_DEV_H_ */ 187