1 // SPDX-License-Identifier: BSD-3-Clause-Clear
2 /*
3  * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4  * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
5  */
6 #include <linux/skbuff.h>
7 #include <linux/ctype.h>
8 #include <net/mac80211.h>
9 #include <net/cfg80211.h>
10 #include <linux/completion.h>
11 #include <linux/if_ether.h>
12 #include <linux/types.h>
13 #include <linux/pci.h>
14 #include <linux/uuid.h>
15 #include <linux/time.h>
16 #include <linux/of.h>
17 #include "core.h"
18 #include "debug.h"
19 #include "mac.h"
20 #include "hw.h"
21 #include "peer.h"
22 #include "p2p.h"
23 
24 struct ath12k_wmi_svc_ready_parse {
25 	bool wmi_svc_bitmap_done;
26 };
27 
28 struct ath12k_wmi_dma_ring_caps_parse {
29 	struct ath12k_wmi_dma_ring_caps_params *dma_ring_caps;
30 	u32 n_dma_ring_caps;
31 };
32 
33 struct ath12k_wmi_service_ext_arg {
34 	u32 default_conc_scan_config_bits;
35 	u32 default_fw_config_bits;
36 	struct ath12k_wmi_ppe_threshold_arg ppet;
37 	u32 he_cap_info;
38 	u32 mpdu_density;
39 	u32 max_bssid_rx_filters;
40 	u32 num_hw_modes;
41 	u32 num_phy;
42 };
43 
44 struct ath12k_wmi_svc_rdy_ext_parse {
45 	struct ath12k_wmi_service_ext_arg arg;
46 	const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps;
47 	const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps;
48 	u32 n_hw_mode_caps;
49 	u32 tot_phy_id;
50 	struct ath12k_wmi_hw_mode_cap_params pref_hw_mode_caps;
51 	struct ath12k_wmi_mac_phy_caps_params *mac_phy_caps;
52 	u32 n_mac_phy_caps;
53 	const struct ath12k_wmi_soc_hal_reg_caps_params *soc_hal_reg_caps;
54 	const struct ath12k_wmi_hal_reg_caps_ext_params *ext_hal_reg_caps;
55 	u32 n_ext_hal_reg_caps;
56 	struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse;
57 	bool hw_mode_done;
58 	bool mac_phy_done;
59 	bool ext_hal_reg_done;
60 	bool mac_phy_chainmask_combo_done;
61 	bool mac_phy_chainmask_cap_done;
62 	bool oem_dma_ring_cap_done;
63 	bool dma_ring_cap_done;
64 };
65 
66 struct ath12k_wmi_svc_rdy_ext2_arg {
67 	u32 reg_db_version;
68 	u32 hw_min_max_tx_power_2ghz;
69 	u32 hw_min_max_tx_power_5ghz;
70 	u32 chwidth_num_peer_caps;
71 	u32 preamble_puncture_bw;
72 	u32 max_user_per_ppdu_ofdma;
73 	u32 max_user_per_ppdu_mumimo;
74 	u32 target_cap_flags;
75 	u32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE];
76 	u32 max_num_linkview_peers;
77 	u32 max_num_msduq_supported_per_tid;
78 	u32 default_num_msduq_supported_per_tid;
79 };
80 
81 struct ath12k_wmi_svc_rdy_ext2_parse {
82 	struct ath12k_wmi_svc_rdy_ext2_arg arg;
83 	struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse;
84 	bool dma_ring_cap_done;
85 	bool spectral_bin_scaling_done;
86 	bool mac_phy_caps_ext_done;
87 };
88 
89 struct ath12k_wmi_rdy_parse {
90 	u32 num_extra_mac_addr;
91 };
92 
93 struct ath12k_wmi_dma_buf_release_arg {
94 	struct ath12k_wmi_dma_buf_release_fixed_params fixed;
95 	const struct ath12k_wmi_dma_buf_release_entry_params *buf_entry;
96 	const struct ath12k_wmi_dma_buf_release_meta_data_params *meta_data;
97 	u32 num_buf_entry;
98 	u32 num_meta;
99 	bool buf_entry_done;
100 	bool meta_data_done;
101 };
102 
103 struct ath12k_wmi_tlv_policy {
104 	size_t min_len;
105 };
106 
107 struct wmi_tlv_mgmt_rx_parse {
108 	const struct ath12k_wmi_mgmt_rx_params *fixed;
109 	const u8 *frame_buf;
110 	bool frame_buf_done;
111 };
112 
113 static const struct ath12k_wmi_tlv_policy ath12k_wmi_tlv_policies[] = {
114 	[WMI_TAG_ARRAY_BYTE] = { .min_len = 0 },
115 	[WMI_TAG_ARRAY_UINT32] = { .min_len = 0 },
116 	[WMI_TAG_SERVICE_READY_EVENT] = {
117 		.min_len = sizeof(struct wmi_service_ready_event) },
118 	[WMI_TAG_SERVICE_READY_EXT_EVENT] = {
119 		.min_len = sizeof(struct wmi_service_ready_ext_event) },
120 	[WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS] = {
121 		.min_len = sizeof(struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params) },
122 	[WMI_TAG_SOC_HAL_REG_CAPABILITIES] = {
123 		.min_len = sizeof(struct ath12k_wmi_soc_hal_reg_caps_params) },
124 	[WMI_TAG_VDEV_START_RESPONSE_EVENT] = {
125 		.min_len = sizeof(struct wmi_vdev_start_resp_event) },
126 	[WMI_TAG_PEER_DELETE_RESP_EVENT] = {
127 		.min_len = sizeof(struct wmi_peer_delete_resp_event) },
128 	[WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT] = {
129 		.min_len = sizeof(struct wmi_bcn_tx_status_event) },
130 	[WMI_TAG_VDEV_STOPPED_EVENT] = {
131 		.min_len = sizeof(struct wmi_vdev_stopped_event) },
132 	[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT] = {
133 		.min_len = sizeof(struct wmi_reg_chan_list_cc_ext_event) },
134 	[WMI_TAG_MGMT_RX_HDR] = {
135 		.min_len = sizeof(struct ath12k_wmi_mgmt_rx_params) },
136 	[WMI_TAG_MGMT_TX_COMPL_EVENT] = {
137 		.min_len = sizeof(struct wmi_mgmt_tx_compl_event) },
138 	[WMI_TAG_SCAN_EVENT] = {
139 		.min_len = sizeof(struct wmi_scan_event) },
140 	[WMI_TAG_PEER_STA_KICKOUT_EVENT] = {
141 		.min_len = sizeof(struct wmi_peer_sta_kickout_event) },
142 	[WMI_TAG_ROAM_EVENT] = {
143 		.min_len = sizeof(struct wmi_roam_event) },
144 	[WMI_TAG_CHAN_INFO_EVENT] = {
145 		.min_len = sizeof(struct wmi_chan_info_event) },
146 	[WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT] = {
147 		.min_len = sizeof(struct wmi_pdev_bss_chan_info_event) },
148 	[WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT] = {
149 		.min_len = sizeof(struct wmi_vdev_install_key_compl_event) },
150 	[WMI_TAG_READY_EVENT] = {
151 		.min_len = sizeof(struct ath12k_wmi_ready_event_min_params) },
152 	[WMI_TAG_SERVICE_AVAILABLE_EVENT] = {
153 		.min_len = sizeof(struct wmi_service_available_event) },
154 	[WMI_TAG_PEER_ASSOC_CONF_EVENT] = {
155 		.min_len = sizeof(struct wmi_peer_assoc_conf_event) },
156 	[WMI_TAG_RFKILL_EVENT] = {
157 		.min_len = sizeof(struct wmi_rfkill_state_change_event) },
158 	[WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT] = {
159 		.min_len = sizeof(struct wmi_pdev_ctl_failsafe_chk_event) },
160 	[WMI_TAG_HOST_SWFDA_EVENT] = {
161 		.min_len = sizeof(struct wmi_fils_discovery_event) },
162 	[WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT] = {
163 		.min_len = sizeof(struct wmi_probe_resp_tx_status_event) },
164 	[WMI_TAG_VDEV_DELETE_RESP_EVENT] = {
165 		.min_len = sizeof(struct wmi_vdev_delete_resp_event) },
166 	[WMI_TAG_TWT_ENABLE_COMPLETE_EVENT] = {
167 		.min_len = sizeof(struct wmi_twt_enable_event) },
168 	[WMI_TAG_TWT_DISABLE_COMPLETE_EVENT] = {
169 		.min_len = sizeof(struct wmi_twt_disable_event) },
170 	[WMI_TAG_P2P_NOA_INFO] = {
171 		.min_len = sizeof(struct ath12k_wmi_p2p_noa_info) },
172 	[WMI_TAG_P2P_NOA_EVENT] = {
173 		.min_len = sizeof(struct wmi_p2p_noa_event) },
174 };
175 
ath12k_wmi_tlv_hdr(u32 cmd,u32 len)176 static __le32 ath12k_wmi_tlv_hdr(u32 cmd, u32 len)
177 {
178 	return le32_encode_bits(cmd, WMI_TLV_TAG) |
179 		le32_encode_bits(len, WMI_TLV_LEN);
180 }
181 
ath12k_wmi_tlv_cmd_hdr(u32 cmd,u32 len)182 static __le32 ath12k_wmi_tlv_cmd_hdr(u32 cmd, u32 len)
183 {
184 	return ath12k_wmi_tlv_hdr(cmd, len - TLV_HDR_SIZE);
185 }
186 
ath12k_wmi_init_qcn9274(struct ath12k_base * ab,struct ath12k_wmi_resource_config_arg * config)187 void ath12k_wmi_init_qcn9274(struct ath12k_base *ab,
188 			     struct ath12k_wmi_resource_config_arg *config)
189 {
190 	config->num_vdevs = ab->num_radios * TARGET_NUM_VDEVS;
191 	config->num_peers = ab->num_radios *
192 		ath12k_core_get_max_peers_per_radio(ab);
193 	config->num_tids = ath12k_core_get_max_num_tids(ab);
194 	config->num_offload_peers = TARGET_NUM_OFFLD_PEERS;
195 	config->num_offload_reorder_buffs = TARGET_NUM_OFFLD_REORDER_BUFFS;
196 	config->num_peer_keys = TARGET_NUM_PEER_KEYS;
197 	config->ast_skid_limit = TARGET_AST_SKID_LIMIT;
198 	config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
199 	config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
200 	config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI;
201 	config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI;
202 	config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI;
203 	config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI;
204 
205 	if (test_bit(ATH12K_FLAG_RAW_MODE, &ab->dev_flags))
206 		config->rx_decap_mode = TARGET_DECAP_MODE_RAW;
207 	else
208 		config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI;
209 
210 	config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS;
211 	config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV;
212 	config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV;
213 	config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES;
214 	config->num_mcast_groups = TARGET_NUM_MCAST_GROUPS;
215 	config->num_mcast_table_elems = TARGET_NUM_MCAST_TABLE_ELEMS;
216 	config->mcast2ucast_mode = TARGET_MCAST2UCAST_MODE;
217 	config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE;
218 	config->num_wds_entries = TARGET_NUM_WDS_ENTRIES;
219 	config->dma_burst_size = TARGET_DMA_BURST_SIZE;
220 	config->rx_skip_defrag_timeout_dup_detection_check =
221 		TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
222 	config->vow_config = TARGET_VOW_CONFIG;
223 	config->gtk_offload_max_vdev = TARGET_GTK_OFFLOAD_MAX_VDEV;
224 	config->num_msdu_desc = TARGET_NUM_MSDU_DESC;
225 	config->beacon_tx_offload_max_vdev = ab->num_radios * TARGET_MAX_BCN_OFFLD;
226 	config->rx_batchmode = TARGET_RX_BATCHMODE;
227 	/* Indicates host supports peer map v3 and unmap v2 support */
228 	config->peer_map_unmap_version = 0x32;
229 	config->twt_ap_pdev_count = ab->num_radios;
230 	config->twt_ap_sta_count = 1000;
231 	config->ema_max_vap_cnt = ab->num_radios;
232 	config->ema_max_profile_period = TARGET_EMA_MAX_PROFILE_PERIOD;
233 	config->beacon_tx_offload_max_vdev += config->ema_max_vap_cnt;
234 
235 	if (test_bit(WMI_TLV_SERVICE_PEER_METADATA_V1A_V1B_SUPPORT, ab->wmi_ab.svc_map))
236 		config->peer_metadata_ver = ATH12K_PEER_METADATA_V1B;
237 }
238 
ath12k_wmi_init_wcn7850(struct ath12k_base * ab,struct ath12k_wmi_resource_config_arg * config)239 void ath12k_wmi_init_wcn7850(struct ath12k_base *ab,
240 			     struct ath12k_wmi_resource_config_arg *config)
241 {
242 	config->num_vdevs = 4;
243 	config->num_peers = 16;
244 	config->num_tids = 32;
245 
246 	config->num_offload_peers = 3;
247 	config->num_offload_reorder_buffs = 3;
248 	config->num_peer_keys = TARGET_NUM_PEER_KEYS;
249 	config->ast_skid_limit = TARGET_AST_SKID_LIMIT;
250 	config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
251 	config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
252 	config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI;
253 	config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI;
254 	config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI;
255 	config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI;
256 	config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI;
257 	config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS;
258 	config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV;
259 	config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV;
260 	config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES;
261 	config->num_mcast_groups = 0;
262 	config->num_mcast_table_elems = 0;
263 	config->mcast2ucast_mode = 0;
264 	config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE;
265 	config->num_wds_entries = 0;
266 	config->dma_burst_size = 0;
267 	config->rx_skip_defrag_timeout_dup_detection_check = 0;
268 	config->vow_config = TARGET_VOW_CONFIG;
269 	config->gtk_offload_max_vdev = 2;
270 	config->num_msdu_desc = 0x400;
271 	config->beacon_tx_offload_max_vdev = 2;
272 	config->rx_batchmode = TARGET_RX_BATCHMODE;
273 
274 	config->peer_map_unmap_version = 0x1;
275 	config->use_pdev_id = 1;
276 	config->max_frag_entries = 0xa;
277 	config->num_tdls_vdevs = 0x1;
278 	config->num_tdls_conn_table_entries = 8;
279 	config->beacon_tx_offload_max_vdev = 0x2;
280 	config->num_multicast_filter_entries = 0x20;
281 	config->num_wow_filters = 0x16;
282 	config->num_keep_alive_pattern = 0;
283 }
284 
285 #define PRIMAP(_hw_mode_) \
286 	[_hw_mode_] = _hw_mode_##_PRI
287 
288 static const int ath12k_hw_mode_pri_map[] = {
289 	PRIMAP(WMI_HOST_HW_MODE_SINGLE),
290 	PRIMAP(WMI_HOST_HW_MODE_DBS),
291 	PRIMAP(WMI_HOST_HW_MODE_SBS_PASSIVE),
292 	PRIMAP(WMI_HOST_HW_MODE_SBS),
293 	PRIMAP(WMI_HOST_HW_MODE_DBS_SBS),
294 	PRIMAP(WMI_HOST_HW_MODE_DBS_OR_SBS),
295 	/* keep last */
296 	PRIMAP(WMI_HOST_HW_MODE_MAX),
297 };
298 
299 static int
ath12k_wmi_tlv_iter(struct ath12k_base * ab,const void * ptr,size_t len,int (* iter)(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data),void * data)300 ath12k_wmi_tlv_iter(struct ath12k_base *ab, const void *ptr, size_t len,
301 		    int (*iter)(struct ath12k_base *ab, u16 tag, u16 len,
302 				const void *ptr, void *data),
303 		    void *data)
304 {
305 	const void *begin = ptr;
306 	const struct wmi_tlv *tlv;
307 	u16 tlv_tag, tlv_len;
308 	int ret;
309 
310 	while (len > 0) {
311 		if (len < sizeof(*tlv)) {
312 			ath12k_err(ab, "wmi tlv parse failure at byte %zd (%zu bytes left, %zu expected)\n",
313 				   ptr - begin, len, sizeof(*tlv));
314 			return -EINVAL;
315 		}
316 
317 		tlv = ptr;
318 		tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG);
319 		tlv_len = le32_get_bits(tlv->header, WMI_TLV_LEN);
320 		ptr += sizeof(*tlv);
321 		len -= sizeof(*tlv);
322 
323 		if (tlv_len > len) {
324 			ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%zu bytes left, %u expected)\n",
325 				   tlv_tag, ptr - begin, len, tlv_len);
326 			return -EINVAL;
327 		}
328 
329 		if (tlv_tag < ARRAY_SIZE(ath12k_wmi_tlv_policies) &&
330 		    ath12k_wmi_tlv_policies[tlv_tag].min_len &&
331 		    ath12k_wmi_tlv_policies[tlv_tag].min_len > tlv_len) {
332 			ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%u bytes is less than min length %zu)\n",
333 				   tlv_tag, ptr - begin, tlv_len,
334 				   ath12k_wmi_tlv_policies[tlv_tag].min_len);
335 			return -EINVAL;
336 		}
337 
338 		ret = iter(ab, tlv_tag, tlv_len, ptr, data);
339 		if (ret)
340 			return ret;
341 
342 		ptr += tlv_len;
343 		len -= tlv_len;
344 	}
345 
346 	return 0;
347 }
348 
ath12k_wmi_tlv_iter_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)349 static int ath12k_wmi_tlv_iter_parse(struct ath12k_base *ab, u16 tag, u16 len,
350 				     const void *ptr, void *data)
351 {
352 	const void **tb = data;
353 
354 	if (tag < WMI_TAG_MAX)
355 		tb[tag] = ptr;
356 
357 	return 0;
358 }
359 
ath12k_wmi_tlv_parse(struct ath12k_base * ar,const void ** tb,const void * ptr,size_t len)360 static int ath12k_wmi_tlv_parse(struct ath12k_base *ar, const void **tb,
361 				const void *ptr, size_t len)
362 {
363 	return ath12k_wmi_tlv_iter(ar, ptr, len, ath12k_wmi_tlv_iter_parse,
364 				   (void *)tb);
365 }
366 
367 static const void **
ath12k_wmi_tlv_parse_alloc(struct ath12k_base * ab,struct sk_buff * skb,gfp_t gfp)368 ath12k_wmi_tlv_parse_alloc(struct ath12k_base *ab,
369 			   struct sk_buff *skb, gfp_t gfp)
370 {
371 	const void **tb;
372 	int ret;
373 
374 	tb = kcalloc(WMI_TAG_MAX, sizeof(*tb), gfp);
375 	if (!tb)
376 		return ERR_PTR(-ENOMEM);
377 
378 	ret = ath12k_wmi_tlv_parse(ab, tb, skb->data, skb->len);
379 	if (ret) {
380 		kfree(tb);
381 		return ERR_PTR(ret);
382 	}
383 
384 	return tb;
385 }
386 
ath12k_wmi_cmd_send_nowait(struct ath12k_wmi_pdev * wmi,struct sk_buff * skb,u32 cmd_id)387 static int ath12k_wmi_cmd_send_nowait(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb,
388 				      u32 cmd_id)
389 {
390 	struct ath12k_skb_cb *skb_cb = ATH12K_SKB_CB(skb);
391 	struct ath12k_base *ab = wmi->wmi_ab->ab;
392 	struct wmi_cmd_hdr *cmd_hdr;
393 	int ret;
394 
395 	if (!skb_push(skb, sizeof(struct wmi_cmd_hdr)))
396 		return -ENOMEM;
397 
398 	cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
399 	cmd_hdr->cmd_id = le32_encode_bits(cmd_id, WMI_CMD_HDR_CMD_ID);
400 
401 	memset(skb_cb, 0, sizeof(*skb_cb));
402 	ret = ath12k_htc_send(&ab->htc, wmi->eid, skb);
403 
404 	if (ret)
405 		goto err_pull;
406 
407 	return 0;
408 
409 err_pull:
410 	skb_pull(skb, sizeof(struct wmi_cmd_hdr));
411 	return ret;
412 }
413 
ath12k_wmi_cmd_send(struct ath12k_wmi_pdev * wmi,struct sk_buff * skb,u32 cmd_id)414 int ath12k_wmi_cmd_send(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb,
415 			u32 cmd_id)
416 {
417 	struct ath12k_wmi_base *wmi_ab = wmi->wmi_ab;
418 	int ret = -EOPNOTSUPP;
419 
420 	might_sleep();
421 
422 	wait_event_timeout(wmi_ab->tx_credits_wq, ({
423 		ret = ath12k_wmi_cmd_send_nowait(wmi, skb, cmd_id);
424 
425 		if (ret && test_bit(ATH12K_FLAG_CRASH_FLUSH, &wmi_ab->ab->dev_flags))
426 			ret = -ESHUTDOWN;
427 
428 		(ret != -EAGAIN);
429 	}), WMI_SEND_TIMEOUT_HZ);
430 
431 	if (ret == -EAGAIN)
432 		ath12k_warn(wmi_ab->ab, "wmi command %d timeout\n", cmd_id);
433 
434 	return ret;
435 }
436 
ath12k_pull_svc_ready_ext(struct ath12k_wmi_pdev * wmi_handle,const void * ptr,struct ath12k_wmi_service_ext_arg * arg)437 static int ath12k_pull_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle,
438 				     const void *ptr,
439 				     struct ath12k_wmi_service_ext_arg *arg)
440 {
441 	const struct wmi_service_ready_ext_event *ev = ptr;
442 	int i;
443 
444 	if (!ev)
445 		return -EINVAL;
446 
447 	/* Move this to host based bitmap */
448 	arg->default_conc_scan_config_bits =
449 		le32_to_cpu(ev->default_conc_scan_config_bits);
450 	arg->default_fw_config_bits = le32_to_cpu(ev->default_fw_config_bits);
451 	arg->he_cap_info = le32_to_cpu(ev->he_cap_info);
452 	arg->mpdu_density = le32_to_cpu(ev->mpdu_density);
453 	arg->max_bssid_rx_filters = le32_to_cpu(ev->max_bssid_rx_filters);
454 	arg->ppet.numss_m1 = le32_to_cpu(ev->ppet.numss_m1);
455 	arg->ppet.ru_bit_mask = le32_to_cpu(ev->ppet.ru_info);
456 
457 	for (i = 0; i < WMI_MAX_NUM_SS; i++)
458 		arg->ppet.ppet16_ppet8_ru3_ru0[i] =
459 			le32_to_cpu(ev->ppet.ppet16_ppet8_ru3_ru0[i]);
460 
461 	return 0;
462 }
463 
464 static int
ath12k_pull_mac_phy_cap_svc_ready_ext(struct ath12k_wmi_pdev * wmi_handle,struct ath12k_wmi_svc_rdy_ext_parse * svc,u8 hw_mode_id,u8 phy_id,struct ath12k_pdev * pdev)465 ath12k_pull_mac_phy_cap_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle,
466 				      struct ath12k_wmi_svc_rdy_ext_parse *svc,
467 				      u8 hw_mode_id, u8 phy_id,
468 				      struct ath12k_pdev *pdev)
469 {
470 	const struct ath12k_wmi_mac_phy_caps_params *mac_caps;
471 	const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps = svc->hw_caps;
472 	const struct ath12k_wmi_hw_mode_cap_params *wmi_hw_mode_caps = svc->hw_mode_caps;
473 	const struct ath12k_wmi_mac_phy_caps_params *wmi_mac_phy_caps = svc->mac_phy_caps;
474 	struct ath12k_base *ab = wmi_handle->wmi_ab->ab;
475 	struct ath12k_band_cap *cap_band;
476 	struct ath12k_pdev_cap *pdev_cap = &pdev->cap;
477 	struct ath12k_fw_pdev *fw_pdev;
478 	u32 phy_map;
479 	u32 hw_idx, phy_idx = 0;
480 	int i;
481 
482 	if (!hw_caps || !wmi_hw_mode_caps || !svc->soc_hal_reg_caps)
483 		return -EINVAL;
484 
485 	for (hw_idx = 0; hw_idx < le32_to_cpu(hw_caps->num_hw_modes); hw_idx++) {
486 		if (hw_mode_id == le32_to_cpu(wmi_hw_mode_caps[hw_idx].hw_mode_id))
487 			break;
488 
489 		phy_map = le32_to_cpu(wmi_hw_mode_caps[hw_idx].phy_id_map);
490 		phy_idx = fls(phy_map);
491 	}
492 
493 	if (hw_idx == le32_to_cpu(hw_caps->num_hw_modes))
494 		return -EINVAL;
495 
496 	phy_idx += phy_id;
497 	if (phy_id >= le32_to_cpu(svc->soc_hal_reg_caps->num_phy))
498 		return -EINVAL;
499 
500 	mac_caps = wmi_mac_phy_caps + phy_idx;
501 
502 	pdev->pdev_id = ath12k_wmi_mac_phy_get_pdev_id(mac_caps);
503 	pdev->hw_link_id = ath12k_wmi_mac_phy_get_hw_link_id(mac_caps);
504 	pdev_cap->supported_bands |= le32_to_cpu(mac_caps->supported_bands);
505 	pdev_cap->ampdu_density = le32_to_cpu(mac_caps->ampdu_density);
506 
507 	fw_pdev = &ab->fw_pdev[ab->fw_pdev_count];
508 	fw_pdev->supported_bands = le32_to_cpu(mac_caps->supported_bands);
509 	fw_pdev->pdev_id = ath12k_wmi_mac_phy_get_pdev_id(mac_caps);
510 	fw_pdev->phy_id = le32_to_cpu(mac_caps->phy_id);
511 	ab->fw_pdev_count++;
512 
513 	/* Take non-zero tx/rx chainmask. If tx/rx chainmask differs from
514 	 * band to band for a single radio, need to see how this should be
515 	 * handled.
516 	 */
517 	if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2G_CAP) {
518 		pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_2g);
519 		pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_2g);
520 	} else if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5G_CAP) {
521 		pdev_cap->vht_cap = le32_to_cpu(mac_caps->vht_cap_info_5g);
522 		pdev_cap->vht_mcs = le32_to_cpu(mac_caps->vht_supp_mcs_5g);
523 		pdev_cap->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g);
524 		pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_5g);
525 		pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_5g);
526 	} else {
527 		return -EINVAL;
528 	}
529 
530 	/* tx/rx chainmask reported from fw depends on the actual hw chains used,
531 	 * For example, for 4x4 capable macphys, first 4 chains can be used for first
532 	 * mac and the remaining 4 chains can be used for the second mac or vice-versa.
533 	 * In this case, tx/rx chainmask 0xf will be advertised for first mac and 0xf0
534 	 * will be advertised for second mac or vice-versa. Compute the shift value
535 	 * for tx/rx chainmask which will be used to advertise supported ht/vht rates to
536 	 * mac80211.
537 	 */
538 	pdev_cap->tx_chain_mask_shift =
539 			find_first_bit((unsigned long *)&pdev_cap->tx_chain_mask, 32);
540 	pdev_cap->rx_chain_mask_shift =
541 			find_first_bit((unsigned long *)&pdev_cap->rx_chain_mask, 32);
542 
543 	if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2G_CAP) {
544 		cap_band = &pdev_cap->band[NL80211_BAND_2GHZ];
545 		cap_band->phy_id = le32_to_cpu(mac_caps->phy_id);
546 		cap_band->max_bw_supported = le32_to_cpu(mac_caps->max_bw_supported_2g);
547 		cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_2g);
548 		cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_2g);
549 		cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_2g_ext);
550 		cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_2g);
551 		for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
552 			cap_band->he_cap_phy_info[i] =
553 				le32_to_cpu(mac_caps->he_cap_phy_info_2g[i]);
554 
555 		cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet2g.numss_m1);
556 		cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet2g.ru_info);
557 
558 		for (i = 0; i < WMI_MAX_NUM_SS; i++)
559 			cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] =
560 				le32_to_cpu(mac_caps->he_ppet2g.ppet16_ppet8_ru3_ru0[i]);
561 	}
562 
563 	if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5G_CAP) {
564 		cap_band = &pdev_cap->band[NL80211_BAND_5GHZ];
565 		cap_band->phy_id = le32_to_cpu(mac_caps->phy_id);
566 		cap_band->max_bw_supported =
567 			le32_to_cpu(mac_caps->max_bw_supported_5g);
568 		cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g);
569 		cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g);
570 		cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext);
571 		cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g);
572 		for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
573 			cap_band->he_cap_phy_info[i] =
574 				le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]);
575 
576 		cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1);
577 		cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info);
578 
579 		for (i = 0; i < WMI_MAX_NUM_SS; i++)
580 			cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] =
581 				le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]);
582 
583 		cap_band = &pdev_cap->band[NL80211_BAND_6GHZ];
584 		cap_band->max_bw_supported =
585 			le32_to_cpu(mac_caps->max_bw_supported_5g);
586 		cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g);
587 		cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g);
588 		cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext);
589 		cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g);
590 		for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
591 			cap_band->he_cap_phy_info[i] =
592 				le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]);
593 
594 		cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1);
595 		cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info);
596 
597 		for (i = 0; i < WMI_MAX_NUM_SS; i++)
598 			cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] =
599 				le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]);
600 	}
601 
602 	return 0;
603 }
604 
605 static int
ath12k_pull_reg_cap_svc_rdy_ext(struct ath12k_wmi_pdev * wmi_handle,const struct ath12k_wmi_soc_hal_reg_caps_params * reg_caps,const struct ath12k_wmi_hal_reg_caps_ext_params * ext_caps,u8 phy_idx,struct ath12k_wmi_hal_reg_capabilities_ext_arg * param)606 ath12k_pull_reg_cap_svc_rdy_ext(struct ath12k_wmi_pdev *wmi_handle,
607 				const struct ath12k_wmi_soc_hal_reg_caps_params *reg_caps,
608 				const struct ath12k_wmi_hal_reg_caps_ext_params *ext_caps,
609 				u8 phy_idx,
610 				struct ath12k_wmi_hal_reg_capabilities_ext_arg *param)
611 {
612 	const struct ath12k_wmi_hal_reg_caps_ext_params *ext_reg_cap;
613 
614 	if (!reg_caps || !ext_caps)
615 		return -EINVAL;
616 
617 	if (phy_idx >= le32_to_cpu(reg_caps->num_phy))
618 		return -EINVAL;
619 
620 	ext_reg_cap = &ext_caps[phy_idx];
621 
622 	param->phy_id = le32_to_cpu(ext_reg_cap->phy_id);
623 	param->eeprom_reg_domain = le32_to_cpu(ext_reg_cap->eeprom_reg_domain);
624 	param->eeprom_reg_domain_ext =
625 		le32_to_cpu(ext_reg_cap->eeprom_reg_domain_ext);
626 	param->regcap1 = le32_to_cpu(ext_reg_cap->regcap1);
627 	param->regcap2 = le32_to_cpu(ext_reg_cap->regcap2);
628 	/* check if param->wireless_mode is needed */
629 	param->low_2ghz_chan = le32_to_cpu(ext_reg_cap->low_2ghz_chan);
630 	param->high_2ghz_chan = le32_to_cpu(ext_reg_cap->high_2ghz_chan);
631 	param->low_5ghz_chan = le32_to_cpu(ext_reg_cap->low_5ghz_chan);
632 	param->high_5ghz_chan = le32_to_cpu(ext_reg_cap->high_5ghz_chan);
633 
634 	return 0;
635 }
636 
ath12k_pull_service_ready_tlv(struct ath12k_base * ab,const void * evt_buf,struct ath12k_wmi_target_cap_arg * cap)637 static int ath12k_pull_service_ready_tlv(struct ath12k_base *ab,
638 					 const void *evt_buf,
639 					 struct ath12k_wmi_target_cap_arg *cap)
640 {
641 	const struct wmi_service_ready_event *ev = evt_buf;
642 
643 	if (!ev) {
644 		ath12k_err(ab, "%s: failed by NULL param\n",
645 			   __func__);
646 		return -EINVAL;
647 	}
648 
649 	cap->phy_capability = le32_to_cpu(ev->phy_capability);
650 	cap->max_frag_entry = le32_to_cpu(ev->max_frag_entry);
651 	cap->num_rf_chains = le32_to_cpu(ev->num_rf_chains);
652 	cap->ht_cap_info = le32_to_cpu(ev->ht_cap_info);
653 	cap->vht_cap_info = le32_to_cpu(ev->vht_cap_info);
654 	cap->vht_supp_mcs = le32_to_cpu(ev->vht_supp_mcs);
655 	cap->hw_min_tx_power = le32_to_cpu(ev->hw_min_tx_power);
656 	cap->hw_max_tx_power = le32_to_cpu(ev->hw_max_tx_power);
657 	cap->sys_cap_info = le32_to_cpu(ev->sys_cap_info);
658 	cap->min_pkt_size_enable = le32_to_cpu(ev->min_pkt_size_enable);
659 	cap->max_bcn_ie_size = le32_to_cpu(ev->max_bcn_ie_size);
660 	cap->max_num_scan_channels = le32_to_cpu(ev->max_num_scan_channels);
661 	cap->max_supported_macs = le32_to_cpu(ev->max_supported_macs);
662 	cap->wmi_fw_sub_feat_caps = le32_to_cpu(ev->wmi_fw_sub_feat_caps);
663 	cap->txrx_chainmask = le32_to_cpu(ev->txrx_chainmask);
664 	cap->default_dbs_hw_mode_index = le32_to_cpu(ev->default_dbs_hw_mode_index);
665 	cap->num_msdu_desc = le32_to_cpu(ev->num_msdu_desc);
666 
667 	return 0;
668 }
669 
670 /* Save the wmi_service_bitmap into a linear bitmap. The wmi_services in
671  * wmi_service ready event are advertised in b0-b3 (LSB 4-bits) of each
672  * 4-byte word.
673  */
ath12k_wmi_service_bitmap_copy(struct ath12k_wmi_pdev * wmi,const u32 * wmi_svc_bm)674 static void ath12k_wmi_service_bitmap_copy(struct ath12k_wmi_pdev *wmi,
675 					   const u32 *wmi_svc_bm)
676 {
677 	int i, j;
678 
679 	for (i = 0, j = 0; i < WMI_SERVICE_BM_SIZE && j < WMI_MAX_SERVICE; i++) {
680 		do {
681 			if (wmi_svc_bm[i] & BIT(j % WMI_SERVICE_BITS_IN_SIZE32))
682 				set_bit(j, wmi->wmi_ab->svc_map);
683 		} while (++j % WMI_SERVICE_BITS_IN_SIZE32);
684 	}
685 }
686 
ath12k_wmi_svc_rdy_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)687 static int ath12k_wmi_svc_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len,
688 				    const void *ptr, void *data)
689 {
690 	struct ath12k_wmi_svc_ready_parse *svc_ready = data;
691 	struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0];
692 	u16 expect_len;
693 
694 	switch (tag) {
695 	case WMI_TAG_SERVICE_READY_EVENT:
696 		if (ath12k_pull_service_ready_tlv(ab, ptr, &ab->target_caps))
697 			return -EINVAL;
698 		break;
699 
700 	case WMI_TAG_ARRAY_UINT32:
701 		if (!svc_ready->wmi_svc_bitmap_done) {
702 			expect_len = WMI_SERVICE_BM_SIZE * sizeof(u32);
703 			if (len < expect_len) {
704 				ath12k_warn(ab, "invalid len %d for the tag 0x%x\n",
705 					    len, tag);
706 				return -EINVAL;
707 			}
708 
709 			ath12k_wmi_service_bitmap_copy(wmi_handle, ptr);
710 
711 			svc_ready->wmi_svc_bitmap_done = true;
712 		}
713 		break;
714 	default:
715 		break;
716 	}
717 
718 	return 0;
719 }
720 
ath12k_service_ready_event(struct ath12k_base * ab,struct sk_buff * skb)721 static int ath12k_service_ready_event(struct ath12k_base *ab, struct sk_buff *skb)
722 {
723 	struct ath12k_wmi_svc_ready_parse svc_ready = { };
724 	int ret;
725 
726 	ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
727 				  ath12k_wmi_svc_rdy_parse,
728 				  &svc_ready);
729 	if (ret) {
730 		ath12k_warn(ab, "failed to parse tlv %d\n", ret);
731 		return ret;
732 	}
733 
734 	return 0;
735 }
736 
ath12k_wmi_mgmt_get_freq(struct ath12k * ar,struct ieee80211_tx_info * info)737 static u32 ath12k_wmi_mgmt_get_freq(struct ath12k *ar,
738 				    struct ieee80211_tx_info *info)
739 {
740 	struct ath12k_base *ab = ar->ab;
741 	u32 freq = 0;
742 
743 	if (ab->hw_params->single_pdev_only &&
744 	    ar->scan.is_roc &&
745 	    (info->flags & IEEE80211_TX_CTL_TX_OFFCHAN))
746 		freq = ar->scan.roc_freq;
747 
748 	return freq;
749 }
750 
ath12k_wmi_alloc_skb(struct ath12k_wmi_base * wmi_ab,u32 len)751 struct sk_buff *ath12k_wmi_alloc_skb(struct ath12k_wmi_base *wmi_ab, u32 len)
752 {
753 	struct sk_buff *skb;
754 	struct ath12k_base *ab = wmi_ab->ab;
755 	u32 round_len = roundup(len, 4);
756 
757 	skb = ath12k_htc_alloc_skb(ab, WMI_SKB_HEADROOM + round_len);
758 	if (!skb)
759 		return NULL;
760 
761 	skb_reserve(skb, WMI_SKB_HEADROOM);
762 	if (!IS_ALIGNED((unsigned long)skb->data, 4))
763 		ath12k_warn(ab, "unaligned WMI skb data\n");
764 
765 	skb_put(skb, round_len);
766 	memset(skb->data, 0, round_len);
767 
768 	return skb;
769 }
770 
ath12k_wmi_mgmt_send(struct ath12k * ar,u32 vdev_id,u32 buf_id,struct sk_buff * frame)771 int ath12k_wmi_mgmt_send(struct ath12k *ar, u32 vdev_id, u32 buf_id,
772 			 struct sk_buff *frame)
773 {
774 	struct ath12k_wmi_pdev *wmi = ar->wmi;
775 	struct wmi_mgmt_send_cmd *cmd;
776 	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(frame);
777 	struct wmi_tlv *frame_tlv;
778 	struct sk_buff *skb;
779 	u32 buf_len;
780 	int ret, len;
781 
782 	buf_len = min_t(int, frame->len, WMI_MGMT_SEND_DOWNLD_LEN);
783 
784 	len = sizeof(*cmd) + sizeof(*frame_tlv) + roundup(buf_len, 4);
785 
786 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
787 	if (!skb)
788 		return -ENOMEM;
789 
790 	cmd = (struct wmi_mgmt_send_cmd *)skb->data;
791 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MGMT_TX_SEND_CMD,
792 						 sizeof(*cmd));
793 	cmd->vdev_id = cpu_to_le32(vdev_id);
794 	cmd->desc_id = cpu_to_le32(buf_id);
795 	cmd->chanfreq = cpu_to_le32(ath12k_wmi_mgmt_get_freq(ar, info));
796 	cmd->paddr_lo = cpu_to_le32(lower_32_bits(ATH12K_SKB_CB(frame)->paddr));
797 	cmd->paddr_hi = cpu_to_le32(upper_32_bits(ATH12K_SKB_CB(frame)->paddr));
798 	cmd->frame_len = cpu_to_le32(frame->len);
799 	cmd->buf_len = cpu_to_le32(buf_len);
800 	cmd->tx_params_valid = 0;
801 
802 	frame_tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd));
803 	frame_tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, buf_len);
804 
805 	memcpy(frame_tlv->value, frame->data, buf_len);
806 
807 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MGMT_TX_SEND_CMDID);
808 	if (ret) {
809 		ath12k_warn(ar->ab,
810 			    "failed to submit WMI_MGMT_TX_SEND_CMDID cmd\n");
811 		dev_kfree_skb(skb);
812 	}
813 
814 	return ret;
815 }
816 
ath12k_wmi_vdev_create(struct ath12k * ar,u8 * macaddr,struct ath12k_wmi_vdev_create_arg * args)817 int ath12k_wmi_vdev_create(struct ath12k *ar, u8 *macaddr,
818 			   struct ath12k_wmi_vdev_create_arg *args)
819 {
820 	struct ath12k_wmi_pdev *wmi = ar->wmi;
821 	struct wmi_vdev_create_cmd *cmd;
822 	struct sk_buff *skb;
823 	struct ath12k_wmi_vdev_txrx_streams_params *txrx_streams;
824 	bool is_ml_vdev = is_valid_ether_addr(args->mld_addr);
825 	struct wmi_vdev_create_mlo_params *ml_params;
826 	struct wmi_tlv *tlv;
827 	int ret, len;
828 	void *ptr;
829 
830 	/* It can be optimized my sending tx/rx chain configuration
831 	 * only for supported bands instead of always sending it for
832 	 * both the bands.
833 	 */
834 	len = sizeof(*cmd) + TLV_HDR_SIZE +
835 		(WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams)) +
836 		(is_ml_vdev ? TLV_HDR_SIZE + sizeof(*ml_params) : 0);
837 
838 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
839 	if (!skb)
840 		return -ENOMEM;
841 
842 	cmd = (struct wmi_vdev_create_cmd *)skb->data;
843 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_CREATE_CMD,
844 						 sizeof(*cmd));
845 
846 	cmd->vdev_id = cpu_to_le32(args->if_id);
847 	cmd->vdev_type = cpu_to_le32(args->type);
848 	cmd->vdev_subtype = cpu_to_le32(args->subtype);
849 	cmd->num_cfg_txrx_streams = cpu_to_le32(WMI_NUM_SUPPORTED_BAND_MAX);
850 	cmd->pdev_id = cpu_to_le32(args->pdev_id);
851 	cmd->mbssid_flags = cpu_to_le32(args->mbssid_flags);
852 	cmd->mbssid_tx_vdev_id = cpu_to_le32(args->mbssid_tx_vdev_id);
853 	cmd->vdev_stats_id = cpu_to_le32(args->if_stats_id);
854 	ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
855 
856 	if (args->if_stats_id != ATH12K_INVAL_VDEV_STATS_ID)
857 		cmd->vdev_stats_id_valid = cpu_to_le32(BIT(0));
858 
859 	ptr = skb->data + sizeof(*cmd);
860 	len = WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams);
861 
862 	tlv = ptr;
863 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
864 
865 	ptr += TLV_HDR_SIZE;
866 	txrx_streams = ptr;
867 	len = sizeof(*txrx_streams);
868 	txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS,
869 							  len);
870 	txrx_streams->band = cpu_to_le32(WMI_TPC_CHAINMASK_CONFIG_BAND_2G);
871 	txrx_streams->supported_tx_streams =
872 				cpu_to_le32(args->chains[NL80211_BAND_2GHZ].tx);
873 	txrx_streams->supported_rx_streams =
874 				cpu_to_le32(args->chains[NL80211_BAND_2GHZ].rx);
875 
876 	txrx_streams++;
877 	txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS,
878 							  len);
879 	txrx_streams->band = cpu_to_le32(WMI_TPC_CHAINMASK_CONFIG_BAND_5G);
880 	txrx_streams->supported_tx_streams =
881 				cpu_to_le32(args->chains[NL80211_BAND_5GHZ].tx);
882 	txrx_streams->supported_rx_streams =
883 				cpu_to_le32(args->chains[NL80211_BAND_5GHZ].rx);
884 
885 	ptr += WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams);
886 
887 	if (is_ml_vdev) {
888 		tlv = ptr;
889 		tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
890 						 sizeof(*ml_params));
891 		ptr += TLV_HDR_SIZE;
892 		ml_params = ptr;
893 
894 		ml_params->tlv_header =
895 			ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_VDEV_CREATE_PARAMS,
896 					       sizeof(*ml_params));
897 		ether_addr_copy(ml_params->mld_macaddr.addr, args->mld_addr);
898 	}
899 
900 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
901 		   "WMI vdev create: id %d type %d subtype %d macaddr %pM pdevid %d\n",
902 		   args->if_id, args->type, args->subtype,
903 		   macaddr, args->pdev_id);
904 
905 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_CREATE_CMDID);
906 	if (ret) {
907 		ath12k_warn(ar->ab,
908 			    "failed to submit WMI_VDEV_CREATE_CMDID\n");
909 		dev_kfree_skb(skb);
910 	}
911 
912 	return ret;
913 }
914 
ath12k_wmi_vdev_delete(struct ath12k * ar,u8 vdev_id)915 int ath12k_wmi_vdev_delete(struct ath12k *ar, u8 vdev_id)
916 {
917 	struct ath12k_wmi_pdev *wmi = ar->wmi;
918 	struct wmi_vdev_delete_cmd *cmd;
919 	struct sk_buff *skb;
920 	int ret;
921 
922 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
923 	if (!skb)
924 		return -ENOMEM;
925 
926 	cmd = (struct wmi_vdev_delete_cmd *)skb->data;
927 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DELETE_CMD,
928 						 sizeof(*cmd));
929 	cmd->vdev_id = cpu_to_le32(vdev_id);
930 
931 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev delete id %d\n", vdev_id);
932 
933 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DELETE_CMDID);
934 	if (ret) {
935 		ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DELETE_CMDID\n");
936 		dev_kfree_skb(skb);
937 	}
938 
939 	return ret;
940 }
941 
ath12k_wmi_vdev_stop(struct ath12k * ar,u8 vdev_id)942 int ath12k_wmi_vdev_stop(struct ath12k *ar, u8 vdev_id)
943 {
944 	struct ath12k_wmi_pdev *wmi = ar->wmi;
945 	struct wmi_vdev_stop_cmd *cmd;
946 	struct sk_buff *skb;
947 	int ret;
948 
949 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
950 	if (!skb)
951 		return -ENOMEM;
952 
953 	cmd = (struct wmi_vdev_stop_cmd *)skb->data;
954 
955 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_STOP_CMD,
956 						 sizeof(*cmd));
957 	cmd->vdev_id = cpu_to_le32(vdev_id);
958 
959 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev stop id 0x%x\n", vdev_id);
960 
961 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_STOP_CMDID);
962 	if (ret) {
963 		ath12k_warn(ar->ab, "failed to submit WMI_VDEV_STOP cmd\n");
964 		dev_kfree_skb(skb);
965 	}
966 
967 	return ret;
968 }
969 
ath12k_wmi_vdev_down(struct ath12k * ar,u8 vdev_id)970 int ath12k_wmi_vdev_down(struct ath12k *ar, u8 vdev_id)
971 {
972 	struct ath12k_wmi_pdev *wmi = ar->wmi;
973 	struct wmi_vdev_down_cmd *cmd;
974 	struct sk_buff *skb;
975 	int ret;
976 
977 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
978 	if (!skb)
979 		return -ENOMEM;
980 
981 	cmd = (struct wmi_vdev_down_cmd *)skb->data;
982 
983 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DOWN_CMD,
984 						 sizeof(*cmd));
985 	cmd->vdev_id = cpu_to_le32(vdev_id);
986 
987 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev down id 0x%x\n", vdev_id);
988 
989 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DOWN_CMDID);
990 	if (ret) {
991 		ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DOWN cmd\n");
992 		dev_kfree_skb(skb);
993 	}
994 
995 	return ret;
996 }
997 
ath12k_wmi_put_wmi_channel(struct ath12k_wmi_channel_params * chan,struct wmi_vdev_start_req_arg * arg)998 static void ath12k_wmi_put_wmi_channel(struct ath12k_wmi_channel_params *chan,
999 				       struct wmi_vdev_start_req_arg *arg)
1000 {
1001 	memset(chan, 0, sizeof(*chan));
1002 
1003 	chan->mhz = cpu_to_le32(arg->freq);
1004 	chan->band_center_freq1 = cpu_to_le32(arg->band_center_freq1);
1005 	if (arg->mode == MODE_11AC_VHT80_80)
1006 		chan->band_center_freq2 = cpu_to_le32(arg->band_center_freq2);
1007 	else
1008 		chan->band_center_freq2 = 0;
1009 
1010 	chan->info |= le32_encode_bits(arg->mode, WMI_CHAN_INFO_MODE);
1011 	if (arg->passive)
1012 		chan->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE);
1013 	if (arg->allow_ibss)
1014 		chan->info |= cpu_to_le32(WMI_CHAN_INFO_ADHOC_ALLOWED);
1015 	if (arg->allow_ht)
1016 		chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT);
1017 	if (arg->allow_vht)
1018 		chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT);
1019 	if (arg->allow_he)
1020 		chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE);
1021 	if (arg->ht40plus)
1022 		chan->info |= cpu_to_le32(WMI_CHAN_INFO_HT40_PLUS);
1023 	if (arg->chan_radar)
1024 		chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS);
1025 	if (arg->freq2_radar)
1026 		chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS_FREQ2);
1027 
1028 	chan->reg_info_1 = le32_encode_bits(arg->max_power,
1029 					    WMI_CHAN_REG_INFO1_MAX_PWR) |
1030 		le32_encode_bits(arg->max_reg_power,
1031 				 WMI_CHAN_REG_INFO1_MAX_REG_PWR);
1032 
1033 	chan->reg_info_2 = le32_encode_bits(arg->max_antenna_gain,
1034 					    WMI_CHAN_REG_INFO2_ANT_MAX) |
1035 		le32_encode_bits(arg->max_power, WMI_CHAN_REG_INFO2_MAX_TX_PWR);
1036 }
1037 
ath12k_wmi_vdev_start(struct ath12k * ar,struct wmi_vdev_start_req_arg * arg,bool restart)1038 int ath12k_wmi_vdev_start(struct ath12k *ar, struct wmi_vdev_start_req_arg *arg,
1039 			  bool restart)
1040 {
1041 	struct wmi_vdev_start_mlo_params *ml_params;
1042 	struct wmi_partner_link_info *partner_info;
1043 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1044 	struct wmi_vdev_start_request_cmd *cmd;
1045 	struct sk_buff *skb;
1046 	struct ath12k_wmi_channel_params *chan;
1047 	struct wmi_tlv *tlv;
1048 	void *ptr;
1049 	int ret, len, i, ml_arg_size = 0;
1050 
1051 	if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
1052 		return -EINVAL;
1053 
1054 	len = sizeof(*cmd) + sizeof(*chan) + TLV_HDR_SIZE;
1055 
1056 	if (!restart && arg->ml.enabled) {
1057 		ml_arg_size = TLV_HDR_SIZE + sizeof(*ml_params) +
1058 			      TLV_HDR_SIZE + (arg->ml.num_partner_links *
1059 					      sizeof(*partner_info));
1060 		len += ml_arg_size;
1061 	}
1062 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1063 	if (!skb)
1064 		return -ENOMEM;
1065 
1066 	cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
1067 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_START_REQUEST_CMD,
1068 						 sizeof(*cmd));
1069 	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1070 	cmd->beacon_interval = cpu_to_le32(arg->bcn_intval);
1071 	cmd->bcn_tx_rate = cpu_to_le32(arg->bcn_tx_rate);
1072 	cmd->dtim_period = cpu_to_le32(arg->dtim_period);
1073 	cmd->num_noa_descriptors = cpu_to_le32(arg->num_noa_descriptors);
1074 	cmd->preferred_rx_streams = cpu_to_le32(arg->pref_rx_streams);
1075 	cmd->preferred_tx_streams = cpu_to_le32(arg->pref_tx_streams);
1076 	cmd->cac_duration_ms = cpu_to_le32(arg->cac_duration_ms);
1077 	cmd->regdomain = cpu_to_le32(arg->regdomain);
1078 	cmd->he_ops = cpu_to_le32(arg->he_ops);
1079 	cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap);
1080 	cmd->mbssid_flags = cpu_to_le32(arg->mbssid_flags);
1081 	cmd->mbssid_tx_vdev_id = cpu_to_le32(arg->mbssid_tx_vdev_id);
1082 
1083 	if (!restart) {
1084 		if (arg->ssid) {
1085 			cmd->ssid.ssid_len = cpu_to_le32(arg->ssid_len);
1086 			memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
1087 		}
1088 		if (arg->hidden_ssid)
1089 			cmd->flags |= cpu_to_le32(WMI_VDEV_START_HIDDEN_SSID);
1090 		if (arg->pmf_enabled)
1091 			cmd->flags |= cpu_to_le32(WMI_VDEV_START_PMF_ENABLED);
1092 	}
1093 
1094 	cmd->flags |= cpu_to_le32(WMI_VDEV_START_LDPC_RX_ENABLED);
1095 
1096 	ptr = skb->data + sizeof(*cmd);
1097 	chan = ptr;
1098 
1099 	ath12k_wmi_put_wmi_channel(chan, arg);
1100 
1101 	chan->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL,
1102 						  sizeof(*chan));
1103 	ptr += sizeof(*chan);
1104 
1105 	tlv = ptr;
1106 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
1107 
1108 	/* Note: This is a nested TLV containing:
1109 	 * [wmi_tlv][ath12k_wmi_p2p_noa_descriptor][wmi_tlv]..
1110 	 */
1111 
1112 	ptr += sizeof(*tlv);
1113 
1114 	if (ml_arg_size) {
1115 		tlv = ptr;
1116 		tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
1117 						 sizeof(*ml_params));
1118 		ptr += TLV_HDR_SIZE;
1119 
1120 		ml_params = ptr;
1121 
1122 		ml_params->tlv_header =
1123 			ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_VDEV_START_PARAMS,
1124 					       sizeof(*ml_params));
1125 
1126 		ml_params->flags = le32_encode_bits(arg->ml.enabled,
1127 						    ATH12K_WMI_FLAG_MLO_ENABLED) |
1128 				   le32_encode_bits(arg->ml.assoc_link,
1129 						    ATH12K_WMI_FLAG_MLO_ASSOC_LINK) |
1130 				   le32_encode_bits(arg->ml.mcast_link,
1131 						    ATH12K_WMI_FLAG_MLO_MCAST_VDEV) |
1132 				   le32_encode_bits(arg->ml.link_add,
1133 						    ATH12K_WMI_FLAG_MLO_LINK_ADD);
1134 
1135 		ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "vdev %d start ml flags 0x%x\n",
1136 			   arg->vdev_id, ml_params->flags);
1137 
1138 		ptr += sizeof(*ml_params);
1139 
1140 		tlv = ptr;
1141 		tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
1142 						 arg->ml.num_partner_links *
1143 						 sizeof(*partner_info));
1144 		ptr += TLV_HDR_SIZE;
1145 
1146 		partner_info = ptr;
1147 
1148 		for (i = 0; i < arg->ml.num_partner_links; i++) {
1149 			partner_info->tlv_header =
1150 				ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_PARTNER_LINK_PARAMS,
1151 						       sizeof(*partner_info));
1152 			partner_info->vdev_id =
1153 				cpu_to_le32(arg->ml.partner_info[i].vdev_id);
1154 			partner_info->hw_link_id =
1155 				cpu_to_le32(arg->ml.partner_info[i].hw_link_id);
1156 			ether_addr_copy(partner_info->vdev_addr.addr,
1157 					arg->ml.partner_info[i].addr);
1158 
1159 			ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "partner vdev %d hw_link_id %d macaddr%pM\n",
1160 				   partner_info->vdev_id, partner_info->hw_link_id,
1161 				   partner_info->vdev_addr.addr);
1162 
1163 			partner_info++;
1164 		}
1165 
1166 		ptr = partner_info;
1167 	}
1168 
1169 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "vdev %s id 0x%x freq 0x%x mode 0x%x\n",
1170 		   restart ? "restart" : "start", arg->vdev_id,
1171 		   arg->freq, arg->mode);
1172 
1173 	if (restart)
1174 		ret = ath12k_wmi_cmd_send(wmi, skb,
1175 					  WMI_VDEV_RESTART_REQUEST_CMDID);
1176 	else
1177 		ret = ath12k_wmi_cmd_send(wmi, skb,
1178 					  WMI_VDEV_START_REQUEST_CMDID);
1179 	if (ret) {
1180 		ath12k_warn(ar->ab, "failed to submit vdev_%s cmd\n",
1181 			    restart ? "restart" : "start");
1182 		dev_kfree_skb(skb);
1183 	}
1184 
1185 	return ret;
1186 }
1187 
ath12k_wmi_vdev_up(struct ath12k * ar,struct ath12k_wmi_vdev_up_params * params)1188 int ath12k_wmi_vdev_up(struct ath12k *ar, struct ath12k_wmi_vdev_up_params *params)
1189 {
1190 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1191 	struct wmi_vdev_up_cmd *cmd;
1192 	struct sk_buff *skb;
1193 	int ret;
1194 
1195 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1196 	if (!skb)
1197 		return -ENOMEM;
1198 
1199 	cmd = (struct wmi_vdev_up_cmd *)skb->data;
1200 
1201 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_UP_CMD,
1202 						 sizeof(*cmd));
1203 	cmd->vdev_id = cpu_to_le32(params->vdev_id);
1204 	cmd->vdev_assoc_id = cpu_to_le32(params->aid);
1205 
1206 	ether_addr_copy(cmd->vdev_bssid.addr, params->bssid);
1207 
1208 	if (params->tx_bssid) {
1209 		ether_addr_copy(cmd->tx_vdev_bssid.addr, params->tx_bssid);
1210 		cmd->nontx_profile_idx = cpu_to_le32(params->nontx_profile_idx);
1211 		cmd->nontx_profile_cnt = cpu_to_le32(params->nontx_profile_cnt);
1212 	}
1213 
1214 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1215 		   "WMI mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
1216 		   params->vdev_id, params->aid, params->bssid);
1217 
1218 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_UP_CMDID);
1219 	if (ret) {
1220 		ath12k_warn(ar->ab, "failed to submit WMI_VDEV_UP cmd\n");
1221 		dev_kfree_skb(skb);
1222 	}
1223 
1224 	return ret;
1225 }
1226 
ath12k_wmi_send_peer_create_cmd(struct ath12k * ar,struct ath12k_wmi_peer_create_arg * arg)1227 int ath12k_wmi_send_peer_create_cmd(struct ath12k *ar,
1228 				    struct ath12k_wmi_peer_create_arg *arg)
1229 {
1230 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1231 	struct wmi_peer_create_cmd *cmd;
1232 	struct sk_buff *skb;
1233 	int ret, len;
1234 	struct wmi_peer_create_mlo_params *ml_param;
1235 	void *ptr;
1236 	struct wmi_tlv *tlv;
1237 
1238 	len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(*ml_param);
1239 
1240 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1241 	if (!skb)
1242 		return -ENOMEM;
1243 
1244 	cmd = (struct wmi_peer_create_cmd *)skb->data;
1245 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_CREATE_CMD,
1246 						 sizeof(*cmd));
1247 
1248 	ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_addr);
1249 	cmd->peer_type = cpu_to_le32(arg->peer_type);
1250 	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1251 
1252 	ptr = skb->data + sizeof(*cmd);
1253 	tlv = ptr;
1254 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
1255 					 sizeof(*ml_param));
1256 	ptr += TLV_HDR_SIZE;
1257 	ml_param = ptr;
1258 	ml_param->tlv_header =
1259 			ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_PEER_CREATE_PARAMS,
1260 					       sizeof(*ml_param));
1261 	if (arg->ml_enabled)
1262 		ml_param->flags = cpu_to_le32(ATH12K_WMI_FLAG_MLO_ENABLED);
1263 
1264 	ptr += sizeof(*ml_param);
1265 
1266 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1267 		   "WMI peer create vdev_id %d peer_addr %pM ml_flags 0x%x\n",
1268 		   arg->vdev_id, arg->peer_addr, ml_param->flags);
1269 
1270 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_CREATE_CMDID);
1271 	if (ret) {
1272 		ath12k_warn(ar->ab, "failed to submit WMI_PEER_CREATE cmd\n");
1273 		dev_kfree_skb(skb);
1274 	}
1275 
1276 	return ret;
1277 }
1278 
ath12k_wmi_send_peer_delete_cmd(struct ath12k * ar,const u8 * peer_addr,u8 vdev_id)1279 int ath12k_wmi_send_peer_delete_cmd(struct ath12k *ar,
1280 				    const u8 *peer_addr, u8 vdev_id)
1281 {
1282 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1283 	struct wmi_peer_delete_cmd *cmd;
1284 	struct sk_buff *skb;
1285 	int ret;
1286 
1287 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1288 	if (!skb)
1289 		return -ENOMEM;
1290 
1291 	cmd = (struct wmi_peer_delete_cmd *)skb->data;
1292 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_DELETE_CMD,
1293 						 sizeof(*cmd));
1294 
1295 	ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1296 	cmd->vdev_id = cpu_to_le32(vdev_id);
1297 
1298 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1299 		   "WMI peer delete vdev_id %d peer_addr %pM\n",
1300 		   vdev_id,  peer_addr);
1301 
1302 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_DELETE_CMDID);
1303 	if (ret) {
1304 		ath12k_warn(ar->ab, "failed to send WMI_PEER_DELETE cmd\n");
1305 		dev_kfree_skb(skb);
1306 	}
1307 
1308 	return ret;
1309 }
1310 
ath12k_wmi_send_pdev_set_regdomain(struct ath12k * ar,struct ath12k_wmi_pdev_set_regdomain_arg * arg)1311 int ath12k_wmi_send_pdev_set_regdomain(struct ath12k *ar,
1312 				       struct ath12k_wmi_pdev_set_regdomain_arg *arg)
1313 {
1314 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1315 	struct wmi_pdev_set_regdomain_cmd *cmd;
1316 	struct sk_buff *skb;
1317 	int ret;
1318 
1319 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1320 	if (!skb)
1321 		return -ENOMEM;
1322 
1323 	cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
1324 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_REGDOMAIN_CMD,
1325 						 sizeof(*cmd));
1326 
1327 	cmd->reg_domain = cpu_to_le32(arg->current_rd_in_use);
1328 	cmd->reg_domain_2g = cpu_to_le32(arg->current_rd_2g);
1329 	cmd->reg_domain_5g = cpu_to_le32(arg->current_rd_5g);
1330 	cmd->conformance_test_limit_2g = cpu_to_le32(arg->ctl_2g);
1331 	cmd->conformance_test_limit_5g = cpu_to_le32(arg->ctl_5g);
1332 	cmd->dfs_domain = cpu_to_le32(arg->dfs_domain);
1333 	cmd->pdev_id = cpu_to_le32(arg->pdev_id);
1334 
1335 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1336 		   "WMI pdev regd rd %d rd2g %d rd5g %d domain %d pdev id %d\n",
1337 		   arg->current_rd_in_use, arg->current_rd_2g,
1338 		   arg->current_rd_5g, arg->dfs_domain, arg->pdev_id);
1339 
1340 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_REGDOMAIN_CMDID);
1341 	if (ret) {
1342 		ath12k_warn(ar->ab,
1343 			    "failed to send WMI_PDEV_SET_REGDOMAIN cmd\n");
1344 		dev_kfree_skb(skb);
1345 	}
1346 
1347 	return ret;
1348 }
1349 
ath12k_wmi_set_peer_param(struct ath12k * ar,const u8 * peer_addr,u32 vdev_id,u32 param_id,u32 param_val)1350 int ath12k_wmi_set_peer_param(struct ath12k *ar, const u8 *peer_addr,
1351 			      u32 vdev_id, u32 param_id, u32 param_val)
1352 {
1353 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1354 	struct wmi_peer_set_param_cmd *cmd;
1355 	struct sk_buff *skb;
1356 	int ret;
1357 
1358 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1359 	if (!skb)
1360 		return -ENOMEM;
1361 
1362 	cmd = (struct wmi_peer_set_param_cmd *)skb->data;
1363 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_SET_PARAM_CMD,
1364 						 sizeof(*cmd));
1365 	ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1366 	cmd->vdev_id = cpu_to_le32(vdev_id);
1367 	cmd->param_id = cpu_to_le32(param_id);
1368 	cmd->param_value = cpu_to_le32(param_val);
1369 
1370 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1371 		   "WMI vdev %d peer 0x%pM set param %d value %d\n",
1372 		   vdev_id, peer_addr, param_id, param_val);
1373 
1374 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_SET_PARAM_CMDID);
1375 	if (ret) {
1376 		ath12k_warn(ar->ab, "failed to send WMI_PEER_SET_PARAM cmd\n");
1377 		dev_kfree_skb(skb);
1378 	}
1379 
1380 	return ret;
1381 }
1382 
ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k * ar,u8 peer_addr[ETH_ALEN],u32 peer_tid_bitmap,u8 vdev_id)1383 int ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k *ar,
1384 					u8 peer_addr[ETH_ALEN],
1385 					u32 peer_tid_bitmap,
1386 					u8 vdev_id)
1387 {
1388 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1389 	struct wmi_peer_flush_tids_cmd *cmd;
1390 	struct sk_buff *skb;
1391 	int ret;
1392 
1393 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1394 	if (!skb)
1395 		return -ENOMEM;
1396 
1397 	cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
1398 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_FLUSH_TIDS_CMD,
1399 						 sizeof(*cmd));
1400 
1401 	ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1402 	cmd->peer_tid_bitmap = cpu_to_le32(peer_tid_bitmap);
1403 	cmd->vdev_id = cpu_to_le32(vdev_id);
1404 
1405 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1406 		   "WMI peer flush vdev_id %d peer_addr %pM tids %08x\n",
1407 		   vdev_id, peer_addr, peer_tid_bitmap);
1408 
1409 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_FLUSH_TIDS_CMDID);
1410 	if (ret) {
1411 		ath12k_warn(ar->ab,
1412 			    "failed to send WMI_PEER_FLUSH_TIDS cmd\n");
1413 		dev_kfree_skb(skb);
1414 	}
1415 
1416 	return ret;
1417 }
1418 
ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k * ar,int vdev_id,const u8 * addr,dma_addr_t paddr,u8 tid,u8 ba_window_size_valid,u32 ba_window_size)1419 int ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k *ar,
1420 					   int vdev_id, const u8 *addr,
1421 					   dma_addr_t paddr, u8 tid,
1422 					   u8 ba_window_size_valid,
1423 					   u32 ba_window_size)
1424 {
1425 	struct wmi_peer_reorder_queue_setup_cmd *cmd;
1426 	struct sk_buff *skb;
1427 	int ret;
1428 
1429 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
1430 	if (!skb)
1431 		return -ENOMEM;
1432 
1433 	cmd = (struct wmi_peer_reorder_queue_setup_cmd *)skb->data;
1434 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_SETUP_CMD,
1435 						 sizeof(*cmd));
1436 
1437 	ether_addr_copy(cmd->peer_macaddr.addr, addr);
1438 	cmd->vdev_id = cpu_to_le32(vdev_id);
1439 	cmd->tid = cpu_to_le32(tid);
1440 	cmd->queue_ptr_lo = cpu_to_le32(lower_32_bits(paddr));
1441 	cmd->queue_ptr_hi = cpu_to_le32(upper_32_bits(paddr));
1442 	cmd->queue_no = cpu_to_le32(tid);
1443 	cmd->ba_window_size_valid = cpu_to_le32(ba_window_size_valid);
1444 	cmd->ba_window_size = cpu_to_le32(ba_window_size);
1445 
1446 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1447 		   "wmi rx reorder queue setup addr %pM vdev_id %d tid %d\n",
1448 		   addr, vdev_id, tid);
1449 
1450 	ret = ath12k_wmi_cmd_send(ar->wmi, skb,
1451 				  WMI_PEER_REORDER_QUEUE_SETUP_CMDID);
1452 	if (ret) {
1453 		ath12k_warn(ar->ab,
1454 			    "failed to send WMI_PEER_REORDER_QUEUE_SETUP\n");
1455 		dev_kfree_skb(skb);
1456 	}
1457 
1458 	return ret;
1459 }
1460 
1461 int
ath12k_wmi_rx_reord_queue_remove(struct ath12k * ar,struct ath12k_wmi_rx_reorder_queue_remove_arg * arg)1462 ath12k_wmi_rx_reord_queue_remove(struct ath12k *ar,
1463 				 struct ath12k_wmi_rx_reorder_queue_remove_arg *arg)
1464 {
1465 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1466 	struct wmi_peer_reorder_queue_remove_cmd *cmd;
1467 	struct sk_buff *skb;
1468 	int ret;
1469 
1470 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1471 	if (!skb)
1472 		return -ENOMEM;
1473 
1474 	cmd = (struct wmi_peer_reorder_queue_remove_cmd *)skb->data;
1475 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_REMOVE_CMD,
1476 						 sizeof(*cmd));
1477 
1478 	ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_macaddr);
1479 	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1480 	cmd->tid_mask = cpu_to_le32(arg->peer_tid_bitmap);
1481 
1482 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1483 		   "%s: peer_macaddr %pM vdev_id %d, tid_map %d", __func__,
1484 		   arg->peer_macaddr, arg->vdev_id, arg->peer_tid_bitmap);
1485 
1486 	ret = ath12k_wmi_cmd_send(wmi, skb,
1487 				  WMI_PEER_REORDER_QUEUE_REMOVE_CMDID);
1488 	if (ret) {
1489 		ath12k_warn(ar->ab,
1490 			    "failed to send WMI_PEER_REORDER_QUEUE_REMOVE_CMDID");
1491 		dev_kfree_skb(skb);
1492 	}
1493 
1494 	return ret;
1495 }
1496 
ath12k_wmi_pdev_set_param(struct ath12k * ar,u32 param_id,u32 param_value,u8 pdev_id)1497 int ath12k_wmi_pdev_set_param(struct ath12k *ar, u32 param_id,
1498 			      u32 param_value, u8 pdev_id)
1499 {
1500 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1501 	struct wmi_pdev_set_param_cmd *cmd;
1502 	struct sk_buff *skb;
1503 	int ret;
1504 
1505 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1506 	if (!skb)
1507 		return -ENOMEM;
1508 
1509 	cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
1510 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_PARAM_CMD,
1511 						 sizeof(*cmd));
1512 	cmd->pdev_id = cpu_to_le32(pdev_id);
1513 	cmd->param_id = cpu_to_le32(param_id);
1514 	cmd->param_value = cpu_to_le32(param_value);
1515 
1516 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1517 		   "WMI pdev set param %d pdev id %d value %d\n",
1518 		   param_id, pdev_id, param_value);
1519 
1520 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_PARAM_CMDID);
1521 	if (ret) {
1522 		ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n");
1523 		dev_kfree_skb(skb);
1524 	}
1525 
1526 	return ret;
1527 }
1528 
ath12k_wmi_pdev_set_ps_mode(struct ath12k * ar,int vdev_id,u32 enable)1529 int ath12k_wmi_pdev_set_ps_mode(struct ath12k *ar, int vdev_id, u32 enable)
1530 {
1531 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1532 	struct wmi_pdev_set_ps_mode_cmd *cmd;
1533 	struct sk_buff *skb;
1534 	int ret;
1535 
1536 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1537 	if (!skb)
1538 		return -ENOMEM;
1539 
1540 	cmd = (struct wmi_pdev_set_ps_mode_cmd *)skb->data;
1541 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_MODE_CMD,
1542 						 sizeof(*cmd));
1543 	cmd->vdev_id = cpu_to_le32(vdev_id);
1544 	cmd->sta_ps_mode = cpu_to_le32(enable);
1545 
1546 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1547 		   "WMI vdev set psmode %d vdev id %d\n",
1548 		   enable, vdev_id);
1549 
1550 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_MODE_CMDID);
1551 	if (ret) {
1552 		ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n");
1553 		dev_kfree_skb(skb);
1554 	}
1555 
1556 	return ret;
1557 }
1558 
ath12k_wmi_pdev_suspend(struct ath12k * ar,u32 suspend_opt,u32 pdev_id)1559 int ath12k_wmi_pdev_suspend(struct ath12k *ar, u32 suspend_opt,
1560 			    u32 pdev_id)
1561 {
1562 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1563 	struct wmi_pdev_suspend_cmd *cmd;
1564 	struct sk_buff *skb;
1565 	int ret;
1566 
1567 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1568 	if (!skb)
1569 		return -ENOMEM;
1570 
1571 	cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
1572 
1573 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SUSPEND_CMD,
1574 						 sizeof(*cmd));
1575 
1576 	cmd->suspend_opt = cpu_to_le32(suspend_opt);
1577 	cmd->pdev_id = cpu_to_le32(pdev_id);
1578 
1579 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1580 		   "WMI pdev suspend pdev_id %d\n", pdev_id);
1581 
1582 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SUSPEND_CMDID);
1583 	if (ret) {
1584 		ath12k_warn(ar->ab, "failed to send WMI_PDEV_SUSPEND cmd\n");
1585 		dev_kfree_skb(skb);
1586 	}
1587 
1588 	return ret;
1589 }
1590 
ath12k_wmi_pdev_resume(struct ath12k * ar,u32 pdev_id)1591 int ath12k_wmi_pdev_resume(struct ath12k *ar, u32 pdev_id)
1592 {
1593 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1594 	struct wmi_pdev_resume_cmd *cmd;
1595 	struct sk_buff *skb;
1596 	int ret;
1597 
1598 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1599 	if (!skb)
1600 		return -ENOMEM;
1601 
1602 	cmd = (struct wmi_pdev_resume_cmd *)skb->data;
1603 
1604 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_RESUME_CMD,
1605 						 sizeof(*cmd));
1606 	cmd->pdev_id = cpu_to_le32(pdev_id);
1607 
1608 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1609 		   "WMI pdev resume pdev id %d\n", pdev_id);
1610 
1611 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_RESUME_CMDID);
1612 	if (ret) {
1613 		ath12k_warn(ar->ab, "failed to send WMI_PDEV_RESUME cmd\n");
1614 		dev_kfree_skb(skb);
1615 	}
1616 
1617 	return ret;
1618 }
1619 
1620 /* TODO FW Support for the cmd is not available yet.
1621  * Can be tested once the command and corresponding
1622  * event is implemented in FW
1623  */
ath12k_wmi_pdev_bss_chan_info_request(struct ath12k * ar,enum wmi_bss_chan_info_req_type type)1624 int ath12k_wmi_pdev_bss_chan_info_request(struct ath12k *ar,
1625 					  enum wmi_bss_chan_info_req_type type)
1626 {
1627 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1628 	struct wmi_pdev_bss_chan_info_req_cmd *cmd;
1629 	struct sk_buff *skb;
1630 	int ret;
1631 
1632 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1633 	if (!skb)
1634 		return -ENOMEM;
1635 
1636 	cmd = (struct wmi_pdev_bss_chan_info_req_cmd *)skb->data;
1637 
1638 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST,
1639 						 sizeof(*cmd));
1640 	cmd->req_type = cpu_to_le32(type);
1641 	cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
1642 
1643 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1644 		   "WMI bss chan info req type %d\n", type);
1645 
1646 	ret = ath12k_wmi_cmd_send(wmi, skb,
1647 				  WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID);
1648 	if (ret) {
1649 		ath12k_warn(ar->ab,
1650 			    "failed to send WMI_PDEV_BSS_CHAN_INFO_REQUEST cmd\n");
1651 		dev_kfree_skb(skb);
1652 	}
1653 
1654 	return ret;
1655 }
1656 
ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k * ar,u8 * peer_addr,struct ath12k_wmi_ap_ps_arg * arg)1657 int ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k *ar, u8 *peer_addr,
1658 					struct ath12k_wmi_ap_ps_arg *arg)
1659 {
1660 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1661 	struct wmi_ap_ps_peer_cmd *cmd;
1662 	struct sk_buff *skb;
1663 	int ret;
1664 
1665 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1666 	if (!skb)
1667 		return -ENOMEM;
1668 
1669 	cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
1670 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_AP_PS_PEER_CMD,
1671 						 sizeof(*cmd));
1672 
1673 	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1674 	ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1675 	cmd->param = cpu_to_le32(arg->param);
1676 	cmd->value = cpu_to_le32(arg->value);
1677 
1678 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1679 		   "WMI set ap ps vdev id %d peer %pM param %d value %d\n",
1680 		   arg->vdev_id, peer_addr, arg->param, arg->value);
1681 
1682 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_AP_PS_PEER_PARAM_CMDID);
1683 	if (ret) {
1684 		ath12k_warn(ar->ab,
1685 			    "failed to send WMI_AP_PS_PEER_PARAM_CMDID\n");
1686 		dev_kfree_skb(skb);
1687 	}
1688 
1689 	return ret;
1690 }
1691 
ath12k_wmi_set_sta_ps_param(struct ath12k * ar,u32 vdev_id,u32 param,u32 param_value)1692 int ath12k_wmi_set_sta_ps_param(struct ath12k *ar, u32 vdev_id,
1693 				u32 param, u32 param_value)
1694 {
1695 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1696 	struct wmi_sta_powersave_param_cmd *cmd;
1697 	struct sk_buff *skb;
1698 	int ret;
1699 
1700 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1701 	if (!skb)
1702 		return -ENOMEM;
1703 
1704 	cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
1705 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_PARAM_CMD,
1706 						 sizeof(*cmd));
1707 
1708 	cmd->vdev_id = cpu_to_le32(vdev_id);
1709 	cmd->param = cpu_to_le32(param);
1710 	cmd->value = cpu_to_le32(param_value);
1711 
1712 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1713 		   "WMI set sta ps vdev_id %d param %d value %d\n",
1714 		   vdev_id, param, param_value);
1715 
1716 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_PARAM_CMDID);
1717 	if (ret) {
1718 		ath12k_warn(ar->ab, "failed to send WMI_STA_POWERSAVE_PARAM_CMDID");
1719 		dev_kfree_skb(skb);
1720 	}
1721 
1722 	return ret;
1723 }
1724 
ath12k_wmi_force_fw_hang_cmd(struct ath12k * ar,u32 type,u32 delay_time_ms)1725 int ath12k_wmi_force_fw_hang_cmd(struct ath12k *ar, u32 type, u32 delay_time_ms)
1726 {
1727 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1728 	struct wmi_force_fw_hang_cmd *cmd;
1729 	struct sk_buff *skb;
1730 	int ret, len;
1731 
1732 	len = sizeof(*cmd);
1733 
1734 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1735 	if (!skb)
1736 		return -ENOMEM;
1737 
1738 	cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
1739 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FORCE_FW_HANG_CMD,
1740 						 len);
1741 
1742 	cmd->type = cpu_to_le32(type);
1743 	cmd->delay_time_ms = cpu_to_le32(delay_time_ms);
1744 
1745 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_FORCE_FW_HANG_CMDID);
1746 
1747 	if (ret) {
1748 		ath12k_warn(ar->ab, "Failed to send WMI_FORCE_FW_HANG_CMDID");
1749 		dev_kfree_skb(skb);
1750 	}
1751 	return ret;
1752 }
1753 
ath12k_wmi_vdev_set_param_cmd(struct ath12k * ar,u32 vdev_id,u32 param_id,u32 param_value)1754 int ath12k_wmi_vdev_set_param_cmd(struct ath12k *ar, u32 vdev_id,
1755 				  u32 param_id, u32 param_value)
1756 {
1757 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1758 	struct wmi_vdev_set_param_cmd *cmd;
1759 	struct sk_buff *skb;
1760 	int ret;
1761 
1762 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1763 	if (!skb)
1764 		return -ENOMEM;
1765 
1766 	cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
1767 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_PARAM_CMD,
1768 						 sizeof(*cmd));
1769 
1770 	cmd->vdev_id = cpu_to_le32(vdev_id);
1771 	cmd->param_id = cpu_to_le32(param_id);
1772 	cmd->param_value = cpu_to_le32(param_value);
1773 
1774 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1775 		   "WMI vdev id 0x%x set param %d value %d\n",
1776 		   vdev_id, param_id, param_value);
1777 
1778 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_SET_PARAM_CMDID);
1779 	if (ret) {
1780 		ath12k_warn(ar->ab,
1781 			    "failed to send WMI_VDEV_SET_PARAM_CMDID\n");
1782 		dev_kfree_skb(skb);
1783 	}
1784 
1785 	return ret;
1786 }
1787 
ath12k_wmi_send_pdev_temperature_cmd(struct ath12k * ar)1788 int ath12k_wmi_send_pdev_temperature_cmd(struct ath12k *ar)
1789 {
1790 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1791 	struct wmi_get_pdev_temperature_cmd *cmd;
1792 	struct sk_buff *skb;
1793 	int ret;
1794 
1795 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1796 	if (!skb)
1797 		return -ENOMEM;
1798 
1799 	cmd = (struct wmi_get_pdev_temperature_cmd *)skb->data;
1800 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_GET_TEMPERATURE_CMD,
1801 						 sizeof(*cmd));
1802 	cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
1803 
1804 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1805 		   "WMI pdev get temperature for pdev_id %d\n", ar->pdev->pdev_id);
1806 
1807 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_GET_TEMPERATURE_CMDID);
1808 	if (ret) {
1809 		ath12k_warn(ar->ab, "failed to send WMI_PDEV_GET_TEMPERATURE cmd\n");
1810 		dev_kfree_skb(skb);
1811 	}
1812 
1813 	return ret;
1814 }
1815 
ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k * ar,u32 vdev_id,u32 bcn_ctrl_op)1816 int ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k *ar,
1817 					    u32 vdev_id, u32 bcn_ctrl_op)
1818 {
1819 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1820 	struct wmi_bcn_offload_ctrl_cmd *cmd;
1821 	struct sk_buff *skb;
1822 	int ret;
1823 
1824 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1825 	if (!skb)
1826 		return -ENOMEM;
1827 
1828 	cmd = (struct wmi_bcn_offload_ctrl_cmd *)skb->data;
1829 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_OFFLOAD_CTRL_CMD,
1830 						 sizeof(*cmd));
1831 
1832 	cmd->vdev_id = cpu_to_le32(vdev_id);
1833 	cmd->bcn_ctrl_op = cpu_to_le32(bcn_ctrl_op);
1834 
1835 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1836 		   "WMI bcn ctrl offload vdev id %d ctrl_op %d\n",
1837 		   vdev_id, bcn_ctrl_op);
1838 
1839 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_OFFLOAD_CTRL_CMDID);
1840 	if (ret) {
1841 		ath12k_warn(ar->ab,
1842 			    "failed to send WMI_BCN_OFFLOAD_CTRL_CMDID\n");
1843 		dev_kfree_skb(skb);
1844 	}
1845 
1846 	return ret;
1847 }
1848 
ath12k_wmi_p2p_go_bcn_ie(struct ath12k * ar,u32 vdev_id,const u8 * p2p_ie)1849 int ath12k_wmi_p2p_go_bcn_ie(struct ath12k *ar, u32 vdev_id,
1850 			     const u8 *p2p_ie)
1851 {
1852 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1853 	struct wmi_p2p_go_set_beacon_ie_cmd *cmd;
1854 	size_t p2p_ie_len, aligned_len;
1855 	struct wmi_tlv *tlv;
1856 	struct sk_buff *skb;
1857 	void *ptr;
1858 	int ret, len;
1859 
1860 	p2p_ie_len = p2p_ie[1] + 2;
1861 	aligned_len = roundup(p2p_ie_len, sizeof(u32));
1862 
1863 	len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len;
1864 
1865 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1866 	if (!skb)
1867 		return -ENOMEM;
1868 
1869 	ptr = skb->data;
1870 	cmd = ptr;
1871 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_P2P_GO_SET_BEACON_IE,
1872 						 sizeof(*cmd));
1873 	cmd->vdev_id = cpu_to_le32(vdev_id);
1874 	cmd->ie_buf_len = cpu_to_le32(p2p_ie_len);
1875 
1876 	ptr += sizeof(*cmd);
1877 	tlv = ptr;
1878 	tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_BYTE,
1879 					     aligned_len);
1880 	memcpy(tlv->value, p2p_ie, p2p_ie_len);
1881 
1882 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_P2P_GO_SET_BEACON_IE);
1883 	if (ret) {
1884 		ath12k_warn(ar->ab, "failed to send WMI_P2P_GO_SET_BEACON_IE\n");
1885 		dev_kfree_skb(skb);
1886 	}
1887 
1888 	return ret;
1889 }
1890 
ath12k_wmi_bcn_tmpl(struct ath12k * ar,u32 vdev_id,struct ieee80211_mutable_offsets * offs,struct sk_buff * bcn,struct ath12k_wmi_bcn_tmpl_ema_arg * ema_args)1891 int ath12k_wmi_bcn_tmpl(struct ath12k *ar, u32 vdev_id,
1892 			struct ieee80211_mutable_offsets *offs,
1893 			struct sk_buff *bcn,
1894 			struct ath12k_wmi_bcn_tmpl_ema_arg *ema_args)
1895 {
1896 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1897 	struct wmi_bcn_tmpl_cmd *cmd;
1898 	struct ath12k_wmi_bcn_prb_info_params *bcn_prb_info;
1899 	struct wmi_tlv *tlv;
1900 	struct sk_buff *skb;
1901 	u32 ema_params = 0;
1902 	void *ptr;
1903 	int ret, len;
1904 	size_t aligned_len = roundup(bcn->len, 4);
1905 
1906 	len = sizeof(*cmd) + sizeof(*bcn_prb_info) + TLV_HDR_SIZE + aligned_len;
1907 
1908 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1909 	if (!skb)
1910 		return -ENOMEM;
1911 
1912 	cmd = (struct wmi_bcn_tmpl_cmd *)skb->data;
1913 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_TMPL_CMD,
1914 						 sizeof(*cmd));
1915 	cmd->vdev_id = cpu_to_le32(vdev_id);
1916 	cmd->tim_ie_offset = cpu_to_le32(offs->tim_offset);
1917 	cmd->csa_switch_count_offset = cpu_to_le32(offs->cntdwn_counter_offs[0]);
1918 	cmd->ext_csa_switch_count_offset = cpu_to_le32(offs->cntdwn_counter_offs[1]);
1919 	cmd->buf_len = cpu_to_le32(bcn->len);
1920 	cmd->mbssid_ie_offset = cpu_to_le32(offs->mbssid_off);
1921 	if (ema_args) {
1922 		u32p_replace_bits(&ema_params, ema_args->bcn_cnt, WMI_EMA_BEACON_CNT);
1923 		u32p_replace_bits(&ema_params, ema_args->bcn_index, WMI_EMA_BEACON_IDX);
1924 		if (ema_args->bcn_index == 0)
1925 			u32p_replace_bits(&ema_params, 1, WMI_EMA_BEACON_FIRST);
1926 		if (ema_args->bcn_index + 1 == ema_args->bcn_cnt)
1927 			u32p_replace_bits(&ema_params, 1, WMI_EMA_BEACON_LAST);
1928 		cmd->ema_params = cpu_to_le32(ema_params);
1929 	}
1930 
1931 	ptr = skb->data + sizeof(*cmd);
1932 
1933 	bcn_prb_info = ptr;
1934 	len = sizeof(*bcn_prb_info);
1935 	bcn_prb_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO,
1936 							  len);
1937 	bcn_prb_info->caps = 0;
1938 	bcn_prb_info->erp = 0;
1939 
1940 	ptr += sizeof(*bcn_prb_info);
1941 
1942 	tlv = ptr;
1943 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len);
1944 	memcpy(tlv->value, bcn->data, bcn->len);
1945 
1946 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_TMPL_CMDID);
1947 	if (ret) {
1948 		ath12k_warn(ar->ab, "failed to send WMI_BCN_TMPL_CMDID\n");
1949 		dev_kfree_skb(skb);
1950 	}
1951 
1952 	return ret;
1953 }
1954 
ath12k_wmi_vdev_install_key(struct ath12k * ar,struct wmi_vdev_install_key_arg * arg)1955 int ath12k_wmi_vdev_install_key(struct ath12k *ar,
1956 				struct wmi_vdev_install_key_arg *arg)
1957 {
1958 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1959 	struct wmi_vdev_install_key_cmd *cmd;
1960 	struct wmi_tlv *tlv;
1961 	struct sk_buff *skb;
1962 	int ret, len, key_len_aligned;
1963 
1964 	/* WMI_TAG_ARRAY_BYTE needs to be aligned with 4, the actual key
1965 	 * length is specified in cmd->key_len.
1966 	 */
1967 	key_len_aligned = roundup(arg->key_len, 4);
1968 
1969 	len = sizeof(*cmd) + TLV_HDR_SIZE + key_len_aligned;
1970 
1971 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1972 	if (!skb)
1973 		return -ENOMEM;
1974 
1975 	cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
1976 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_INSTALL_KEY_CMD,
1977 						 sizeof(*cmd));
1978 	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1979 	ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
1980 	cmd->key_idx = cpu_to_le32(arg->key_idx);
1981 	cmd->key_flags = cpu_to_le32(arg->key_flags);
1982 	cmd->key_cipher = cpu_to_le32(arg->key_cipher);
1983 	cmd->key_len = cpu_to_le32(arg->key_len);
1984 	cmd->key_txmic_len = cpu_to_le32(arg->key_txmic_len);
1985 	cmd->key_rxmic_len = cpu_to_le32(arg->key_rxmic_len);
1986 
1987 	if (arg->key_rsc_counter)
1988 		cmd->key_rsc_counter = cpu_to_le64(arg->key_rsc_counter);
1989 
1990 	tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd));
1991 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, key_len_aligned);
1992 	memcpy(tlv->value, arg->key_data, arg->key_len);
1993 
1994 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1995 		   "WMI vdev install key idx %d cipher %d len %d\n",
1996 		   arg->key_idx, arg->key_cipher, arg->key_len);
1997 
1998 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_INSTALL_KEY_CMDID);
1999 	if (ret) {
2000 		ath12k_warn(ar->ab,
2001 			    "failed to send WMI_VDEV_INSTALL_KEY cmd\n");
2002 		dev_kfree_skb(skb);
2003 	}
2004 
2005 	return ret;
2006 }
2007 
ath12k_wmi_copy_peer_flags(struct wmi_peer_assoc_complete_cmd * cmd,struct ath12k_wmi_peer_assoc_arg * arg,bool hw_crypto_disabled)2008 static void ath12k_wmi_copy_peer_flags(struct wmi_peer_assoc_complete_cmd *cmd,
2009 				       struct ath12k_wmi_peer_assoc_arg *arg,
2010 				       bool hw_crypto_disabled)
2011 {
2012 	cmd->peer_flags = 0;
2013 	cmd->peer_flags_ext = 0;
2014 
2015 	if (arg->is_wme_set) {
2016 		if (arg->qos_flag)
2017 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_QOS);
2018 		if (arg->apsd_flag)
2019 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_APSD);
2020 		if (arg->ht_flag)
2021 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_HT);
2022 		if (arg->bw_40)
2023 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_40MHZ);
2024 		if (arg->bw_80)
2025 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_80MHZ);
2026 		if (arg->bw_160)
2027 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_160MHZ);
2028 		if (arg->bw_320)
2029 			cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_320MHZ);
2030 
2031 		/* Typically if STBC is enabled for VHT it should be enabled
2032 		 * for HT as well
2033 		 **/
2034 		if (arg->stbc_flag)
2035 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_STBC);
2036 
2037 		/* Typically if LDPC is enabled for VHT it should be enabled
2038 		 * for HT as well
2039 		 **/
2040 		if (arg->ldpc_flag)
2041 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_LDPC);
2042 
2043 		if (arg->static_mimops_flag)
2044 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_STATIC_MIMOPS);
2045 		if (arg->dynamic_mimops_flag)
2046 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_DYN_MIMOPS);
2047 		if (arg->spatial_mux_flag)
2048 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_SPATIAL_MUX);
2049 		if (arg->vht_flag)
2050 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_VHT);
2051 		if (arg->he_flag)
2052 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_HE);
2053 		if (arg->twt_requester)
2054 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_REQ);
2055 		if (arg->twt_responder)
2056 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_RESP);
2057 		if (arg->eht_flag)
2058 			cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_EHT);
2059 	}
2060 
2061 	/* Suppress authorization for all AUTH modes that need 4-way handshake
2062 	 * (during re-association).
2063 	 * Authorization will be done for these modes on key installation.
2064 	 */
2065 	if (arg->auth_flag)
2066 		cmd->peer_flags |= cpu_to_le32(WMI_PEER_AUTH);
2067 	if (arg->need_ptk_4_way) {
2068 		cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_PTK_4_WAY);
2069 		if (!hw_crypto_disabled)
2070 			cmd->peer_flags &= cpu_to_le32(~WMI_PEER_AUTH);
2071 	}
2072 	if (arg->need_gtk_2_way)
2073 		cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_GTK_2_WAY);
2074 	/* safe mode bypass the 4-way handshake */
2075 	if (arg->safe_mode_enabled)
2076 		cmd->peer_flags &= cpu_to_le32(~(WMI_PEER_NEED_PTK_4_WAY |
2077 						 WMI_PEER_NEED_GTK_2_WAY));
2078 
2079 	if (arg->is_pmf_enabled)
2080 		cmd->peer_flags |= cpu_to_le32(WMI_PEER_PMF);
2081 
2082 	/* Disable AMSDU for station transmit, if user configures it */
2083 	/* Disable AMSDU for AP transmit to 11n Stations, if user configures
2084 	 * it
2085 	 * if (arg->amsdu_disable) Add after FW support
2086 	 **/
2087 
2088 	/* Target asserts if node is marked HT and all MCS is set to 0.
2089 	 * Mark the node as non-HT if all the mcs rates are disabled through
2090 	 * iwpriv
2091 	 **/
2092 	if (arg->peer_ht_rates.num_rates == 0)
2093 		cmd->peer_flags &= cpu_to_le32(~WMI_PEER_HT);
2094 }
2095 
ath12k_wmi_send_peer_assoc_cmd(struct ath12k * ar,struct ath12k_wmi_peer_assoc_arg * arg)2096 int ath12k_wmi_send_peer_assoc_cmd(struct ath12k *ar,
2097 				   struct ath12k_wmi_peer_assoc_arg *arg)
2098 {
2099 	struct ath12k_wmi_pdev *wmi = ar->wmi;
2100 	struct wmi_peer_assoc_complete_cmd *cmd;
2101 	struct ath12k_wmi_vht_rate_set_params *mcs;
2102 	struct ath12k_wmi_he_rate_set_params *he_mcs;
2103 	struct ath12k_wmi_eht_rate_set_params *eht_mcs;
2104 	struct wmi_peer_assoc_mlo_params *ml_params;
2105 	struct wmi_peer_assoc_mlo_partner_info_params *partner_info;
2106 	struct sk_buff *skb;
2107 	struct wmi_tlv *tlv;
2108 	void *ptr;
2109 	u32 peer_legacy_rates_align;
2110 	u32 peer_ht_rates_align;
2111 	int i, ret, len;
2112 	__le32 v;
2113 
2114 	peer_legacy_rates_align = roundup(arg->peer_legacy_rates.num_rates,
2115 					  sizeof(u32));
2116 	peer_ht_rates_align = roundup(arg->peer_ht_rates.num_rates,
2117 				      sizeof(u32));
2118 
2119 	len = sizeof(*cmd) +
2120 	      TLV_HDR_SIZE + (peer_legacy_rates_align * sizeof(u8)) +
2121 	      TLV_HDR_SIZE + (peer_ht_rates_align * sizeof(u8)) +
2122 	      sizeof(*mcs) + TLV_HDR_SIZE +
2123 	      (sizeof(*he_mcs) * arg->peer_he_mcs_count) +
2124 	      TLV_HDR_SIZE + (sizeof(*eht_mcs) * arg->peer_eht_mcs_count);
2125 
2126 	if (arg->ml.enabled)
2127 		len += TLV_HDR_SIZE + sizeof(*ml_params) +
2128 		       TLV_HDR_SIZE + (arg->ml.num_partner_links * sizeof(*partner_info));
2129 	else
2130 		len += (2 * TLV_HDR_SIZE);
2131 
2132 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2133 	if (!skb)
2134 		return -ENOMEM;
2135 
2136 	ptr = skb->data;
2137 
2138 	cmd = ptr;
2139 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_ASSOC_COMPLETE_CMD,
2140 						 sizeof(*cmd));
2141 
2142 	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2143 
2144 	cmd->peer_new_assoc = cpu_to_le32(arg->peer_new_assoc);
2145 	cmd->peer_associd = cpu_to_le32(arg->peer_associd);
2146 	cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap);
2147 
2148 	ath12k_wmi_copy_peer_flags(cmd, arg,
2149 				   test_bit(ATH12K_FLAG_HW_CRYPTO_DISABLED,
2150 					    &ar->ab->dev_flags));
2151 
2152 	ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_mac);
2153 
2154 	cmd->peer_rate_caps = cpu_to_le32(arg->peer_rate_caps);
2155 	cmd->peer_caps = cpu_to_le32(arg->peer_caps);
2156 	cmd->peer_listen_intval = cpu_to_le32(arg->peer_listen_intval);
2157 	cmd->peer_ht_caps = cpu_to_le32(arg->peer_ht_caps);
2158 	cmd->peer_max_mpdu = cpu_to_le32(arg->peer_max_mpdu);
2159 	cmd->peer_mpdu_density = cpu_to_le32(arg->peer_mpdu_density);
2160 	cmd->peer_vht_caps = cpu_to_le32(arg->peer_vht_caps);
2161 	cmd->peer_phymode = cpu_to_le32(arg->peer_phymode);
2162 
2163 	/* Update 11ax capabilities */
2164 	cmd->peer_he_cap_info = cpu_to_le32(arg->peer_he_cap_macinfo[0]);
2165 	cmd->peer_he_cap_info_ext = cpu_to_le32(arg->peer_he_cap_macinfo[1]);
2166 	cmd->peer_he_cap_info_internal = cpu_to_le32(arg->peer_he_cap_macinfo_internal);
2167 	cmd->peer_he_caps_6ghz = cpu_to_le32(arg->peer_he_caps_6ghz);
2168 	cmd->peer_he_ops = cpu_to_le32(arg->peer_he_ops);
2169 	for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
2170 		cmd->peer_he_cap_phy[i] =
2171 			cpu_to_le32(arg->peer_he_cap_phyinfo[i]);
2172 	cmd->peer_ppet.numss_m1 = cpu_to_le32(arg->peer_ppet.numss_m1);
2173 	cmd->peer_ppet.ru_info = cpu_to_le32(arg->peer_ppet.ru_bit_mask);
2174 	for (i = 0; i < WMI_MAX_NUM_SS; i++)
2175 		cmd->peer_ppet.ppet16_ppet8_ru3_ru0[i] =
2176 			cpu_to_le32(arg->peer_ppet.ppet16_ppet8_ru3_ru0[i]);
2177 
2178 	/* Update 11be capabilities */
2179 	memcpy_and_pad(cmd->peer_eht_cap_mac, sizeof(cmd->peer_eht_cap_mac),
2180 		       arg->peer_eht_cap_mac, sizeof(arg->peer_eht_cap_mac),
2181 		       0);
2182 	memcpy_and_pad(cmd->peer_eht_cap_phy, sizeof(cmd->peer_eht_cap_phy),
2183 		       arg->peer_eht_cap_phy, sizeof(arg->peer_eht_cap_phy),
2184 		       0);
2185 	memcpy_and_pad(&cmd->peer_eht_ppet, sizeof(cmd->peer_eht_ppet),
2186 		       &arg->peer_eht_ppet, sizeof(arg->peer_eht_ppet), 0);
2187 
2188 	/* Update peer legacy rate information */
2189 	ptr += sizeof(*cmd);
2190 
2191 	tlv = ptr;
2192 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_legacy_rates_align);
2193 
2194 	ptr += TLV_HDR_SIZE;
2195 
2196 	cmd->num_peer_legacy_rates = cpu_to_le32(arg->peer_legacy_rates.num_rates);
2197 	memcpy(ptr, arg->peer_legacy_rates.rates,
2198 	       arg->peer_legacy_rates.num_rates);
2199 
2200 	/* Update peer HT rate information */
2201 	ptr += peer_legacy_rates_align;
2202 
2203 	tlv = ptr;
2204 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_ht_rates_align);
2205 	ptr += TLV_HDR_SIZE;
2206 	cmd->num_peer_ht_rates = cpu_to_le32(arg->peer_ht_rates.num_rates);
2207 	memcpy(ptr, arg->peer_ht_rates.rates,
2208 	       arg->peer_ht_rates.num_rates);
2209 
2210 	/* VHT Rates */
2211 	ptr += peer_ht_rates_align;
2212 
2213 	mcs = ptr;
2214 
2215 	mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VHT_RATE_SET,
2216 						 sizeof(*mcs));
2217 
2218 	cmd->peer_nss = cpu_to_le32(arg->peer_nss);
2219 
2220 	/* Update bandwidth-NSS mapping */
2221 	cmd->peer_bw_rxnss_override = 0;
2222 	cmd->peer_bw_rxnss_override |= cpu_to_le32(arg->peer_bw_rxnss_override);
2223 
2224 	if (arg->vht_capable) {
2225 		mcs->rx_max_rate = cpu_to_le32(arg->rx_max_rate);
2226 		mcs->rx_mcs_set = cpu_to_le32(arg->rx_mcs_set);
2227 		mcs->tx_max_rate = cpu_to_le32(arg->tx_max_rate);
2228 		mcs->tx_mcs_set = cpu_to_le32(arg->tx_mcs_set);
2229 	}
2230 
2231 	/* HE Rates */
2232 	cmd->peer_he_mcs = cpu_to_le32(arg->peer_he_mcs_count);
2233 	cmd->min_data_rate = cpu_to_le32(arg->min_data_rate);
2234 
2235 	ptr += sizeof(*mcs);
2236 
2237 	len = arg->peer_he_mcs_count * sizeof(*he_mcs);
2238 
2239 	tlv = ptr;
2240 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2241 	ptr += TLV_HDR_SIZE;
2242 
2243 	/* Loop through the HE rate set */
2244 	for (i = 0; i < arg->peer_he_mcs_count; i++) {
2245 		he_mcs = ptr;
2246 		he_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HE_RATE_SET,
2247 							    sizeof(*he_mcs));
2248 
2249 		he_mcs->rx_mcs_set = cpu_to_le32(arg->peer_he_rx_mcs_set[i]);
2250 		he_mcs->tx_mcs_set = cpu_to_le32(arg->peer_he_tx_mcs_set[i]);
2251 		ptr += sizeof(*he_mcs);
2252 	}
2253 
2254 	tlv = ptr;
2255 	len = arg->ml.enabled ? sizeof(*ml_params) : 0;
2256 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2257 	ptr += TLV_HDR_SIZE;
2258 	if (!len)
2259 		goto skip_ml_params;
2260 
2261 	ml_params = ptr;
2262 	ml_params->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_PEER_ASSOC_PARAMS,
2263 						       len);
2264 	ml_params->flags = cpu_to_le32(ATH12K_WMI_FLAG_MLO_ENABLED);
2265 
2266 	if (arg->ml.assoc_link)
2267 		ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_ASSOC_LINK);
2268 
2269 	if (arg->ml.primary_umac)
2270 		ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_PRIMARY_UMAC);
2271 
2272 	if (arg->ml.logical_link_idx_valid)
2273 		ml_params->flags |=
2274 			cpu_to_le32(ATH12K_WMI_FLAG_MLO_LOGICAL_LINK_IDX_VALID);
2275 
2276 	if (arg->ml.peer_id_valid)
2277 		ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_PEER_ID_VALID);
2278 
2279 	ether_addr_copy(ml_params->mld_addr.addr, arg->ml.mld_addr);
2280 	ml_params->logical_link_idx = cpu_to_le32(arg->ml.logical_link_idx);
2281 	ml_params->ml_peer_id = cpu_to_le32(arg->ml.ml_peer_id);
2282 	ml_params->ieee_link_id = cpu_to_le32(arg->ml.ieee_link_id);
2283 	ptr += sizeof(*ml_params);
2284 
2285 skip_ml_params:
2286 	/* Loop through the EHT rate set */
2287 	len = arg->peer_eht_mcs_count * sizeof(*eht_mcs);
2288 	tlv = ptr;
2289 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2290 	ptr += TLV_HDR_SIZE;
2291 
2292 	for (i = 0; i < arg->peer_eht_mcs_count; i++) {
2293 		eht_mcs = ptr;
2294 		eht_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HE_RATE_SET,
2295 							     sizeof(*eht_mcs));
2296 
2297 		eht_mcs->rx_mcs_set = cpu_to_le32(arg->peer_eht_rx_mcs_set[i]);
2298 		eht_mcs->tx_mcs_set = cpu_to_le32(arg->peer_eht_tx_mcs_set[i]);
2299 		ptr += sizeof(*eht_mcs);
2300 	}
2301 
2302 	tlv = ptr;
2303 	len = arg->ml.enabled ? arg->ml.num_partner_links * sizeof(*partner_info) : 0;
2304 	/* fill ML Partner links */
2305 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2306 	ptr += TLV_HDR_SIZE;
2307 
2308 	if (len == 0)
2309 		goto send;
2310 
2311 	for (i = 0; i < arg->ml.num_partner_links; i++) {
2312 		u32 cmd = WMI_TAG_MLO_PARTNER_LINK_PARAMS_PEER_ASSOC;
2313 
2314 		partner_info = ptr;
2315 		partner_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(cmd,
2316 								  sizeof(*partner_info));
2317 		partner_info->vdev_id = cpu_to_le32(arg->ml.partner_info[i].vdev_id);
2318 		partner_info->hw_link_id =
2319 			cpu_to_le32(arg->ml.partner_info[i].hw_link_id);
2320 		partner_info->flags = cpu_to_le32(ATH12K_WMI_FLAG_MLO_ENABLED);
2321 
2322 		if (arg->ml.partner_info[i].assoc_link)
2323 			partner_info->flags |=
2324 				cpu_to_le32(ATH12K_WMI_FLAG_MLO_ASSOC_LINK);
2325 
2326 		if (arg->ml.partner_info[i].primary_umac)
2327 			partner_info->flags |=
2328 				cpu_to_le32(ATH12K_WMI_FLAG_MLO_PRIMARY_UMAC);
2329 
2330 		if (arg->ml.partner_info[i].logical_link_idx_valid) {
2331 			v = cpu_to_le32(ATH12K_WMI_FLAG_MLO_LINK_ID_VALID);
2332 			partner_info->flags |= v;
2333 		}
2334 
2335 		partner_info->logical_link_idx =
2336 			cpu_to_le32(arg->ml.partner_info[i].logical_link_idx);
2337 		ptr += sizeof(*partner_info);
2338 	}
2339 
2340 send:
2341 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2342 		   "wmi peer assoc vdev id %d assoc id %d peer mac %pM peer_flags %x rate_caps %x peer_caps %x listen_intval %d ht_caps %x max_mpdu %d nss %d phymode %d peer_mpdu_density %d vht_caps %x he cap_info %x he ops %x he cap_info_ext %x he phy %x %x %x peer_bw_rxnss_override %x peer_flags_ext %x eht mac_cap %x %x eht phy_cap %x %x %x\n",
2343 		   cmd->vdev_id, cmd->peer_associd, arg->peer_mac,
2344 		   cmd->peer_flags, cmd->peer_rate_caps, cmd->peer_caps,
2345 		   cmd->peer_listen_intval, cmd->peer_ht_caps,
2346 		   cmd->peer_max_mpdu, cmd->peer_nss, cmd->peer_phymode,
2347 		   cmd->peer_mpdu_density,
2348 		   cmd->peer_vht_caps, cmd->peer_he_cap_info,
2349 		   cmd->peer_he_ops, cmd->peer_he_cap_info_ext,
2350 		   cmd->peer_he_cap_phy[0], cmd->peer_he_cap_phy[1],
2351 		   cmd->peer_he_cap_phy[2],
2352 		   cmd->peer_bw_rxnss_override, cmd->peer_flags_ext,
2353 		   cmd->peer_eht_cap_mac[0], cmd->peer_eht_cap_mac[1],
2354 		   cmd->peer_eht_cap_phy[0], cmd->peer_eht_cap_phy[1],
2355 		   cmd->peer_eht_cap_phy[2]);
2356 
2357 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_ASSOC_CMDID);
2358 	if (ret) {
2359 		ath12k_warn(ar->ab,
2360 			    "failed to send WMI_PEER_ASSOC_CMDID\n");
2361 		dev_kfree_skb(skb);
2362 	}
2363 
2364 	return ret;
2365 }
2366 
ath12k_wmi_start_scan_init(struct ath12k * ar,struct ath12k_wmi_scan_req_arg * arg)2367 void ath12k_wmi_start_scan_init(struct ath12k *ar,
2368 				struct ath12k_wmi_scan_req_arg *arg)
2369 {
2370 	/* setup commonly used values */
2371 	arg->scan_req_id = 1;
2372 	arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
2373 	arg->dwell_time_active = 50;
2374 	arg->dwell_time_active_2g = 0;
2375 	arg->dwell_time_passive = 150;
2376 	arg->dwell_time_active_6g = 40;
2377 	arg->dwell_time_passive_6g = 30;
2378 	arg->min_rest_time = 50;
2379 	arg->max_rest_time = 500;
2380 	arg->repeat_probe_time = 0;
2381 	arg->probe_spacing_time = 0;
2382 	arg->idle_time = 0;
2383 	arg->max_scan_time = 20000;
2384 	arg->probe_delay = 5;
2385 	arg->notify_scan_events = WMI_SCAN_EVENT_STARTED |
2386 				  WMI_SCAN_EVENT_COMPLETED |
2387 				  WMI_SCAN_EVENT_BSS_CHANNEL |
2388 				  WMI_SCAN_EVENT_FOREIGN_CHAN |
2389 				  WMI_SCAN_EVENT_DEQUEUED;
2390 	arg->scan_f_chan_stat_evnt = 1;
2391 	arg->num_bssid = 1;
2392 
2393 	/* fill bssid_list[0] with 0xff, otherwise bssid and RA will be
2394 	 * ZEROs in probe request
2395 	 */
2396 	eth_broadcast_addr(arg->bssid_list[0].addr);
2397 }
2398 
ath12k_wmi_copy_scan_event_cntrl_flags(struct wmi_start_scan_cmd * cmd,struct ath12k_wmi_scan_req_arg * arg)2399 static void ath12k_wmi_copy_scan_event_cntrl_flags(struct wmi_start_scan_cmd *cmd,
2400 						   struct ath12k_wmi_scan_req_arg *arg)
2401 {
2402 	/* Scan events subscription */
2403 	if (arg->scan_ev_started)
2404 		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_STARTED);
2405 	if (arg->scan_ev_completed)
2406 		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_COMPLETED);
2407 	if (arg->scan_ev_bss_chan)
2408 		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_BSS_CHANNEL);
2409 	if (arg->scan_ev_foreign_chan)
2410 		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN);
2411 	if (arg->scan_ev_dequeued)
2412 		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_DEQUEUED);
2413 	if (arg->scan_ev_preempted)
2414 		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_PREEMPTED);
2415 	if (arg->scan_ev_start_failed)
2416 		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_START_FAILED);
2417 	if (arg->scan_ev_restarted)
2418 		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESTARTED);
2419 	if (arg->scan_ev_foreign_chn_exit)
2420 		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT);
2421 	if (arg->scan_ev_suspended)
2422 		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_SUSPENDED);
2423 	if (arg->scan_ev_resumed)
2424 		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESUMED);
2425 
2426 	/** Set scan control flags */
2427 	cmd->scan_ctrl_flags = 0;
2428 	if (arg->scan_f_passive)
2429 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_PASSIVE);
2430 	if (arg->scan_f_strict_passive_pch)
2431 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN);
2432 	if (arg->scan_f_promisc_mode)
2433 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROMISCUOS);
2434 	if (arg->scan_f_capture_phy_err)
2435 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CAPTURE_PHY_ERROR);
2436 	if (arg->scan_f_half_rate)
2437 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_HALF_RATE_SUPPORT);
2438 	if (arg->scan_f_quarter_rate)
2439 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT);
2440 	if (arg->scan_f_cck_rates)
2441 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_CCK_RATES);
2442 	if (arg->scan_f_ofdm_rates)
2443 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_OFDM_RATES);
2444 	if (arg->scan_f_chan_stat_evnt)
2445 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CHAN_STAT_EVENT);
2446 	if (arg->scan_f_filter_prb_req)
2447 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROBE_REQ);
2448 	if (arg->scan_f_bcast_probe)
2449 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_BCAST_PROBE_REQ);
2450 	if (arg->scan_f_offchan_mgmt_tx)
2451 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_MGMT_TX);
2452 	if (arg->scan_f_offchan_data_tx)
2453 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_DATA_TX);
2454 	if (arg->scan_f_force_active_dfs_chn)
2455 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS);
2456 	if (arg->scan_f_add_tpc_ie_in_probe)
2457 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ);
2458 	if (arg->scan_f_add_ds_ie_in_probe)
2459 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ);
2460 	if (arg->scan_f_add_spoofed_mac_in_probe)
2461 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ);
2462 	if (arg->scan_f_add_rand_seq_in_probe)
2463 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ);
2464 	if (arg->scan_f_en_ie_whitelist_in_probe)
2465 		cmd->scan_ctrl_flags |=
2466 			cpu_to_le32(WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ);
2467 
2468 	cmd->scan_ctrl_flags |= le32_encode_bits(arg->adaptive_dwell_time_mode,
2469 						 WMI_SCAN_DWELL_MODE_MASK);
2470 }
2471 
ath12k_wmi_send_scan_start_cmd(struct ath12k * ar,struct ath12k_wmi_scan_req_arg * arg)2472 int ath12k_wmi_send_scan_start_cmd(struct ath12k *ar,
2473 				   struct ath12k_wmi_scan_req_arg *arg)
2474 {
2475 	struct ath12k_wmi_pdev *wmi = ar->wmi;
2476 	struct wmi_start_scan_cmd *cmd;
2477 	struct ath12k_wmi_ssid_params *ssid = NULL;
2478 	struct ath12k_wmi_mac_addr_params *bssid;
2479 	struct sk_buff *skb;
2480 	struct wmi_tlv *tlv;
2481 	void *ptr;
2482 	int i, ret, len;
2483 	u32 *tmp_ptr, extraie_len_with_pad = 0;
2484 	struct ath12k_wmi_hint_short_ssid_arg *s_ssid = NULL;
2485 	struct ath12k_wmi_hint_bssid_arg *hint_bssid = NULL;
2486 
2487 	len = sizeof(*cmd);
2488 
2489 	len += TLV_HDR_SIZE;
2490 	if (arg->num_chan)
2491 		len += arg->num_chan * sizeof(u32);
2492 
2493 	len += TLV_HDR_SIZE;
2494 	if (arg->num_ssids)
2495 		len += arg->num_ssids * sizeof(*ssid);
2496 
2497 	len += TLV_HDR_SIZE;
2498 	if (arg->num_bssid)
2499 		len += sizeof(*bssid) * arg->num_bssid;
2500 
2501 	if (arg->num_hint_bssid)
2502 		len += TLV_HDR_SIZE +
2503 		       arg->num_hint_bssid * sizeof(*hint_bssid);
2504 
2505 	if (arg->num_hint_s_ssid)
2506 		len += TLV_HDR_SIZE +
2507 		       arg->num_hint_s_ssid * sizeof(*s_ssid);
2508 
2509 	len += TLV_HDR_SIZE;
2510 	if (arg->extraie.len)
2511 		extraie_len_with_pad =
2512 			roundup(arg->extraie.len, sizeof(u32));
2513 	if (extraie_len_with_pad <= (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len)) {
2514 		len += extraie_len_with_pad;
2515 	} else {
2516 		ath12k_warn(ar->ab, "discard large size %d bytes extraie for scan start\n",
2517 			    arg->extraie.len);
2518 		extraie_len_with_pad = 0;
2519 	}
2520 
2521 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2522 	if (!skb)
2523 		return -ENOMEM;
2524 
2525 	ptr = skb->data;
2526 
2527 	cmd = ptr;
2528 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_START_SCAN_CMD,
2529 						 sizeof(*cmd));
2530 
2531 	cmd->scan_id = cpu_to_le32(arg->scan_id);
2532 	cmd->scan_req_id = cpu_to_le32(arg->scan_req_id);
2533 	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2534 	cmd->scan_priority = cpu_to_le32(arg->scan_priority);
2535 	cmd->notify_scan_events = cpu_to_le32(arg->notify_scan_events);
2536 
2537 	ath12k_wmi_copy_scan_event_cntrl_flags(cmd, arg);
2538 
2539 	cmd->dwell_time_active = cpu_to_le32(arg->dwell_time_active);
2540 	cmd->dwell_time_active_2g = cpu_to_le32(arg->dwell_time_active_2g);
2541 	cmd->dwell_time_passive = cpu_to_le32(arg->dwell_time_passive);
2542 	cmd->dwell_time_active_6g = cpu_to_le32(arg->dwell_time_active_6g);
2543 	cmd->dwell_time_passive_6g = cpu_to_le32(arg->dwell_time_passive_6g);
2544 	cmd->min_rest_time = cpu_to_le32(arg->min_rest_time);
2545 	cmd->max_rest_time = cpu_to_le32(arg->max_rest_time);
2546 	cmd->repeat_probe_time = cpu_to_le32(arg->repeat_probe_time);
2547 	cmd->probe_spacing_time = cpu_to_le32(arg->probe_spacing_time);
2548 	cmd->idle_time = cpu_to_le32(arg->idle_time);
2549 	cmd->max_scan_time = cpu_to_le32(arg->max_scan_time);
2550 	cmd->probe_delay = cpu_to_le32(arg->probe_delay);
2551 	cmd->burst_duration = cpu_to_le32(arg->burst_duration);
2552 	cmd->num_chan = cpu_to_le32(arg->num_chan);
2553 	cmd->num_bssid = cpu_to_le32(arg->num_bssid);
2554 	cmd->num_ssids = cpu_to_le32(arg->num_ssids);
2555 	cmd->ie_len = cpu_to_le32(arg->extraie.len);
2556 	cmd->n_probes = cpu_to_le32(arg->n_probes);
2557 
2558 	ptr += sizeof(*cmd);
2559 
2560 	len = arg->num_chan * sizeof(u32);
2561 
2562 	tlv = ptr;
2563 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, len);
2564 	ptr += TLV_HDR_SIZE;
2565 	tmp_ptr = (u32 *)ptr;
2566 
2567 	memcpy(tmp_ptr, arg->chan_list, arg->num_chan * 4);
2568 
2569 	ptr += len;
2570 
2571 	len = arg->num_ssids * sizeof(*ssid);
2572 	tlv = ptr;
2573 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2574 
2575 	ptr += TLV_HDR_SIZE;
2576 
2577 	if (arg->num_ssids) {
2578 		ssid = ptr;
2579 		for (i = 0; i < arg->num_ssids; ++i) {
2580 			ssid->ssid_len = cpu_to_le32(arg->ssid[i].ssid_len);
2581 			memcpy(ssid->ssid, arg->ssid[i].ssid,
2582 			       arg->ssid[i].ssid_len);
2583 			ssid++;
2584 		}
2585 	}
2586 
2587 	ptr += (arg->num_ssids * sizeof(*ssid));
2588 	len = arg->num_bssid * sizeof(*bssid);
2589 	tlv = ptr;
2590 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2591 
2592 	ptr += TLV_HDR_SIZE;
2593 	bssid = ptr;
2594 
2595 	if (arg->num_bssid) {
2596 		for (i = 0; i < arg->num_bssid; ++i) {
2597 			ether_addr_copy(bssid->addr,
2598 					arg->bssid_list[i].addr);
2599 			bssid++;
2600 		}
2601 	}
2602 
2603 	ptr += arg->num_bssid * sizeof(*bssid);
2604 
2605 	len = extraie_len_with_pad;
2606 	tlv = ptr;
2607 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len);
2608 	ptr += TLV_HDR_SIZE;
2609 
2610 	if (extraie_len_with_pad)
2611 		memcpy(ptr, arg->extraie.ptr,
2612 		       arg->extraie.len);
2613 
2614 	ptr += extraie_len_with_pad;
2615 
2616 	if (arg->num_hint_s_ssid) {
2617 		len = arg->num_hint_s_ssid * sizeof(*s_ssid);
2618 		tlv = ptr;
2619 		tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2620 		ptr += TLV_HDR_SIZE;
2621 		s_ssid = ptr;
2622 		for (i = 0; i < arg->num_hint_s_ssid; ++i) {
2623 			s_ssid->freq_flags = arg->hint_s_ssid[i].freq_flags;
2624 			s_ssid->short_ssid = arg->hint_s_ssid[i].short_ssid;
2625 			s_ssid++;
2626 		}
2627 		ptr += len;
2628 	}
2629 
2630 	if (arg->num_hint_bssid) {
2631 		len = arg->num_hint_bssid * sizeof(struct ath12k_wmi_hint_bssid_arg);
2632 		tlv = ptr;
2633 		tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2634 		ptr += TLV_HDR_SIZE;
2635 		hint_bssid = ptr;
2636 		for (i = 0; i < arg->num_hint_bssid; ++i) {
2637 			hint_bssid->freq_flags =
2638 				arg->hint_bssid[i].freq_flags;
2639 			ether_addr_copy(&arg->hint_bssid[i].bssid.addr[0],
2640 					&hint_bssid->bssid.addr[0]);
2641 			hint_bssid++;
2642 		}
2643 	}
2644 
2645 	ret = ath12k_wmi_cmd_send(wmi, skb,
2646 				  WMI_START_SCAN_CMDID);
2647 	if (ret) {
2648 		ath12k_warn(ar->ab, "failed to send WMI_START_SCAN_CMDID\n");
2649 		dev_kfree_skb(skb);
2650 	}
2651 
2652 	return ret;
2653 }
2654 
ath12k_wmi_send_scan_stop_cmd(struct ath12k * ar,struct ath12k_wmi_scan_cancel_arg * arg)2655 int ath12k_wmi_send_scan_stop_cmd(struct ath12k *ar,
2656 				  struct ath12k_wmi_scan_cancel_arg *arg)
2657 {
2658 	struct ath12k_wmi_pdev *wmi = ar->wmi;
2659 	struct wmi_stop_scan_cmd *cmd;
2660 	struct sk_buff *skb;
2661 	int ret;
2662 
2663 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2664 	if (!skb)
2665 		return -ENOMEM;
2666 
2667 	cmd = (struct wmi_stop_scan_cmd *)skb->data;
2668 
2669 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STOP_SCAN_CMD,
2670 						 sizeof(*cmd));
2671 
2672 	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2673 	cmd->requestor = cpu_to_le32(arg->requester);
2674 	cmd->scan_id = cpu_to_le32(arg->scan_id);
2675 	cmd->pdev_id = cpu_to_le32(arg->pdev_id);
2676 	/* stop the scan with the corresponding scan_id */
2677 	if (arg->req_type == WLAN_SCAN_CANCEL_PDEV_ALL) {
2678 		/* Cancelling all scans */
2679 		cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_ALL);
2680 	} else if (arg->req_type == WLAN_SCAN_CANCEL_VDEV_ALL) {
2681 		/* Cancelling VAP scans */
2682 		cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_VAP_ALL);
2683 	} else if (arg->req_type == WLAN_SCAN_CANCEL_SINGLE) {
2684 		/* Cancelling specific scan */
2685 		cmd->req_type = WMI_SCAN_STOP_ONE;
2686 	} else {
2687 		ath12k_warn(ar->ab, "invalid scan cancel req_type %d",
2688 			    arg->req_type);
2689 		dev_kfree_skb(skb);
2690 		return -EINVAL;
2691 	}
2692 
2693 	ret = ath12k_wmi_cmd_send(wmi, skb,
2694 				  WMI_STOP_SCAN_CMDID);
2695 	if (ret) {
2696 		ath12k_warn(ar->ab, "failed to send WMI_STOP_SCAN_CMDID\n");
2697 		dev_kfree_skb(skb);
2698 	}
2699 
2700 	return ret;
2701 }
2702 
ath12k_wmi_send_scan_chan_list_cmd(struct ath12k * ar,struct ath12k_wmi_scan_chan_list_arg * arg)2703 int ath12k_wmi_send_scan_chan_list_cmd(struct ath12k *ar,
2704 				       struct ath12k_wmi_scan_chan_list_arg *arg)
2705 {
2706 	struct ath12k_wmi_pdev *wmi = ar->wmi;
2707 	struct wmi_scan_chan_list_cmd *cmd;
2708 	struct sk_buff *skb;
2709 	struct ath12k_wmi_channel_params *chan_info;
2710 	struct ath12k_wmi_channel_arg *channel_arg;
2711 	struct wmi_tlv *tlv;
2712 	void *ptr;
2713 	int i, ret, len;
2714 	u16 num_send_chans, num_sends = 0, max_chan_limit = 0;
2715 	__le32 *reg1, *reg2;
2716 
2717 	channel_arg = &arg->channel[0];
2718 	while (arg->nallchans) {
2719 		len = sizeof(*cmd) + TLV_HDR_SIZE;
2720 		max_chan_limit = (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len) /
2721 			sizeof(*chan_info);
2722 
2723 		num_send_chans = min(arg->nallchans, max_chan_limit);
2724 
2725 		arg->nallchans -= num_send_chans;
2726 		len += sizeof(*chan_info) * num_send_chans;
2727 
2728 		skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2729 		if (!skb)
2730 			return -ENOMEM;
2731 
2732 		cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
2733 		cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SCAN_CHAN_LIST_CMD,
2734 							 sizeof(*cmd));
2735 		cmd->pdev_id = cpu_to_le32(arg->pdev_id);
2736 		cmd->num_scan_chans = cpu_to_le32(num_send_chans);
2737 		if (num_sends)
2738 			cmd->flags |= cpu_to_le32(WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG);
2739 
2740 		ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2741 			   "WMI no.of chan = %d len = %d pdev_id = %d num_sends = %d\n",
2742 			   num_send_chans, len, cmd->pdev_id, num_sends);
2743 
2744 		ptr = skb->data + sizeof(*cmd);
2745 
2746 		len = sizeof(*chan_info) * num_send_chans;
2747 		tlv = ptr;
2748 		tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_STRUCT,
2749 						     len);
2750 		ptr += TLV_HDR_SIZE;
2751 
2752 		for (i = 0; i < num_send_chans; ++i) {
2753 			chan_info = ptr;
2754 			memset(chan_info, 0, sizeof(*chan_info));
2755 			len = sizeof(*chan_info);
2756 			chan_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL,
2757 								       len);
2758 
2759 			reg1 = &chan_info->reg_info_1;
2760 			reg2 = &chan_info->reg_info_2;
2761 			chan_info->mhz = cpu_to_le32(channel_arg->mhz);
2762 			chan_info->band_center_freq1 = cpu_to_le32(channel_arg->cfreq1);
2763 			chan_info->band_center_freq2 = cpu_to_le32(channel_arg->cfreq2);
2764 
2765 			if (channel_arg->is_chan_passive)
2766 				chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE);
2767 			if (channel_arg->allow_he)
2768 				chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE);
2769 			else if (channel_arg->allow_vht)
2770 				chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT);
2771 			else if (channel_arg->allow_ht)
2772 				chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT);
2773 			if (channel_arg->half_rate)
2774 				chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_HALF_RATE);
2775 			if (channel_arg->quarter_rate)
2776 				chan_info->info |=
2777 					cpu_to_le32(WMI_CHAN_INFO_QUARTER_RATE);
2778 
2779 			if (channel_arg->psc_channel)
2780 				chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PSC);
2781 
2782 			if (channel_arg->dfs_set)
2783 				chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_DFS);
2784 
2785 			chan_info->info |= le32_encode_bits(channel_arg->phy_mode,
2786 							    WMI_CHAN_INFO_MODE);
2787 			*reg1 |= le32_encode_bits(channel_arg->minpower,
2788 						  WMI_CHAN_REG_INFO1_MIN_PWR);
2789 			*reg1 |= le32_encode_bits(channel_arg->maxpower,
2790 						  WMI_CHAN_REG_INFO1_MAX_PWR);
2791 			*reg1 |= le32_encode_bits(channel_arg->maxregpower,
2792 						  WMI_CHAN_REG_INFO1_MAX_REG_PWR);
2793 			*reg1 |= le32_encode_bits(channel_arg->reg_class_id,
2794 						  WMI_CHAN_REG_INFO1_REG_CLS);
2795 			*reg2 |= le32_encode_bits(channel_arg->antennamax,
2796 						  WMI_CHAN_REG_INFO2_ANT_MAX);
2797 			*reg2 |= le32_encode_bits(channel_arg->maxregpower,
2798 						  WMI_CHAN_REG_INFO2_MAX_TX_PWR);
2799 
2800 			ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2801 				   "WMI chan scan list chan[%d] = %u, chan_info->info %8x\n",
2802 				   i, chan_info->mhz, chan_info->info);
2803 
2804 			ptr += sizeof(*chan_info);
2805 
2806 			channel_arg++;
2807 		}
2808 
2809 		ret = ath12k_wmi_cmd_send(wmi, skb, WMI_SCAN_CHAN_LIST_CMDID);
2810 		if (ret) {
2811 			ath12k_warn(ar->ab, "failed to send WMI_SCAN_CHAN_LIST cmd\n");
2812 			dev_kfree_skb(skb);
2813 			return ret;
2814 		}
2815 
2816 		num_sends++;
2817 	}
2818 
2819 	return 0;
2820 }
2821 
ath12k_wmi_send_wmm_update_cmd(struct ath12k * ar,u32 vdev_id,struct wmi_wmm_params_all_arg * param)2822 int ath12k_wmi_send_wmm_update_cmd(struct ath12k *ar, u32 vdev_id,
2823 				   struct wmi_wmm_params_all_arg *param)
2824 {
2825 	struct ath12k_wmi_pdev *wmi = ar->wmi;
2826 	struct wmi_vdev_set_wmm_params_cmd *cmd;
2827 	struct wmi_wmm_params *wmm_param;
2828 	struct wmi_wmm_params_arg *wmi_wmm_arg;
2829 	struct sk_buff *skb;
2830 	int ret, ac;
2831 
2832 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2833 	if (!skb)
2834 		return -ENOMEM;
2835 
2836 	cmd = (struct wmi_vdev_set_wmm_params_cmd *)skb->data;
2837 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
2838 						 sizeof(*cmd));
2839 
2840 	cmd->vdev_id = cpu_to_le32(vdev_id);
2841 	cmd->wmm_param_type = 0;
2842 
2843 	for (ac = 0; ac < WME_NUM_AC; ac++) {
2844 		switch (ac) {
2845 		case WME_AC_BE:
2846 			wmi_wmm_arg = &param->ac_be;
2847 			break;
2848 		case WME_AC_BK:
2849 			wmi_wmm_arg = &param->ac_bk;
2850 			break;
2851 		case WME_AC_VI:
2852 			wmi_wmm_arg = &param->ac_vi;
2853 			break;
2854 		case WME_AC_VO:
2855 			wmi_wmm_arg = &param->ac_vo;
2856 			break;
2857 		}
2858 
2859 		wmm_param = (struct wmi_wmm_params *)&cmd->wmm_params[ac];
2860 		wmm_param->tlv_header =
2861 			ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
2862 					       sizeof(*wmm_param));
2863 
2864 		wmm_param->aifs = cpu_to_le32(wmi_wmm_arg->aifs);
2865 		wmm_param->cwmin = cpu_to_le32(wmi_wmm_arg->cwmin);
2866 		wmm_param->cwmax = cpu_to_le32(wmi_wmm_arg->cwmax);
2867 		wmm_param->txoplimit = cpu_to_le32(wmi_wmm_arg->txop);
2868 		wmm_param->acm = cpu_to_le32(wmi_wmm_arg->acm);
2869 		wmm_param->no_ack = cpu_to_le32(wmi_wmm_arg->no_ack);
2870 
2871 		ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2872 			   "wmi wmm set ac %d aifs %d cwmin %d cwmax %d txop %d acm %d no_ack %d\n",
2873 			   ac, wmm_param->aifs, wmm_param->cwmin,
2874 			   wmm_param->cwmax, wmm_param->txoplimit,
2875 			   wmm_param->acm, wmm_param->no_ack);
2876 	}
2877 	ret = ath12k_wmi_cmd_send(wmi, skb,
2878 				  WMI_VDEV_SET_WMM_PARAMS_CMDID);
2879 	if (ret) {
2880 		ath12k_warn(ar->ab,
2881 			    "failed to send WMI_VDEV_SET_WMM_PARAMS_CMDID");
2882 		dev_kfree_skb(skb);
2883 	}
2884 
2885 	return ret;
2886 }
2887 
ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k * ar,u32 pdev_id)2888 int ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k *ar,
2889 						  u32 pdev_id)
2890 {
2891 	struct ath12k_wmi_pdev *wmi = ar->wmi;
2892 	struct wmi_dfs_phyerr_offload_cmd *cmd;
2893 	struct sk_buff *skb;
2894 	int ret;
2895 
2896 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2897 	if (!skb)
2898 		return -ENOMEM;
2899 
2900 	cmd = (struct wmi_dfs_phyerr_offload_cmd *)skb->data;
2901 	cmd->tlv_header =
2902 		ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD,
2903 				       sizeof(*cmd));
2904 
2905 	cmd->pdev_id = cpu_to_le32(pdev_id);
2906 
2907 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2908 		   "WMI dfs phy err offload enable pdev id %d\n", pdev_id);
2909 
2910 	ret = ath12k_wmi_cmd_send(wmi, skb,
2911 				  WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID);
2912 	if (ret) {
2913 		ath12k_warn(ar->ab,
2914 			    "failed to send WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE cmd\n");
2915 		dev_kfree_skb(skb);
2916 	}
2917 
2918 	return ret;
2919 }
2920 
ath12k_wmi_set_bios_cmd(struct ath12k_base * ab,u32 param_id,const u8 * buf,size_t buf_len)2921 int ath12k_wmi_set_bios_cmd(struct ath12k_base *ab, u32 param_id,
2922 			    const u8 *buf, size_t buf_len)
2923 {
2924 	struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
2925 	struct wmi_pdev_set_bios_interface_cmd *cmd;
2926 	struct wmi_tlv *tlv;
2927 	struct sk_buff *skb;
2928 	u8 *ptr;
2929 	u32 len, len_aligned;
2930 	int ret;
2931 
2932 	len_aligned = roundup(buf_len, sizeof(u32));
2933 	len = sizeof(*cmd) + TLV_HDR_SIZE + len_aligned;
2934 
2935 	skb = ath12k_wmi_alloc_skb(wmi_ab, len);
2936 	if (!skb)
2937 		return -ENOMEM;
2938 
2939 	cmd = (struct wmi_pdev_set_bios_interface_cmd *)skb->data;
2940 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_INTERFACE_CMD,
2941 						 sizeof(*cmd));
2942 	cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC);
2943 	cmd->param_type_id = cpu_to_le32(param_id);
2944 	cmd->length = cpu_to_le32(buf_len);
2945 
2946 	ptr = skb->data + sizeof(*cmd);
2947 	tlv = (struct wmi_tlv *)ptr;
2948 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len_aligned);
2949 	ptr += TLV_HDR_SIZE;
2950 	memcpy(ptr, buf, buf_len);
2951 
2952 	ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0],
2953 				  skb,
2954 				  WMI_PDEV_SET_BIOS_INTERFACE_CMDID);
2955 	if (ret) {
2956 		ath12k_warn(ab,
2957 			    "failed to send WMI_PDEV_SET_BIOS_INTERFACE_CMDID parameter id %d: %d\n",
2958 			    param_id, ret);
2959 		dev_kfree_skb(skb);
2960 	}
2961 
2962 	return 0;
2963 }
2964 
ath12k_wmi_set_bios_sar_cmd(struct ath12k_base * ab,const u8 * psar_table)2965 int ath12k_wmi_set_bios_sar_cmd(struct ath12k_base *ab, const u8 *psar_table)
2966 {
2967 	struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
2968 	struct wmi_pdev_set_bios_sar_table_cmd *cmd;
2969 	struct wmi_tlv *tlv;
2970 	struct sk_buff *skb;
2971 	int ret;
2972 	u8 *buf_ptr;
2973 	u32 len, sar_table_len_aligned, sar_dbs_backoff_len_aligned;
2974 	const u8 *psar_value = psar_table + ATH12K_ACPI_POWER_LIMIT_DATA_OFFSET;
2975 	const u8 *pdbs_value = psar_table + ATH12K_ACPI_DBS_BACKOFF_DATA_OFFSET;
2976 
2977 	sar_table_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_TABLE_LEN, sizeof(u32));
2978 	sar_dbs_backoff_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN,
2979 					      sizeof(u32));
2980 	len = sizeof(*cmd) + TLV_HDR_SIZE + sar_table_len_aligned +
2981 		TLV_HDR_SIZE + sar_dbs_backoff_len_aligned;
2982 
2983 	skb = ath12k_wmi_alloc_skb(wmi_ab, len);
2984 	if (!skb)
2985 		return -ENOMEM;
2986 
2987 	cmd = (struct wmi_pdev_set_bios_sar_table_cmd *)skb->data;
2988 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD,
2989 						 sizeof(*cmd));
2990 	cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC);
2991 	cmd->sar_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_TABLE_LEN);
2992 	cmd->dbs_backoff_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN);
2993 
2994 	buf_ptr = skb->data + sizeof(*cmd);
2995 	tlv = (struct wmi_tlv *)buf_ptr;
2996 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE,
2997 					 sar_table_len_aligned);
2998 	buf_ptr += TLV_HDR_SIZE;
2999 	memcpy(buf_ptr, psar_value, ATH12K_ACPI_BIOS_SAR_TABLE_LEN);
3000 
3001 	buf_ptr += sar_table_len_aligned;
3002 	tlv = (struct wmi_tlv *)buf_ptr;
3003 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE,
3004 					 sar_dbs_backoff_len_aligned);
3005 	buf_ptr += TLV_HDR_SIZE;
3006 	memcpy(buf_ptr, pdbs_value, ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN);
3007 
3008 	ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0],
3009 				  skb,
3010 				  WMI_PDEV_SET_BIOS_SAR_TABLE_CMDID);
3011 	if (ret) {
3012 		ath12k_warn(ab,
3013 			    "failed to send WMI_PDEV_SET_BIOS_INTERFACE_CMDID %d\n",
3014 			    ret);
3015 		dev_kfree_skb(skb);
3016 	}
3017 
3018 	return ret;
3019 }
3020 
ath12k_wmi_set_bios_geo_cmd(struct ath12k_base * ab,const u8 * pgeo_table)3021 int ath12k_wmi_set_bios_geo_cmd(struct ath12k_base *ab, const u8 *pgeo_table)
3022 {
3023 	struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
3024 	struct wmi_pdev_set_bios_geo_table_cmd *cmd;
3025 	struct wmi_tlv *tlv;
3026 	struct sk_buff *skb;
3027 	int ret;
3028 	u8 *buf_ptr;
3029 	u32 len, sar_geo_len_aligned;
3030 	const u8 *pgeo_value = pgeo_table + ATH12K_ACPI_GEO_OFFSET_DATA_OFFSET;
3031 
3032 	sar_geo_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN, sizeof(u32));
3033 	len = sizeof(*cmd) + TLV_HDR_SIZE + sar_geo_len_aligned;
3034 
3035 	skb = ath12k_wmi_alloc_skb(wmi_ab, len);
3036 	if (!skb)
3037 		return -ENOMEM;
3038 
3039 	cmd = (struct wmi_pdev_set_bios_geo_table_cmd *)skb->data;
3040 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD,
3041 						 sizeof(*cmd));
3042 	cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC);
3043 	cmd->geo_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN);
3044 
3045 	buf_ptr = skb->data + sizeof(*cmd);
3046 	tlv = (struct wmi_tlv *)buf_ptr;
3047 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, sar_geo_len_aligned);
3048 	buf_ptr += TLV_HDR_SIZE;
3049 	memcpy(buf_ptr, pgeo_value, ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN);
3050 
3051 	ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0],
3052 				  skb,
3053 				  WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID);
3054 	if (ret) {
3055 		ath12k_warn(ab,
3056 			    "failed to send WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID %d\n",
3057 			    ret);
3058 		dev_kfree_skb(skb);
3059 	}
3060 
3061 	return ret;
3062 }
3063 
ath12k_wmi_delba_send(struct ath12k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 initiator,u32 reason)3064 int ath12k_wmi_delba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac,
3065 			  u32 tid, u32 initiator, u32 reason)
3066 {
3067 	struct ath12k_wmi_pdev *wmi = ar->wmi;
3068 	struct wmi_delba_send_cmd *cmd;
3069 	struct sk_buff *skb;
3070 	int ret;
3071 
3072 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3073 	if (!skb)
3074 		return -ENOMEM;
3075 
3076 	cmd = (struct wmi_delba_send_cmd *)skb->data;
3077 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DELBA_SEND_CMD,
3078 						 sizeof(*cmd));
3079 	cmd->vdev_id = cpu_to_le32(vdev_id);
3080 	ether_addr_copy(cmd->peer_macaddr.addr, mac);
3081 	cmd->tid = cpu_to_le32(tid);
3082 	cmd->initiator = cpu_to_le32(initiator);
3083 	cmd->reasoncode = cpu_to_le32(reason);
3084 
3085 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3086 		   "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
3087 		   vdev_id, mac, tid, initiator, reason);
3088 
3089 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_DELBA_SEND_CMDID);
3090 
3091 	if (ret) {
3092 		ath12k_warn(ar->ab,
3093 			    "failed to send WMI_DELBA_SEND_CMDID cmd\n");
3094 		dev_kfree_skb(skb);
3095 	}
3096 
3097 	return ret;
3098 }
3099 
ath12k_wmi_addba_set_resp(struct ath12k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 status)3100 int ath12k_wmi_addba_set_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac,
3101 			      u32 tid, u32 status)
3102 {
3103 	struct ath12k_wmi_pdev *wmi = ar->wmi;
3104 	struct wmi_addba_setresponse_cmd *cmd;
3105 	struct sk_buff *skb;
3106 	int ret;
3107 
3108 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3109 	if (!skb)
3110 		return -ENOMEM;
3111 
3112 	cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
3113 	cmd->tlv_header =
3114 		ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SETRESPONSE_CMD,
3115 				       sizeof(*cmd));
3116 	cmd->vdev_id = cpu_to_le32(vdev_id);
3117 	ether_addr_copy(cmd->peer_macaddr.addr, mac);
3118 	cmd->tid = cpu_to_le32(tid);
3119 	cmd->statuscode = cpu_to_le32(status);
3120 
3121 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3122 		   "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
3123 		   vdev_id, mac, tid, status);
3124 
3125 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SET_RESP_CMDID);
3126 
3127 	if (ret) {
3128 		ath12k_warn(ar->ab,
3129 			    "failed to send WMI_ADDBA_SET_RESP_CMDID cmd\n");
3130 		dev_kfree_skb(skb);
3131 	}
3132 
3133 	return ret;
3134 }
3135 
ath12k_wmi_addba_send(struct ath12k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 buf_size)3136 int ath12k_wmi_addba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac,
3137 			  u32 tid, u32 buf_size)
3138 {
3139 	struct ath12k_wmi_pdev *wmi = ar->wmi;
3140 	struct wmi_addba_send_cmd *cmd;
3141 	struct sk_buff *skb;
3142 	int ret;
3143 
3144 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3145 	if (!skb)
3146 		return -ENOMEM;
3147 
3148 	cmd = (struct wmi_addba_send_cmd *)skb->data;
3149 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SEND_CMD,
3150 						 sizeof(*cmd));
3151 	cmd->vdev_id = cpu_to_le32(vdev_id);
3152 	ether_addr_copy(cmd->peer_macaddr.addr, mac);
3153 	cmd->tid = cpu_to_le32(tid);
3154 	cmd->buffersize = cpu_to_le32(buf_size);
3155 
3156 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3157 		   "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
3158 		   vdev_id, mac, tid, buf_size);
3159 
3160 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SEND_CMDID);
3161 
3162 	if (ret) {
3163 		ath12k_warn(ar->ab,
3164 			    "failed to send WMI_ADDBA_SEND_CMDID cmd\n");
3165 		dev_kfree_skb(skb);
3166 	}
3167 
3168 	return ret;
3169 }
3170 
ath12k_wmi_addba_clear_resp(struct ath12k * ar,u32 vdev_id,const u8 * mac)3171 int ath12k_wmi_addba_clear_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac)
3172 {
3173 	struct ath12k_wmi_pdev *wmi = ar->wmi;
3174 	struct wmi_addba_clear_resp_cmd *cmd;
3175 	struct sk_buff *skb;
3176 	int ret;
3177 
3178 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3179 	if (!skb)
3180 		return -ENOMEM;
3181 
3182 	cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
3183 	cmd->tlv_header =
3184 		ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_CLEAR_RESP_CMD,
3185 				       sizeof(*cmd));
3186 	cmd->vdev_id = cpu_to_le32(vdev_id);
3187 	ether_addr_copy(cmd->peer_macaddr.addr, mac);
3188 
3189 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3190 		   "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
3191 		   vdev_id, mac);
3192 
3193 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_CLEAR_RESP_CMDID);
3194 
3195 	if (ret) {
3196 		ath12k_warn(ar->ab,
3197 			    "failed to send WMI_ADDBA_CLEAR_RESP_CMDID cmd\n");
3198 		dev_kfree_skb(skb);
3199 	}
3200 
3201 	return ret;
3202 }
3203 
ath12k_wmi_send_init_country_cmd(struct ath12k * ar,struct ath12k_wmi_init_country_arg * arg)3204 int ath12k_wmi_send_init_country_cmd(struct ath12k *ar,
3205 				     struct ath12k_wmi_init_country_arg *arg)
3206 {
3207 	struct ath12k_wmi_pdev *wmi = ar->wmi;
3208 	struct wmi_init_country_cmd *cmd;
3209 	struct sk_buff *skb;
3210 	int ret;
3211 
3212 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3213 	if (!skb)
3214 		return -ENOMEM;
3215 
3216 	cmd = (struct wmi_init_country_cmd *)skb->data;
3217 	cmd->tlv_header =
3218 		ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_INIT_COUNTRY_CMD,
3219 				       sizeof(*cmd));
3220 
3221 	cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
3222 
3223 	switch (arg->flags) {
3224 	case ALPHA_IS_SET:
3225 		cmd->init_cc_type = WMI_COUNTRY_INFO_TYPE_ALPHA;
3226 		memcpy(&cmd->cc_info.alpha2, arg->cc_info.alpha2, 3);
3227 		break;
3228 	case CC_IS_SET:
3229 		cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE);
3230 		cmd->cc_info.country_code =
3231 			cpu_to_le32(arg->cc_info.country_code);
3232 		break;
3233 	case REGDMN_IS_SET:
3234 		cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_REGDOMAIN);
3235 		cmd->cc_info.regdom_id = cpu_to_le32(arg->cc_info.regdom_id);
3236 		break;
3237 	default:
3238 		ret = -EINVAL;
3239 		goto out;
3240 	}
3241 
3242 	ret = ath12k_wmi_cmd_send(wmi, skb,
3243 				  WMI_SET_INIT_COUNTRY_CMDID);
3244 
3245 out:
3246 	if (ret) {
3247 		ath12k_warn(ar->ab,
3248 			    "failed to send WMI_SET_INIT_COUNTRY CMD :%d\n",
3249 			    ret);
3250 		dev_kfree_skb(skb);
3251 	}
3252 
3253 	return ret;
3254 }
3255 
3256 int
ath12k_wmi_send_twt_enable_cmd(struct ath12k * ar,u32 pdev_id)3257 ath12k_wmi_send_twt_enable_cmd(struct ath12k *ar, u32 pdev_id)
3258 {
3259 	struct ath12k_wmi_pdev *wmi = ar->wmi;
3260 	struct ath12k_base *ab = wmi->wmi_ab->ab;
3261 	struct wmi_twt_enable_params_cmd *cmd;
3262 	struct sk_buff *skb;
3263 	int ret, len;
3264 
3265 	len = sizeof(*cmd);
3266 
3267 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3268 	if (!skb)
3269 		return -ENOMEM;
3270 
3271 	cmd = (struct wmi_twt_enable_params_cmd *)skb->data;
3272 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_ENABLE_CMD,
3273 						 len);
3274 	cmd->pdev_id = cpu_to_le32(pdev_id);
3275 	cmd->sta_cong_timer_ms = cpu_to_le32(ATH12K_TWT_DEF_STA_CONG_TIMER_MS);
3276 	cmd->default_slot_size = cpu_to_le32(ATH12K_TWT_DEF_DEFAULT_SLOT_SIZE);
3277 	cmd->congestion_thresh_setup =
3278 		cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_SETUP);
3279 	cmd->congestion_thresh_teardown =
3280 		cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_TEARDOWN);
3281 	cmd->congestion_thresh_critical =
3282 		cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_CRITICAL);
3283 	cmd->interference_thresh_teardown =
3284 		cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN);
3285 	cmd->interference_thresh_setup =
3286 		cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_SETUP);
3287 	cmd->min_no_sta_setup = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_SETUP);
3288 	cmd->min_no_sta_teardown = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_TEARDOWN);
3289 	cmd->no_of_bcast_mcast_slots =
3290 		cpu_to_le32(ATH12K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS);
3291 	cmd->min_no_twt_slots = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_TWT_SLOTS);
3292 	cmd->max_no_sta_twt = cpu_to_le32(ATH12K_TWT_DEF_MAX_NO_STA_TWT);
3293 	cmd->mode_check_interval = cpu_to_le32(ATH12K_TWT_DEF_MODE_CHECK_INTERVAL);
3294 	cmd->add_sta_slot_interval = cpu_to_le32(ATH12K_TWT_DEF_ADD_STA_SLOT_INTERVAL);
3295 	cmd->remove_sta_slot_interval =
3296 		cpu_to_le32(ATH12K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL);
3297 	/* TODO add MBSSID support */
3298 	cmd->mbss_support = 0;
3299 
3300 	ret = ath12k_wmi_cmd_send(wmi, skb,
3301 				  WMI_TWT_ENABLE_CMDID);
3302 	if (ret) {
3303 		ath12k_warn(ab, "Failed to send WMI_TWT_ENABLE_CMDID");
3304 		dev_kfree_skb(skb);
3305 	}
3306 	return ret;
3307 }
3308 
3309 int
ath12k_wmi_send_twt_disable_cmd(struct ath12k * ar,u32 pdev_id)3310 ath12k_wmi_send_twt_disable_cmd(struct ath12k *ar, u32 pdev_id)
3311 {
3312 	struct ath12k_wmi_pdev *wmi = ar->wmi;
3313 	struct ath12k_base *ab = wmi->wmi_ab->ab;
3314 	struct wmi_twt_disable_params_cmd *cmd;
3315 	struct sk_buff *skb;
3316 	int ret, len;
3317 
3318 	len = sizeof(*cmd);
3319 
3320 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3321 	if (!skb)
3322 		return -ENOMEM;
3323 
3324 	cmd = (struct wmi_twt_disable_params_cmd *)skb->data;
3325 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_DISABLE_CMD,
3326 						 len);
3327 	cmd->pdev_id = cpu_to_le32(pdev_id);
3328 
3329 	ret = ath12k_wmi_cmd_send(wmi, skb,
3330 				  WMI_TWT_DISABLE_CMDID);
3331 	if (ret) {
3332 		ath12k_warn(ab, "Failed to send WMI_TWT_DISABLE_CMDID");
3333 		dev_kfree_skb(skb);
3334 	}
3335 	return ret;
3336 }
3337 
3338 int
ath12k_wmi_send_obss_spr_cmd(struct ath12k * ar,u32 vdev_id,struct ieee80211_he_obss_pd * he_obss_pd)3339 ath12k_wmi_send_obss_spr_cmd(struct ath12k *ar, u32 vdev_id,
3340 			     struct ieee80211_he_obss_pd *he_obss_pd)
3341 {
3342 	struct ath12k_wmi_pdev *wmi = ar->wmi;
3343 	struct ath12k_base *ab = wmi->wmi_ab->ab;
3344 	struct wmi_obss_spatial_reuse_params_cmd *cmd;
3345 	struct sk_buff *skb;
3346 	int ret, len;
3347 
3348 	len = sizeof(*cmd);
3349 
3350 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3351 	if (!skb)
3352 		return -ENOMEM;
3353 
3354 	cmd = (struct wmi_obss_spatial_reuse_params_cmd *)skb->data;
3355 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD,
3356 						 len);
3357 	cmd->vdev_id = cpu_to_le32(vdev_id);
3358 	cmd->enable = cpu_to_le32(he_obss_pd->enable);
3359 	cmd->obss_min = a_cpu_to_sle32(he_obss_pd->min_offset);
3360 	cmd->obss_max = a_cpu_to_sle32(he_obss_pd->max_offset);
3361 
3362 	ret = ath12k_wmi_cmd_send(wmi, skb,
3363 				  WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID);
3364 	if (ret) {
3365 		ath12k_warn(ab,
3366 			    "Failed to send WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID");
3367 		dev_kfree_skb(skb);
3368 	}
3369 	return ret;
3370 }
3371 
ath12k_wmi_obss_color_cfg_cmd(struct ath12k * ar,u32 vdev_id,u8 bss_color,u32 period,bool enable)3372 int ath12k_wmi_obss_color_cfg_cmd(struct ath12k *ar, u32 vdev_id,
3373 				  u8 bss_color, u32 period,
3374 				  bool enable)
3375 {
3376 	struct ath12k_wmi_pdev *wmi = ar->wmi;
3377 	struct ath12k_base *ab = wmi->wmi_ab->ab;
3378 	struct wmi_obss_color_collision_cfg_params_cmd *cmd;
3379 	struct sk_buff *skb;
3380 	int ret, len;
3381 
3382 	len = sizeof(*cmd);
3383 
3384 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3385 	if (!skb)
3386 		return -ENOMEM;
3387 
3388 	cmd = (struct wmi_obss_color_collision_cfg_params_cmd *)skb->data;
3389 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG,
3390 						 len);
3391 	cmd->vdev_id = cpu_to_le32(vdev_id);
3392 	cmd->evt_type = enable ? cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION) :
3393 		cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION_DISABLE);
3394 	cmd->current_bss_color = cpu_to_le32(bss_color);
3395 	cmd->detection_period_ms = cpu_to_le32(period);
3396 	cmd->scan_period_ms = cpu_to_le32(ATH12K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS);
3397 	cmd->free_slot_expiry_time_ms = 0;
3398 	cmd->flags = 0;
3399 
3400 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3401 		   "wmi_send_obss_color_collision_cfg id %d type %d bss_color %d detect_period %d scan_period %d\n",
3402 		   cmd->vdev_id, cmd->evt_type, cmd->current_bss_color,
3403 		   cmd->detection_period_ms, cmd->scan_period_ms);
3404 
3405 	ret = ath12k_wmi_cmd_send(wmi, skb,
3406 				  WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID);
3407 	if (ret) {
3408 		ath12k_warn(ab, "Failed to send WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID");
3409 		dev_kfree_skb(skb);
3410 	}
3411 	return ret;
3412 }
3413 
ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k * ar,u32 vdev_id,bool enable)3414 int ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k *ar, u32 vdev_id,
3415 						bool enable)
3416 {
3417 	struct ath12k_wmi_pdev *wmi = ar->wmi;
3418 	struct ath12k_base *ab = wmi->wmi_ab->ab;
3419 	struct wmi_bss_color_change_enable_params_cmd *cmd;
3420 	struct sk_buff *skb;
3421 	int ret, len;
3422 
3423 	len = sizeof(*cmd);
3424 
3425 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3426 	if (!skb)
3427 		return -ENOMEM;
3428 
3429 	cmd = (struct wmi_bss_color_change_enable_params_cmd *)skb->data;
3430 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BSS_COLOR_CHANGE_ENABLE,
3431 						 len);
3432 	cmd->vdev_id = cpu_to_le32(vdev_id);
3433 	cmd->enable = enable ? cpu_to_le32(1) : 0;
3434 
3435 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3436 		   "wmi_send_bss_color_change_enable id %d enable %d\n",
3437 		   cmd->vdev_id, cmd->enable);
3438 
3439 	ret = ath12k_wmi_cmd_send(wmi, skb,
3440 				  WMI_BSS_COLOR_CHANGE_ENABLE_CMDID);
3441 	if (ret) {
3442 		ath12k_warn(ab, "Failed to send WMI_BSS_COLOR_CHANGE_ENABLE_CMDID");
3443 		dev_kfree_skb(skb);
3444 	}
3445 	return ret;
3446 }
3447 
ath12k_wmi_fils_discovery_tmpl(struct ath12k * ar,u32 vdev_id,struct sk_buff * tmpl)3448 int ath12k_wmi_fils_discovery_tmpl(struct ath12k *ar, u32 vdev_id,
3449 				   struct sk_buff *tmpl)
3450 {
3451 	struct wmi_tlv *tlv;
3452 	struct sk_buff *skb;
3453 	void *ptr;
3454 	int ret, len;
3455 	size_t aligned_len;
3456 	struct wmi_fils_discovery_tmpl_cmd *cmd;
3457 
3458 	aligned_len = roundup(tmpl->len, 4);
3459 	len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len;
3460 
3461 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3462 		   "WMI vdev %i set FILS discovery template\n", vdev_id);
3463 
3464 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
3465 	if (!skb)
3466 		return -ENOMEM;
3467 
3468 	cmd = (struct wmi_fils_discovery_tmpl_cmd *)skb->data;
3469 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FILS_DISCOVERY_TMPL_CMD,
3470 						 sizeof(*cmd));
3471 	cmd->vdev_id = cpu_to_le32(vdev_id);
3472 	cmd->buf_len = cpu_to_le32(tmpl->len);
3473 	ptr = skb->data + sizeof(*cmd);
3474 
3475 	tlv = ptr;
3476 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len);
3477 	memcpy(tlv->value, tmpl->data, tmpl->len);
3478 
3479 	ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_FILS_DISCOVERY_TMPL_CMDID);
3480 	if (ret) {
3481 		ath12k_warn(ar->ab,
3482 			    "WMI vdev %i failed to send FILS discovery template command\n",
3483 			    vdev_id);
3484 		dev_kfree_skb(skb);
3485 	}
3486 	return ret;
3487 }
3488 
ath12k_wmi_probe_resp_tmpl(struct ath12k * ar,u32 vdev_id,struct sk_buff * tmpl)3489 int ath12k_wmi_probe_resp_tmpl(struct ath12k *ar, u32 vdev_id,
3490 			       struct sk_buff *tmpl)
3491 {
3492 	struct wmi_probe_tmpl_cmd *cmd;
3493 	struct ath12k_wmi_bcn_prb_info_params *probe_info;
3494 	struct wmi_tlv *tlv;
3495 	struct sk_buff *skb;
3496 	void *ptr;
3497 	int ret, len;
3498 	size_t aligned_len = roundup(tmpl->len, 4);
3499 
3500 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3501 		   "WMI vdev %i set probe response template\n", vdev_id);
3502 
3503 	len = sizeof(*cmd) + sizeof(*probe_info) + TLV_HDR_SIZE + aligned_len;
3504 
3505 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
3506 	if (!skb)
3507 		return -ENOMEM;
3508 
3509 	cmd = (struct wmi_probe_tmpl_cmd *)skb->data;
3510 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PRB_TMPL_CMD,
3511 						 sizeof(*cmd));
3512 	cmd->vdev_id = cpu_to_le32(vdev_id);
3513 	cmd->buf_len = cpu_to_le32(tmpl->len);
3514 
3515 	ptr = skb->data + sizeof(*cmd);
3516 
3517 	probe_info = ptr;
3518 	len = sizeof(*probe_info);
3519 	probe_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO,
3520 							len);
3521 	probe_info->caps = 0;
3522 	probe_info->erp = 0;
3523 
3524 	ptr += sizeof(*probe_info);
3525 
3526 	tlv = ptr;
3527 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len);
3528 	memcpy(tlv->value, tmpl->data, tmpl->len);
3529 
3530 	ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_PRB_TMPL_CMDID);
3531 	if (ret) {
3532 		ath12k_warn(ar->ab,
3533 			    "WMI vdev %i failed to send probe response template command\n",
3534 			    vdev_id);
3535 		dev_kfree_skb(skb);
3536 	}
3537 	return ret;
3538 }
3539 
ath12k_wmi_fils_discovery(struct ath12k * ar,u32 vdev_id,u32 interval,bool unsol_bcast_probe_resp_enabled)3540 int ath12k_wmi_fils_discovery(struct ath12k *ar, u32 vdev_id, u32 interval,
3541 			      bool unsol_bcast_probe_resp_enabled)
3542 {
3543 	struct sk_buff *skb;
3544 	int ret, len;
3545 	struct wmi_fils_discovery_cmd *cmd;
3546 
3547 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3548 		   "WMI vdev %i set %s interval to %u TU\n",
3549 		   vdev_id, unsol_bcast_probe_resp_enabled ?
3550 		   "unsolicited broadcast probe response" : "FILS discovery",
3551 		   interval);
3552 
3553 	len = sizeof(*cmd);
3554 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
3555 	if (!skb)
3556 		return -ENOMEM;
3557 
3558 	cmd = (struct wmi_fils_discovery_cmd *)skb->data;
3559 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ENABLE_FILS_CMD,
3560 						 len);
3561 	cmd->vdev_id = cpu_to_le32(vdev_id);
3562 	cmd->interval = cpu_to_le32(interval);
3563 	cmd->config = cpu_to_le32(unsol_bcast_probe_resp_enabled);
3564 
3565 	ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_ENABLE_FILS_CMDID);
3566 	if (ret) {
3567 		ath12k_warn(ar->ab,
3568 			    "WMI vdev %i failed to send FILS discovery enable/disable command\n",
3569 			    vdev_id);
3570 		dev_kfree_skb(skb);
3571 	}
3572 	return ret;
3573 }
3574 
3575 static void
ath12k_fill_band_to_mac_param(struct ath12k_base * soc,struct ath12k_wmi_pdev_band_arg * arg)3576 ath12k_fill_band_to_mac_param(struct ath12k_base  *soc,
3577 			      struct ath12k_wmi_pdev_band_arg *arg)
3578 {
3579 	u8 i;
3580 	struct ath12k_wmi_hal_reg_capabilities_ext_arg *hal_reg_cap;
3581 	struct ath12k_pdev *pdev;
3582 
3583 	for (i = 0; i < soc->num_radios; i++) {
3584 		pdev = &soc->pdevs[i];
3585 		hal_reg_cap = &soc->hal_reg_cap[i];
3586 		arg[i].pdev_id = pdev->pdev_id;
3587 
3588 		switch (pdev->cap.supported_bands) {
3589 		case WMI_HOST_WLAN_2G_5G_CAP:
3590 			arg[i].start_freq = hal_reg_cap->low_2ghz_chan;
3591 			arg[i].end_freq = hal_reg_cap->high_5ghz_chan;
3592 			break;
3593 		case WMI_HOST_WLAN_2G_CAP:
3594 			arg[i].start_freq = hal_reg_cap->low_2ghz_chan;
3595 			arg[i].end_freq = hal_reg_cap->high_2ghz_chan;
3596 			break;
3597 		case WMI_HOST_WLAN_5G_CAP:
3598 			arg[i].start_freq = hal_reg_cap->low_5ghz_chan;
3599 			arg[i].end_freq = hal_reg_cap->high_5ghz_chan;
3600 			break;
3601 		default:
3602 			break;
3603 		}
3604 	}
3605 }
3606 
3607 static void
ath12k_wmi_copy_resource_config(struct ath12k_wmi_resource_config_params * wmi_cfg,struct ath12k_wmi_resource_config_arg * tg_cfg)3608 ath12k_wmi_copy_resource_config(struct ath12k_wmi_resource_config_params *wmi_cfg,
3609 				struct ath12k_wmi_resource_config_arg *tg_cfg)
3610 {
3611 	wmi_cfg->num_vdevs = cpu_to_le32(tg_cfg->num_vdevs);
3612 	wmi_cfg->num_peers = cpu_to_le32(tg_cfg->num_peers);
3613 	wmi_cfg->num_offload_peers = cpu_to_le32(tg_cfg->num_offload_peers);
3614 	wmi_cfg->num_offload_reorder_buffs =
3615 		cpu_to_le32(tg_cfg->num_offload_reorder_buffs);
3616 	wmi_cfg->num_peer_keys = cpu_to_le32(tg_cfg->num_peer_keys);
3617 	wmi_cfg->num_tids = cpu_to_le32(tg_cfg->num_tids);
3618 	wmi_cfg->ast_skid_limit = cpu_to_le32(tg_cfg->ast_skid_limit);
3619 	wmi_cfg->tx_chain_mask = cpu_to_le32(tg_cfg->tx_chain_mask);
3620 	wmi_cfg->rx_chain_mask = cpu_to_le32(tg_cfg->rx_chain_mask);
3621 	wmi_cfg->rx_timeout_pri[0] = cpu_to_le32(tg_cfg->rx_timeout_pri[0]);
3622 	wmi_cfg->rx_timeout_pri[1] = cpu_to_le32(tg_cfg->rx_timeout_pri[1]);
3623 	wmi_cfg->rx_timeout_pri[2] = cpu_to_le32(tg_cfg->rx_timeout_pri[2]);
3624 	wmi_cfg->rx_timeout_pri[3] = cpu_to_le32(tg_cfg->rx_timeout_pri[3]);
3625 	wmi_cfg->rx_decap_mode = cpu_to_le32(tg_cfg->rx_decap_mode);
3626 	wmi_cfg->scan_max_pending_req = cpu_to_le32(tg_cfg->scan_max_pending_req);
3627 	wmi_cfg->bmiss_offload_max_vdev = cpu_to_le32(tg_cfg->bmiss_offload_max_vdev);
3628 	wmi_cfg->roam_offload_max_vdev = cpu_to_le32(tg_cfg->roam_offload_max_vdev);
3629 	wmi_cfg->roam_offload_max_ap_profiles =
3630 		cpu_to_le32(tg_cfg->roam_offload_max_ap_profiles);
3631 	wmi_cfg->num_mcast_groups = cpu_to_le32(tg_cfg->num_mcast_groups);
3632 	wmi_cfg->num_mcast_table_elems = cpu_to_le32(tg_cfg->num_mcast_table_elems);
3633 	wmi_cfg->mcast2ucast_mode = cpu_to_le32(tg_cfg->mcast2ucast_mode);
3634 	wmi_cfg->tx_dbg_log_size = cpu_to_le32(tg_cfg->tx_dbg_log_size);
3635 	wmi_cfg->num_wds_entries = cpu_to_le32(tg_cfg->num_wds_entries);
3636 	wmi_cfg->dma_burst_size = cpu_to_le32(tg_cfg->dma_burst_size);
3637 	wmi_cfg->mac_aggr_delim = cpu_to_le32(tg_cfg->mac_aggr_delim);
3638 	wmi_cfg->rx_skip_defrag_timeout_dup_detection_check =
3639 		cpu_to_le32(tg_cfg->rx_skip_defrag_timeout_dup_detection_check);
3640 	wmi_cfg->vow_config = cpu_to_le32(tg_cfg->vow_config);
3641 	wmi_cfg->gtk_offload_max_vdev = cpu_to_le32(tg_cfg->gtk_offload_max_vdev);
3642 	wmi_cfg->num_msdu_desc = cpu_to_le32(tg_cfg->num_msdu_desc);
3643 	wmi_cfg->max_frag_entries = cpu_to_le32(tg_cfg->max_frag_entries);
3644 	wmi_cfg->num_tdls_vdevs = cpu_to_le32(tg_cfg->num_tdls_vdevs);
3645 	wmi_cfg->num_tdls_conn_table_entries =
3646 		cpu_to_le32(tg_cfg->num_tdls_conn_table_entries);
3647 	wmi_cfg->beacon_tx_offload_max_vdev =
3648 		cpu_to_le32(tg_cfg->beacon_tx_offload_max_vdev);
3649 	wmi_cfg->num_multicast_filter_entries =
3650 		cpu_to_le32(tg_cfg->num_multicast_filter_entries);
3651 	wmi_cfg->num_wow_filters = cpu_to_le32(tg_cfg->num_wow_filters);
3652 	wmi_cfg->num_keep_alive_pattern = cpu_to_le32(tg_cfg->num_keep_alive_pattern);
3653 	wmi_cfg->keep_alive_pattern_size = cpu_to_le32(tg_cfg->keep_alive_pattern_size);
3654 	wmi_cfg->max_tdls_concurrent_sleep_sta =
3655 		cpu_to_le32(tg_cfg->max_tdls_concurrent_sleep_sta);
3656 	wmi_cfg->max_tdls_concurrent_buffer_sta =
3657 		cpu_to_le32(tg_cfg->max_tdls_concurrent_buffer_sta);
3658 	wmi_cfg->wmi_send_separate = cpu_to_le32(tg_cfg->wmi_send_separate);
3659 	wmi_cfg->num_ocb_vdevs = cpu_to_le32(tg_cfg->num_ocb_vdevs);
3660 	wmi_cfg->num_ocb_channels = cpu_to_le32(tg_cfg->num_ocb_channels);
3661 	wmi_cfg->num_ocb_schedules = cpu_to_le32(tg_cfg->num_ocb_schedules);
3662 	wmi_cfg->bpf_instruction_size = cpu_to_le32(tg_cfg->bpf_instruction_size);
3663 	wmi_cfg->max_bssid_rx_filters = cpu_to_le32(tg_cfg->max_bssid_rx_filters);
3664 	wmi_cfg->use_pdev_id = cpu_to_le32(tg_cfg->use_pdev_id);
3665 	wmi_cfg->flag1 = cpu_to_le32(tg_cfg->atf_config |
3666 				     WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64);
3667 	wmi_cfg->peer_map_unmap_version = cpu_to_le32(tg_cfg->peer_map_unmap_version);
3668 	wmi_cfg->sched_params = cpu_to_le32(tg_cfg->sched_params);
3669 	wmi_cfg->twt_ap_pdev_count = cpu_to_le32(tg_cfg->twt_ap_pdev_count);
3670 	wmi_cfg->twt_ap_sta_count = cpu_to_le32(tg_cfg->twt_ap_sta_count);
3671 	wmi_cfg->flags2 = le32_encode_bits(tg_cfg->peer_metadata_ver,
3672 					   WMI_RSRC_CFG_FLAGS2_RX_PEER_METADATA_VERSION);
3673 	wmi_cfg->host_service_flags = cpu_to_le32(tg_cfg->is_reg_cc_ext_event_supported <<
3674 				WMI_RSRC_CFG_HOST_SVC_FLAG_REG_CC_EXT_SUPPORT_BIT);
3675 	wmi_cfg->ema_max_vap_cnt = cpu_to_le32(tg_cfg->ema_max_vap_cnt);
3676 	wmi_cfg->ema_max_profile_period = cpu_to_le32(tg_cfg->ema_max_profile_period);
3677 	wmi_cfg->flags2 |= cpu_to_le32(WMI_RSRC_CFG_FLAGS2_CALC_NEXT_DTIM_COUNT_SET);
3678 }
3679 
ath12k_init_cmd_send(struct ath12k_wmi_pdev * wmi,struct ath12k_wmi_init_cmd_arg * arg)3680 static int ath12k_init_cmd_send(struct ath12k_wmi_pdev *wmi,
3681 				struct ath12k_wmi_init_cmd_arg *arg)
3682 {
3683 	struct ath12k_base *ab = wmi->wmi_ab->ab;
3684 	struct sk_buff *skb;
3685 	struct wmi_init_cmd *cmd;
3686 	struct ath12k_wmi_resource_config_params *cfg;
3687 	struct ath12k_wmi_pdev_set_hw_mode_cmd *hw_mode;
3688 	struct ath12k_wmi_pdev_band_to_mac_params *band_to_mac;
3689 	struct ath12k_wmi_host_mem_chunk_params *host_mem_chunks;
3690 	struct wmi_tlv *tlv;
3691 	size_t ret, len;
3692 	void *ptr;
3693 	u32 hw_mode_len = 0;
3694 	u16 idx;
3695 
3696 	if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX)
3697 		hw_mode_len = sizeof(*hw_mode) + TLV_HDR_SIZE +
3698 			      (arg->num_band_to_mac * sizeof(*band_to_mac));
3699 
3700 	len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(*cfg) + hw_mode_len +
3701 	      (arg->num_mem_chunks ? (sizeof(*host_mem_chunks) * WMI_MAX_MEM_REQS) : 0);
3702 
3703 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3704 	if (!skb)
3705 		return -ENOMEM;
3706 
3707 	cmd = (struct wmi_init_cmd *)skb->data;
3708 
3709 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_INIT_CMD,
3710 						 sizeof(*cmd));
3711 
3712 	ptr = skb->data + sizeof(*cmd);
3713 	cfg = ptr;
3714 
3715 	ath12k_wmi_copy_resource_config(cfg, &arg->res_cfg);
3716 
3717 	cfg->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_RESOURCE_CONFIG,
3718 						 sizeof(*cfg));
3719 
3720 	ptr += sizeof(*cfg);
3721 	host_mem_chunks = ptr + TLV_HDR_SIZE;
3722 	len = sizeof(struct ath12k_wmi_host_mem_chunk_params);
3723 
3724 	for (idx = 0; idx < arg->num_mem_chunks; ++idx) {
3725 		host_mem_chunks[idx].tlv_header =
3726 			ath12k_wmi_tlv_hdr(WMI_TAG_WLAN_HOST_MEMORY_CHUNK,
3727 					   len);
3728 
3729 		host_mem_chunks[idx].ptr = cpu_to_le32(arg->mem_chunks[idx].paddr);
3730 		host_mem_chunks[idx].size = cpu_to_le32(arg->mem_chunks[idx].len);
3731 		host_mem_chunks[idx].req_id = cpu_to_le32(arg->mem_chunks[idx].req_id);
3732 
3733 		ath12k_dbg(ab, ATH12K_DBG_WMI,
3734 			   "WMI host mem chunk req_id %d paddr 0x%llx len %d\n",
3735 			   arg->mem_chunks[idx].req_id,
3736 			   (u64)arg->mem_chunks[idx].paddr,
3737 			   arg->mem_chunks[idx].len);
3738 	}
3739 	cmd->num_host_mem_chunks = cpu_to_le32(arg->num_mem_chunks);
3740 	len = sizeof(struct ath12k_wmi_host_mem_chunk_params) * arg->num_mem_chunks;
3741 
3742 	/* num_mem_chunks is zero */
3743 	tlv = ptr;
3744 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
3745 	ptr += TLV_HDR_SIZE + len;
3746 
3747 	if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX) {
3748 		hw_mode = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)ptr;
3749 		hw_mode->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD,
3750 							     sizeof(*hw_mode));
3751 
3752 		hw_mode->hw_mode_index = cpu_to_le32(arg->hw_mode_id);
3753 		hw_mode->num_band_to_mac = cpu_to_le32(arg->num_band_to_mac);
3754 
3755 		ptr += sizeof(*hw_mode);
3756 
3757 		len = arg->num_band_to_mac * sizeof(*band_to_mac);
3758 		tlv = ptr;
3759 		tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
3760 
3761 		ptr += TLV_HDR_SIZE;
3762 		len = sizeof(*band_to_mac);
3763 
3764 		for (idx = 0; idx < arg->num_band_to_mac; idx++) {
3765 			band_to_mac = (void *)ptr;
3766 
3767 			band_to_mac->tlv_header =
3768 				ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BAND_TO_MAC,
3769 						       len);
3770 			band_to_mac->pdev_id = cpu_to_le32(arg->band_to_mac[idx].pdev_id);
3771 			band_to_mac->start_freq =
3772 				cpu_to_le32(arg->band_to_mac[idx].start_freq);
3773 			band_to_mac->end_freq =
3774 				cpu_to_le32(arg->band_to_mac[idx].end_freq);
3775 			ptr += sizeof(*band_to_mac);
3776 		}
3777 	}
3778 
3779 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_INIT_CMDID);
3780 	if (ret) {
3781 		ath12k_warn(ab, "failed to send WMI_INIT_CMDID\n");
3782 		dev_kfree_skb(skb);
3783 	}
3784 
3785 	return ret;
3786 }
3787 
ath12k_wmi_pdev_lro_cfg(struct ath12k * ar,int pdev_id)3788 int ath12k_wmi_pdev_lro_cfg(struct ath12k *ar,
3789 			    int pdev_id)
3790 {
3791 	struct ath12k_wmi_pdev_lro_config_cmd *cmd;
3792 	struct sk_buff *skb;
3793 	int ret;
3794 
3795 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
3796 	if (!skb)
3797 		return -ENOMEM;
3798 
3799 	cmd = (struct ath12k_wmi_pdev_lro_config_cmd *)skb->data;
3800 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_LRO_INFO_CMD,
3801 						 sizeof(*cmd));
3802 
3803 	get_random_bytes(cmd->th_4, sizeof(cmd->th_4));
3804 	get_random_bytes(cmd->th_6, sizeof(cmd->th_6));
3805 
3806 	cmd->pdev_id = cpu_to_le32(pdev_id);
3807 
3808 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3809 		   "WMI lro cfg cmd pdev_id 0x%x\n", pdev_id);
3810 
3811 	ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_LRO_CONFIG_CMDID);
3812 	if (ret) {
3813 		ath12k_warn(ar->ab,
3814 			    "failed to send lro cfg req wmi cmd\n");
3815 		goto err;
3816 	}
3817 
3818 	return 0;
3819 err:
3820 	dev_kfree_skb(skb);
3821 	return ret;
3822 }
3823 
ath12k_wmi_wait_for_service_ready(struct ath12k_base * ab)3824 int ath12k_wmi_wait_for_service_ready(struct ath12k_base *ab)
3825 {
3826 	unsigned long time_left;
3827 
3828 	time_left = wait_for_completion_timeout(&ab->wmi_ab.service_ready,
3829 						WMI_SERVICE_READY_TIMEOUT_HZ);
3830 	if (!time_left)
3831 		return -ETIMEDOUT;
3832 
3833 	return 0;
3834 }
3835 
ath12k_wmi_wait_for_unified_ready(struct ath12k_base * ab)3836 int ath12k_wmi_wait_for_unified_ready(struct ath12k_base *ab)
3837 {
3838 	unsigned long time_left;
3839 
3840 	time_left = wait_for_completion_timeout(&ab->wmi_ab.unified_ready,
3841 						WMI_SERVICE_READY_TIMEOUT_HZ);
3842 	if (!time_left)
3843 		return -ETIMEDOUT;
3844 
3845 	return 0;
3846 }
3847 
ath12k_wmi_set_hw_mode(struct ath12k_base * ab,enum wmi_host_hw_mode_config_type mode)3848 int ath12k_wmi_set_hw_mode(struct ath12k_base *ab,
3849 			   enum wmi_host_hw_mode_config_type mode)
3850 {
3851 	struct ath12k_wmi_pdev_set_hw_mode_cmd *cmd;
3852 	struct sk_buff *skb;
3853 	struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
3854 	int len;
3855 	int ret;
3856 
3857 	len = sizeof(*cmd);
3858 
3859 	skb = ath12k_wmi_alloc_skb(wmi_ab, len);
3860 	if (!skb)
3861 		return -ENOMEM;
3862 
3863 	cmd = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)skb->data;
3864 
3865 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD,
3866 						 sizeof(*cmd));
3867 
3868 	cmd->pdev_id = WMI_PDEV_ID_SOC;
3869 	cmd->hw_mode_index = cpu_to_le32(mode);
3870 
3871 	ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], skb, WMI_PDEV_SET_HW_MODE_CMDID);
3872 	if (ret) {
3873 		ath12k_warn(ab, "failed to send WMI_PDEV_SET_HW_MODE_CMDID\n");
3874 		dev_kfree_skb(skb);
3875 	}
3876 
3877 	return ret;
3878 }
3879 
ath12k_wmi_cmd_init(struct ath12k_base * ab)3880 int ath12k_wmi_cmd_init(struct ath12k_base *ab)
3881 {
3882 	struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
3883 	struct ath12k_wmi_init_cmd_arg arg = {};
3884 
3885 	if (test_bit(WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT,
3886 		     ab->wmi_ab.svc_map))
3887 		arg.res_cfg.is_reg_cc_ext_event_supported = true;
3888 
3889 	ab->hw_params->wmi_init(ab, &arg.res_cfg);
3890 	ab->wow.wmi_conf_rx_decap_mode = arg.res_cfg.rx_decap_mode;
3891 
3892 	arg.num_mem_chunks = wmi_ab->num_mem_chunks;
3893 	arg.hw_mode_id = wmi_ab->preferred_hw_mode;
3894 	arg.mem_chunks = wmi_ab->mem_chunks;
3895 
3896 	if (ab->hw_params->single_pdev_only)
3897 		arg.hw_mode_id = WMI_HOST_HW_MODE_MAX;
3898 
3899 	arg.num_band_to_mac = ab->num_radios;
3900 	ath12k_fill_band_to_mac_param(ab, arg.band_to_mac);
3901 
3902 	ab->dp.peer_metadata_ver = arg.res_cfg.peer_metadata_ver;
3903 
3904 	return ath12k_init_cmd_send(&wmi_ab->wmi[0], &arg);
3905 }
3906 
ath12k_wmi_vdev_spectral_conf(struct ath12k * ar,struct ath12k_wmi_vdev_spectral_conf_arg * arg)3907 int ath12k_wmi_vdev_spectral_conf(struct ath12k *ar,
3908 				  struct ath12k_wmi_vdev_spectral_conf_arg *arg)
3909 {
3910 	struct ath12k_wmi_vdev_spectral_conf_cmd *cmd;
3911 	struct sk_buff *skb;
3912 	int ret;
3913 
3914 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
3915 	if (!skb)
3916 		return -ENOMEM;
3917 
3918 	cmd = (struct ath12k_wmi_vdev_spectral_conf_cmd *)skb->data;
3919 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD,
3920 						 sizeof(*cmd));
3921 	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
3922 	cmd->scan_count = cpu_to_le32(arg->scan_count);
3923 	cmd->scan_period = cpu_to_le32(arg->scan_period);
3924 	cmd->scan_priority = cpu_to_le32(arg->scan_priority);
3925 	cmd->scan_fft_size = cpu_to_le32(arg->scan_fft_size);
3926 	cmd->scan_gc_ena = cpu_to_le32(arg->scan_gc_ena);
3927 	cmd->scan_restart_ena = cpu_to_le32(arg->scan_restart_ena);
3928 	cmd->scan_noise_floor_ref = cpu_to_le32(arg->scan_noise_floor_ref);
3929 	cmd->scan_init_delay = cpu_to_le32(arg->scan_init_delay);
3930 	cmd->scan_nb_tone_thr = cpu_to_le32(arg->scan_nb_tone_thr);
3931 	cmd->scan_str_bin_thr = cpu_to_le32(arg->scan_str_bin_thr);
3932 	cmd->scan_wb_rpt_mode = cpu_to_le32(arg->scan_wb_rpt_mode);
3933 	cmd->scan_rssi_rpt_mode = cpu_to_le32(arg->scan_rssi_rpt_mode);
3934 	cmd->scan_rssi_thr = cpu_to_le32(arg->scan_rssi_thr);
3935 	cmd->scan_pwr_format = cpu_to_le32(arg->scan_pwr_format);
3936 	cmd->scan_rpt_mode = cpu_to_le32(arg->scan_rpt_mode);
3937 	cmd->scan_bin_scale = cpu_to_le32(arg->scan_bin_scale);
3938 	cmd->scan_dbm_adj = cpu_to_le32(arg->scan_dbm_adj);
3939 	cmd->scan_chn_mask = cpu_to_le32(arg->scan_chn_mask);
3940 
3941 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3942 		   "WMI spectral scan config cmd vdev_id 0x%x\n",
3943 		   arg->vdev_id);
3944 
3945 	ret = ath12k_wmi_cmd_send(ar->wmi, skb,
3946 				  WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID);
3947 	if (ret) {
3948 		ath12k_warn(ar->ab,
3949 			    "failed to send spectral scan config wmi cmd\n");
3950 		goto err;
3951 	}
3952 
3953 	return 0;
3954 err:
3955 	dev_kfree_skb(skb);
3956 	return ret;
3957 }
3958 
ath12k_wmi_vdev_spectral_enable(struct ath12k * ar,u32 vdev_id,u32 trigger,u32 enable)3959 int ath12k_wmi_vdev_spectral_enable(struct ath12k *ar, u32 vdev_id,
3960 				    u32 trigger, u32 enable)
3961 {
3962 	struct ath12k_wmi_vdev_spectral_enable_cmd *cmd;
3963 	struct sk_buff *skb;
3964 	int ret;
3965 
3966 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
3967 	if (!skb)
3968 		return -ENOMEM;
3969 
3970 	cmd = (struct ath12k_wmi_vdev_spectral_enable_cmd *)skb->data;
3971 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD,
3972 						 sizeof(*cmd));
3973 
3974 	cmd->vdev_id = cpu_to_le32(vdev_id);
3975 	cmd->trigger_cmd = cpu_to_le32(trigger);
3976 	cmd->enable_cmd = cpu_to_le32(enable);
3977 
3978 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3979 		   "WMI spectral enable cmd vdev id 0x%x\n",
3980 		   vdev_id);
3981 
3982 	ret = ath12k_wmi_cmd_send(ar->wmi, skb,
3983 				  WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID);
3984 	if (ret) {
3985 		ath12k_warn(ar->ab,
3986 			    "failed to send spectral enable wmi cmd\n");
3987 		goto err;
3988 	}
3989 
3990 	return 0;
3991 err:
3992 	dev_kfree_skb(skb);
3993 	return ret;
3994 }
3995 
ath12k_wmi_pdev_dma_ring_cfg(struct ath12k * ar,struct ath12k_wmi_pdev_dma_ring_cfg_arg * arg)3996 int ath12k_wmi_pdev_dma_ring_cfg(struct ath12k *ar,
3997 				 struct ath12k_wmi_pdev_dma_ring_cfg_arg *arg)
3998 {
3999 	struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *cmd;
4000 	struct sk_buff *skb;
4001 	int ret;
4002 
4003 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
4004 	if (!skb)
4005 		return -ENOMEM;
4006 
4007 	cmd = (struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *)skb->data;
4008 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DMA_RING_CFG_REQ,
4009 						 sizeof(*cmd));
4010 
4011 	cmd->pdev_id = cpu_to_le32(arg->pdev_id);
4012 	cmd->module_id = cpu_to_le32(arg->module_id);
4013 	cmd->base_paddr_lo = cpu_to_le32(arg->base_paddr_lo);
4014 	cmd->base_paddr_hi = cpu_to_le32(arg->base_paddr_hi);
4015 	cmd->head_idx_paddr_lo = cpu_to_le32(arg->head_idx_paddr_lo);
4016 	cmd->head_idx_paddr_hi = cpu_to_le32(arg->head_idx_paddr_hi);
4017 	cmd->tail_idx_paddr_lo = cpu_to_le32(arg->tail_idx_paddr_lo);
4018 	cmd->tail_idx_paddr_hi = cpu_to_le32(arg->tail_idx_paddr_hi);
4019 	cmd->num_elems = cpu_to_le32(arg->num_elems);
4020 	cmd->buf_size = cpu_to_le32(arg->buf_size);
4021 	cmd->num_resp_per_event = cpu_to_le32(arg->num_resp_per_event);
4022 	cmd->event_timeout_ms = cpu_to_le32(arg->event_timeout_ms);
4023 
4024 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
4025 		   "WMI DMA ring cfg req cmd pdev_id 0x%x\n",
4026 		   arg->pdev_id);
4027 
4028 	ret = ath12k_wmi_cmd_send(ar->wmi, skb,
4029 				  WMI_PDEV_DMA_RING_CFG_REQ_CMDID);
4030 	if (ret) {
4031 		ath12k_warn(ar->ab,
4032 			    "failed to send dma ring cfg req wmi cmd\n");
4033 		goto err;
4034 	}
4035 
4036 	return 0;
4037 err:
4038 	dev_kfree_skb(skb);
4039 	return ret;
4040 }
4041 
ath12k_wmi_dma_buf_entry_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4042 static int ath12k_wmi_dma_buf_entry_parse(struct ath12k_base *soc,
4043 					  u16 tag, u16 len,
4044 					  const void *ptr, void *data)
4045 {
4046 	struct ath12k_wmi_dma_buf_release_arg *arg = data;
4047 
4048 	if (tag != WMI_TAG_DMA_BUF_RELEASE_ENTRY)
4049 		return -EPROTO;
4050 
4051 	if (arg->num_buf_entry >= le32_to_cpu(arg->fixed.num_buf_release_entry))
4052 		return -ENOBUFS;
4053 
4054 	arg->num_buf_entry++;
4055 	return 0;
4056 }
4057 
ath12k_wmi_dma_buf_meta_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4058 static int ath12k_wmi_dma_buf_meta_parse(struct ath12k_base *soc,
4059 					 u16 tag, u16 len,
4060 					 const void *ptr, void *data)
4061 {
4062 	struct ath12k_wmi_dma_buf_release_arg *arg = data;
4063 
4064 	if (tag != WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA)
4065 		return -EPROTO;
4066 
4067 	if (arg->num_meta >= le32_to_cpu(arg->fixed.num_meta_data_entry))
4068 		return -ENOBUFS;
4069 
4070 	arg->num_meta++;
4071 
4072 	return 0;
4073 }
4074 
ath12k_wmi_dma_buf_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)4075 static int ath12k_wmi_dma_buf_parse(struct ath12k_base *ab,
4076 				    u16 tag, u16 len,
4077 				    const void *ptr, void *data)
4078 {
4079 	struct ath12k_wmi_dma_buf_release_arg *arg = data;
4080 	const struct ath12k_wmi_dma_buf_release_fixed_params *fixed;
4081 	u32 pdev_id;
4082 	int ret;
4083 
4084 	switch (tag) {
4085 	case WMI_TAG_DMA_BUF_RELEASE:
4086 		fixed = ptr;
4087 		arg->fixed = *fixed;
4088 		pdev_id = DP_HW2SW_MACID(le32_to_cpu(fixed->pdev_id));
4089 		arg->fixed.pdev_id = cpu_to_le32(pdev_id);
4090 		break;
4091 	case WMI_TAG_ARRAY_STRUCT:
4092 		if (!arg->buf_entry_done) {
4093 			arg->num_buf_entry = 0;
4094 			arg->buf_entry = ptr;
4095 
4096 			ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4097 						  ath12k_wmi_dma_buf_entry_parse,
4098 						  arg);
4099 			if (ret) {
4100 				ath12k_warn(ab, "failed to parse dma buf entry tlv %d\n",
4101 					    ret);
4102 				return ret;
4103 			}
4104 
4105 			arg->buf_entry_done = true;
4106 		} else if (!arg->meta_data_done) {
4107 			arg->num_meta = 0;
4108 			arg->meta_data = ptr;
4109 
4110 			ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4111 						  ath12k_wmi_dma_buf_meta_parse,
4112 						  arg);
4113 			if (ret) {
4114 				ath12k_warn(ab, "failed to parse dma buf meta tlv %d\n",
4115 					    ret);
4116 				return ret;
4117 			}
4118 
4119 			arg->meta_data_done = true;
4120 		}
4121 		break;
4122 	default:
4123 		break;
4124 	}
4125 	return 0;
4126 }
4127 
ath12k_wmi_pdev_dma_ring_buf_release_event(struct ath12k_base * ab,struct sk_buff * skb)4128 static void ath12k_wmi_pdev_dma_ring_buf_release_event(struct ath12k_base *ab,
4129 						       struct sk_buff *skb)
4130 {
4131 	struct ath12k_wmi_dma_buf_release_arg arg = {};
4132 	struct ath12k_dbring_buf_release_event param;
4133 	int ret;
4134 
4135 	ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
4136 				  ath12k_wmi_dma_buf_parse,
4137 				  &arg);
4138 	if (ret) {
4139 		ath12k_warn(ab, "failed to parse dma buf release tlv %d\n", ret);
4140 		return;
4141 	}
4142 
4143 	param.fixed = arg.fixed;
4144 	param.buf_entry = arg.buf_entry;
4145 	param.num_buf_entry = arg.num_buf_entry;
4146 	param.meta_data = arg.meta_data;
4147 	param.num_meta = arg.num_meta;
4148 
4149 	ret = ath12k_dbring_buffer_release_event(ab, &param);
4150 	if (ret) {
4151 		ath12k_warn(ab, "failed to handle dma buf release event %d\n", ret);
4152 		return;
4153 	}
4154 }
4155 
ath12k_wmi_hw_mode_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4156 static int ath12k_wmi_hw_mode_caps_parse(struct ath12k_base *soc,
4157 					 u16 tag, u16 len,
4158 					 const void *ptr, void *data)
4159 {
4160 	struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4161 	struct ath12k_wmi_hw_mode_cap_params *hw_mode_cap;
4162 	u32 phy_map = 0;
4163 
4164 	if (tag != WMI_TAG_HW_MODE_CAPABILITIES)
4165 		return -EPROTO;
4166 
4167 	if (svc_rdy_ext->n_hw_mode_caps >= svc_rdy_ext->arg.num_hw_modes)
4168 		return -ENOBUFS;
4169 
4170 	hw_mode_cap = container_of(ptr, struct ath12k_wmi_hw_mode_cap_params,
4171 				   hw_mode_id);
4172 	svc_rdy_ext->n_hw_mode_caps++;
4173 
4174 	phy_map = le32_to_cpu(hw_mode_cap->phy_id_map);
4175 	svc_rdy_ext->tot_phy_id += fls(phy_map);
4176 
4177 	return 0;
4178 }
4179 
ath12k_wmi_hw_mode_caps(struct ath12k_base * soc,u16 len,const void * ptr,void * data)4180 static int ath12k_wmi_hw_mode_caps(struct ath12k_base *soc,
4181 				   u16 len, const void *ptr, void *data)
4182 {
4183 	struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4184 	const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps;
4185 	enum wmi_host_hw_mode_config_type mode, pref;
4186 	u32 i;
4187 	int ret;
4188 
4189 	svc_rdy_ext->n_hw_mode_caps = 0;
4190 	svc_rdy_ext->hw_mode_caps = ptr;
4191 
4192 	ret = ath12k_wmi_tlv_iter(soc, ptr, len,
4193 				  ath12k_wmi_hw_mode_caps_parse,
4194 				  svc_rdy_ext);
4195 	if (ret) {
4196 		ath12k_warn(soc, "failed to parse tlv %d\n", ret);
4197 		return ret;
4198 	}
4199 
4200 	for (i = 0 ; i < svc_rdy_ext->n_hw_mode_caps; i++) {
4201 		hw_mode_caps = &svc_rdy_ext->hw_mode_caps[i];
4202 		mode = le32_to_cpu(hw_mode_caps->hw_mode_id);
4203 
4204 		if (mode >= WMI_HOST_HW_MODE_MAX)
4205 			continue;
4206 
4207 		pref = soc->wmi_ab.preferred_hw_mode;
4208 
4209 		if (ath12k_hw_mode_pri_map[mode] < ath12k_hw_mode_pri_map[pref]) {
4210 			svc_rdy_ext->pref_hw_mode_caps = *hw_mode_caps;
4211 			soc->wmi_ab.preferred_hw_mode = mode;
4212 		}
4213 	}
4214 
4215 	ath12k_dbg(soc, ATH12K_DBG_WMI, "preferred_hw_mode:%d\n",
4216 		   soc->wmi_ab.preferred_hw_mode);
4217 	if (soc->wmi_ab.preferred_hw_mode == WMI_HOST_HW_MODE_MAX)
4218 		return -EINVAL;
4219 
4220 	return 0;
4221 }
4222 
ath12k_wmi_mac_phy_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4223 static int ath12k_wmi_mac_phy_caps_parse(struct ath12k_base *soc,
4224 					 u16 tag, u16 len,
4225 					 const void *ptr, void *data)
4226 {
4227 	struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4228 
4229 	if (tag != WMI_TAG_MAC_PHY_CAPABILITIES)
4230 		return -EPROTO;
4231 
4232 	if (svc_rdy_ext->n_mac_phy_caps >= svc_rdy_ext->tot_phy_id)
4233 		return -ENOBUFS;
4234 
4235 	len = min_t(u16, len, sizeof(struct ath12k_wmi_mac_phy_caps_params));
4236 	if (!svc_rdy_ext->n_mac_phy_caps) {
4237 		svc_rdy_ext->mac_phy_caps = kzalloc((svc_rdy_ext->tot_phy_id) * len,
4238 						    GFP_ATOMIC);
4239 		if (!svc_rdy_ext->mac_phy_caps)
4240 			return -ENOMEM;
4241 	}
4242 
4243 	memcpy(svc_rdy_ext->mac_phy_caps + svc_rdy_ext->n_mac_phy_caps, ptr, len);
4244 	svc_rdy_ext->n_mac_phy_caps++;
4245 	return 0;
4246 }
4247 
ath12k_wmi_ext_hal_reg_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4248 static int ath12k_wmi_ext_hal_reg_caps_parse(struct ath12k_base *soc,
4249 					     u16 tag, u16 len,
4250 					     const void *ptr, void *data)
4251 {
4252 	struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4253 
4254 	if (tag != WMI_TAG_HAL_REG_CAPABILITIES_EXT)
4255 		return -EPROTO;
4256 
4257 	if (svc_rdy_ext->n_ext_hal_reg_caps >= svc_rdy_ext->arg.num_phy)
4258 		return -ENOBUFS;
4259 
4260 	svc_rdy_ext->n_ext_hal_reg_caps++;
4261 	return 0;
4262 }
4263 
ath12k_wmi_ext_hal_reg_caps(struct ath12k_base * soc,u16 len,const void * ptr,void * data)4264 static int ath12k_wmi_ext_hal_reg_caps(struct ath12k_base *soc,
4265 				       u16 len, const void *ptr, void *data)
4266 {
4267 	struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0];
4268 	struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4269 	struct ath12k_wmi_hal_reg_capabilities_ext_arg reg_cap;
4270 	int ret;
4271 	u32 i;
4272 
4273 	svc_rdy_ext->n_ext_hal_reg_caps = 0;
4274 	svc_rdy_ext->ext_hal_reg_caps = ptr;
4275 	ret = ath12k_wmi_tlv_iter(soc, ptr, len,
4276 				  ath12k_wmi_ext_hal_reg_caps_parse,
4277 				  svc_rdy_ext);
4278 	if (ret) {
4279 		ath12k_warn(soc, "failed to parse tlv %d\n", ret);
4280 		return ret;
4281 	}
4282 
4283 	for (i = 0; i < svc_rdy_ext->arg.num_phy; i++) {
4284 		ret = ath12k_pull_reg_cap_svc_rdy_ext(wmi_handle,
4285 						      svc_rdy_ext->soc_hal_reg_caps,
4286 						      svc_rdy_ext->ext_hal_reg_caps, i,
4287 						      &reg_cap);
4288 		if (ret) {
4289 			ath12k_warn(soc, "failed to extract reg cap %d\n", i);
4290 			return ret;
4291 		}
4292 
4293 		if (reg_cap.phy_id >= MAX_RADIOS) {
4294 			ath12k_warn(soc, "unexpected phy id %u\n", reg_cap.phy_id);
4295 			return -EINVAL;
4296 		}
4297 
4298 		soc->hal_reg_cap[reg_cap.phy_id] = reg_cap;
4299 	}
4300 	return 0;
4301 }
4302 
ath12k_wmi_ext_soc_hal_reg_caps_parse(struct ath12k_base * soc,u16 len,const void * ptr,void * data)4303 static int ath12k_wmi_ext_soc_hal_reg_caps_parse(struct ath12k_base *soc,
4304 						 u16 len, const void *ptr,
4305 						 void *data)
4306 {
4307 	struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0];
4308 	struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4309 	u8 hw_mode_id = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.hw_mode_id);
4310 	u32 phy_id_map;
4311 	int pdev_index = 0;
4312 	int ret;
4313 
4314 	svc_rdy_ext->soc_hal_reg_caps = ptr;
4315 	svc_rdy_ext->arg.num_phy = le32_to_cpu(svc_rdy_ext->soc_hal_reg_caps->num_phy);
4316 
4317 	soc->num_radios = 0;
4318 	phy_id_map = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.phy_id_map);
4319 	soc->fw_pdev_count = 0;
4320 
4321 	while (phy_id_map && soc->num_radios < MAX_RADIOS) {
4322 		ret = ath12k_pull_mac_phy_cap_svc_ready_ext(wmi_handle,
4323 							    svc_rdy_ext,
4324 							    hw_mode_id, soc->num_radios,
4325 							    &soc->pdevs[pdev_index]);
4326 		if (ret) {
4327 			ath12k_warn(soc, "failed to extract mac caps, idx :%d\n",
4328 				    soc->num_radios);
4329 			return ret;
4330 		}
4331 
4332 		soc->num_radios++;
4333 
4334 		/* For single_pdev_only targets,
4335 		 * save mac_phy capability in the same pdev
4336 		 */
4337 		if (soc->hw_params->single_pdev_only)
4338 			pdev_index = 0;
4339 		else
4340 			pdev_index = soc->num_radios;
4341 
4342 		/* TODO: mac_phy_cap prints */
4343 		phy_id_map >>= 1;
4344 	}
4345 
4346 	if (soc->hw_params->single_pdev_only) {
4347 		soc->num_radios = 1;
4348 		soc->pdevs[0].pdev_id = 0;
4349 	}
4350 
4351 	return 0;
4352 }
4353 
ath12k_wmi_dma_ring_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4354 static int ath12k_wmi_dma_ring_caps_parse(struct ath12k_base *soc,
4355 					  u16 tag, u16 len,
4356 					  const void *ptr, void *data)
4357 {
4358 	struct ath12k_wmi_dma_ring_caps_parse *parse = data;
4359 
4360 	if (tag != WMI_TAG_DMA_RING_CAPABILITIES)
4361 		return -EPROTO;
4362 
4363 	parse->n_dma_ring_caps++;
4364 	return 0;
4365 }
4366 
ath12k_wmi_alloc_dbring_caps(struct ath12k_base * ab,u32 num_cap)4367 static int ath12k_wmi_alloc_dbring_caps(struct ath12k_base *ab,
4368 					u32 num_cap)
4369 {
4370 	size_t sz;
4371 	void *ptr;
4372 
4373 	sz = num_cap * sizeof(struct ath12k_dbring_cap);
4374 	ptr = kzalloc(sz, GFP_ATOMIC);
4375 	if (!ptr)
4376 		return -ENOMEM;
4377 
4378 	ab->db_caps = ptr;
4379 	ab->num_db_cap = num_cap;
4380 
4381 	return 0;
4382 }
4383 
ath12k_wmi_free_dbring_caps(struct ath12k_base * ab)4384 static void ath12k_wmi_free_dbring_caps(struct ath12k_base *ab)
4385 {
4386 	kfree(ab->db_caps);
4387 	ab->db_caps = NULL;
4388 	ab->num_db_cap = 0;
4389 }
4390 
ath12k_wmi_dma_ring_caps(struct ath12k_base * ab,u16 len,const void * ptr,void * data)4391 static int ath12k_wmi_dma_ring_caps(struct ath12k_base *ab,
4392 				    u16 len, const void *ptr, void *data)
4393 {
4394 	struct ath12k_wmi_dma_ring_caps_parse *dma_caps_parse = data;
4395 	struct ath12k_wmi_dma_ring_caps_params *dma_caps;
4396 	struct ath12k_dbring_cap *dir_buff_caps;
4397 	int ret;
4398 	u32 i;
4399 
4400 	dma_caps_parse->n_dma_ring_caps = 0;
4401 	dma_caps = (struct ath12k_wmi_dma_ring_caps_params *)ptr;
4402 	ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4403 				  ath12k_wmi_dma_ring_caps_parse,
4404 				  dma_caps_parse);
4405 	if (ret) {
4406 		ath12k_warn(ab, "failed to parse dma ring caps tlv %d\n", ret);
4407 		return ret;
4408 	}
4409 
4410 	if (!dma_caps_parse->n_dma_ring_caps)
4411 		return 0;
4412 
4413 	if (ab->num_db_cap) {
4414 		ath12k_warn(ab, "Already processed, so ignoring dma ring caps\n");
4415 		return 0;
4416 	}
4417 
4418 	ret = ath12k_wmi_alloc_dbring_caps(ab, dma_caps_parse->n_dma_ring_caps);
4419 	if (ret)
4420 		return ret;
4421 
4422 	dir_buff_caps = ab->db_caps;
4423 	for (i = 0; i < dma_caps_parse->n_dma_ring_caps; i++) {
4424 		if (le32_to_cpu(dma_caps[i].module_id) >= WMI_DIRECT_BUF_MAX) {
4425 			ath12k_warn(ab, "Invalid module id %d\n",
4426 				    le32_to_cpu(dma_caps[i].module_id));
4427 			ret = -EINVAL;
4428 			goto free_dir_buff;
4429 		}
4430 
4431 		dir_buff_caps[i].id = le32_to_cpu(dma_caps[i].module_id);
4432 		dir_buff_caps[i].pdev_id =
4433 			DP_HW2SW_MACID(le32_to_cpu(dma_caps[i].pdev_id));
4434 		dir_buff_caps[i].min_elem = le32_to_cpu(dma_caps[i].min_elem);
4435 		dir_buff_caps[i].min_buf_sz = le32_to_cpu(dma_caps[i].min_buf_sz);
4436 		dir_buff_caps[i].min_buf_align = le32_to_cpu(dma_caps[i].min_buf_align);
4437 	}
4438 
4439 	return 0;
4440 
4441 free_dir_buff:
4442 	ath12k_wmi_free_dbring_caps(ab);
4443 	return ret;
4444 }
4445 
ath12k_wmi_svc_rdy_ext_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)4446 static int ath12k_wmi_svc_rdy_ext_parse(struct ath12k_base *ab,
4447 					u16 tag, u16 len,
4448 					const void *ptr, void *data)
4449 {
4450 	struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0];
4451 	struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4452 	int ret;
4453 
4454 	switch (tag) {
4455 	case WMI_TAG_SERVICE_READY_EXT_EVENT:
4456 		ret = ath12k_pull_svc_ready_ext(wmi_handle, ptr,
4457 						&svc_rdy_ext->arg);
4458 		if (ret) {
4459 			ath12k_warn(ab, "unable to extract ext params\n");
4460 			return ret;
4461 		}
4462 		break;
4463 
4464 	case WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS:
4465 		svc_rdy_ext->hw_caps = ptr;
4466 		svc_rdy_ext->arg.num_hw_modes =
4467 			le32_to_cpu(svc_rdy_ext->hw_caps->num_hw_modes);
4468 		break;
4469 
4470 	case WMI_TAG_SOC_HAL_REG_CAPABILITIES:
4471 		ret = ath12k_wmi_ext_soc_hal_reg_caps_parse(ab, len, ptr,
4472 							    svc_rdy_ext);
4473 		if (ret)
4474 			return ret;
4475 		break;
4476 
4477 	case WMI_TAG_ARRAY_STRUCT:
4478 		if (!svc_rdy_ext->hw_mode_done) {
4479 			ret = ath12k_wmi_hw_mode_caps(ab, len, ptr, svc_rdy_ext);
4480 			if (ret)
4481 				return ret;
4482 
4483 			svc_rdy_ext->hw_mode_done = true;
4484 		} else if (!svc_rdy_ext->mac_phy_done) {
4485 			svc_rdy_ext->n_mac_phy_caps = 0;
4486 			ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4487 						  ath12k_wmi_mac_phy_caps_parse,
4488 						  svc_rdy_ext);
4489 			if (ret) {
4490 				ath12k_warn(ab, "failed to parse tlv %d\n", ret);
4491 				return ret;
4492 			}
4493 
4494 			svc_rdy_ext->mac_phy_done = true;
4495 		} else if (!svc_rdy_ext->ext_hal_reg_done) {
4496 			ret = ath12k_wmi_ext_hal_reg_caps(ab, len, ptr, svc_rdy_ext);
4497 			if (ret)
4498 				return ret;
4499 
4500 			svc_rdy_ext->ext_hal_reg_done = true;
4501 		} else if (!svc_rdy_ext->mac_phy_chainmask_combo_done) {
4502 			svc_rdy_ext->mac_phy_chainmask_combo_done = true;
4503 		} else if (!svc_rdy_ext->mac_phy_chainmask_cap_done) {
4504 			svc_rdy_ext->mac_phy_chainmask_cap_done = true;
4505 		} else if (!svc_rdy_ext->oem_dma_ring_cap_done) {
4506 			svc_rdy_ext->oem_dma_ring_cap_done = true;
4507 		} else if (!svc_rdy_ext->dma_ring_cap_done) {
4508 			ret = ath12k_wmi_dma_ring_caps(ab, len, ptr,
4509 						       &svc_rdy_ext->dma_caps_parse);
4510 			if (ret)
4511 				return ret;
4512 
4513 			svc_rdy_ext->dma_ring_cap_done = true;
4514 		}
4515 		break;
4516 
4517 	default:
4518 		break;
4519 	}
4520 	return 0;
4521 }
4522 
ath12k_service_ready_ext_event(struct ath12k_base * ab,struct sk_buff * skb)4523 static int ath12k_service_ready_ext_event(struct ath12k_base *ab,
4524 					  struct sk_buff *skb)
4525 {
4526 	struct ath12k_wmi_svc_rdy_ext_parse svc_rdy_ext = { };
4527 	int ret;
4528 
4529 	ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
4530 				  ath12k_wmi_svc_rdy_ext_parse,
4531 				  &svc_rdy_ext);
4532 	if (ret) {
4533 		ath12k_warn(ab, "failed to parse tlv %d\n", ret);
4534 		goto err;
4535 	}
4536 
4537 	if (!test_bit(WMI_TLV_SERVICE_EXT2_MSG, ab->wmi_ab.svc_map))
4538 		complete(&ab->wmi_ab.service_ready);
4539 
4540 	kfree(svc_rdy_ext.mac_phy_caps);
4541 	return 0;
4542 
4543 err:
4544 	ath12k_wmi_free_dbring_caps(ab);
4545 	return ret;
4546 }
4547 
ath12k_pull_svc_ready_ext2(struct ath12k_wmi_pdev * wmi_handle,const void * ptr,struct ath12k_wmi_svc_rdy_ext2_arg * arg)4548 static int ath12k_pull_svc_ready_ext2(struct ath12k_wmi_pdev *wmi_handle,
4549 				      const void *ptr,
4550 				      struct ath12k_wmi_svc_rdy_ext2_arg *arg)
4551 {
4552 	const struct wmi_service_ready_ext2_event *ev = ptr;
4553 
4554 	if (!ev)
4555 		return -EINVAL;
4556 
4557 	arg->reg_db_version = le32_to_cpu(ev->reg_db_version);
4558 	arg->hw_min_max_tx_power_2ghz = le32_to_cpu(ev->hw_min_max_tx_power_2ghz);
4559 	arg->hw_min_max_tx_power_5ghz = le32_to_cpu(ev->hw_min_max_tx_power_5ghz);
4560 	arg->chwidth_num_peer_caps = le32_to_cpu(ev->chwidth_num_peer_caps);
4561 	arg->preamble_puncture_bw = le32_to_cpu(ev->preamble_puncture_bw);
4562 	arg->max_user_per_ppdu_ofdma = le32_to_cpu(ev->max_user_per_ppdu_ofdma);
4563 	arg->max_user_per_ppdu_mumimo = le32_to_cpu(ev->max_user_per_ppdu_mumimo);
4564 	arg->target_cap_flags = le32_to_cpu(ev->target_cap_flags);
4565 	return 0;
4566 }
4567 
ath12k_wmi_eht_caps_parse(struct ath12k_pdev * pdev,u32 band,const __le32 cap_mac_info[],const __le32 cap_phy_info[],const __le32 supp_mcs[],const struct ath12k_wmi_ppe_threshold_params * ppet,__le32 cap_info_internal)4568 static void ath12k_wmi_eht_caps_parse(struct ath12k_pdev *pdev, u32 band,
4569 				      const __le32 cap_mac_info[],
4570 				      const __le32 cap_phy_info[],
4571 				      const __le32 supp_mcs[],
4572 				      const struct ath12k_wmi_ppe_threshold_params *ppet,
4573 				       __le32 cap_info_internal)
4574 {
4575 	struct ath12k_band_cap *cap_band = &pdev->cap.band[band];
4576 	u32 support_320mhz;
4577 	u8 i;
4578 
4579 	if (band == NL80211_BAND_6GHZ)
4580 		support_320mhz = cap_band->eht_cap_phy_info[0] &
4581 					IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ;
4582 
4583 	for (i = 0; i < WMI_MAX_EHTCAP_MAC_SIZE; i++)
4584 		cap_band->eht_cap_mac_info[i] = le32_to_cpu(cap_mac_info[i]);
4585 
4586 	for (i = 0; i < WMI_MAX_EHTCAP_PHY_SIZE; i++)
4587 		cap_band->eht_cap_phy_info[i] = le32_to_cpu(cap_phy_info[i]);
4588 
4589 	if (band == NL80211_BAND_6GHZ)
4590 		cap_band->eht_cap_phy_info[0] |= support_320mhz;
4591 
4592 	cap_band->eht_mcs_20_only = le32_to_cpu(supp_mcs[0]);
4593 	cap_band->eht_mcs_80 = le32_to_cpu(supp_mcs[1]);
4594 	if (band != NL80211_BAND_2GHZ) {
4595 		cap_band->eht_mcs_160 = le32_to_cpu(supp_mcs[2]);
4596 		cap_band->eht_mcs_320 = le32_to_cpu(supp_mcs[3]);
4597 	}
4598 
4599 	cap_band->eht_ppet.numss_m1 = le32_to_cpu(ppet->numss_m1);
4600 	cap_band->eht_ppet.ru_bit_mask = le32_to_cpu(ppet->ru_info);
4601 	for (i = 0; i < WMI_MAX_NUM_SS; i++)
4602 		cap_band->eht_ppet.ppet16_ppet8_ru3_ru0[i] =
4603 			le32_to_cpu(ppet->ppet16_ppet8_ru3_ru0[i]);
4604 
4605 	cap_band->eht_cap_info_internal = le32_to_cpu(cap_info_internal);
4606 }
4607 
4608 static int
ath12k_wmi_tlv_mac_phy_caps_ext_parse(struct ath12k_base * ab,const struct ath12k_wmi_caps_ext_params * caps,struct ath12k_pdev * pdev)4609 ath12k_wmi_tlv_mac_phy_caps_ext_parse(struct ath12k_base *ab,
4610 				      const struct ath12k_wmi_caps_ext_params *caps,
4611 				      struct ath12k_pdev *pdev)
4612 {
4613 	struct ath12k_band_cap *cap_band;
4614 	u32 bands, support_320mhz;
4615 	int i;
4616 
4617 	if (ab->hw_params->single_pdev_only) {
4618 		if (caps->hw_mode_id == WMI_HOST_HW_MODE_SINGLE) {
4619 			support_320mhz = le32_to_cpu(caps->eht_cap_phy_info_5ghz[0]) &
4620 				IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ;
4621 			cap_band = &pdev->cap.band[NL80211_BAND_6GHZ];
4622 			cap_band->eht_cap_phy_info[0] |= support_320mhz;
4623 			return 0;
4624 		}
4625 
4626 		for (i = 0; i < ab->fw_pdev_count; i++) {
4627 			struct ath12k_fw_pdev *fw_pdev = &ab->fw_pdev[i];
4628 
4629 			if (fw_pdev->pdev_id == ath12k_wmi_caps_ext_get_pdev_id(caps) &&
4630 			    fw_pdev->phy_id == le32_to_cpu(caps->phy_id)) {
4631 				bands = fw_pdev->supported_bands;
4632 				break;
4633 			}
4634 		}
4635 
4636 		if (i == ab->fw_pdev_count)
4637 			return -EINVAL;
4638 	} else {
4639 		bands = pdev->cap.supported_bands;
4640 	}
4641 
4642 	if (bands & WMI_HOST_WLAN_2G_CAP) {
4643 		ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_2GHZ,
4644 					  caps->eht_cap_mac_info_2ghz,
4645 					  caps->eht_cap_phy_info_2ghz,
4646 					  caps->eht_supp_mcs_ext_2ghz,
4647 					  &caps->eht_ppet_2ghz,
4648 					  caps->eht_cap_info_internal);
4649 	}
4650 
4651 	if (bands & WMI_HOST_WLAN_5G_CAP) {
4652 		ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_5GHZ,
4653 					  caps->eht_cap_mac_info_5ghz,
4654 					  caps->eht_cap_phy_info_5ghz,
4655 					  caps->eht_supp_mcs_ext_5ghz,
4656 					  &caps->eht_ppet_5ghz,
4657 					  caps->eht_cap_info_internal);
4658 
4659 		ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_6GHZ,
4660 					  caps->eht_cap_mac_info_5ghz,
4661 					  caps->eht_cap_phy_info_5ghz,
4662 					  caps->eht_supp_mcs_ext_5ghz,
4663 					  &caps->eht_ppet_5ghz,
4664 					  caps->eht_cap_info_internal);
4665 	}
4666 
4667 	pdev->cap.eml_cap = le32_to_cpu(caps->eml_capability);
4668 	pdev->cap.mld_cap = le32_to_cpu(caps->mld_capability);
4669 
4670 	return 0;
4671 }
4672 
ath12k_wmi_tlv_mac_phy_caps_ext(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)4673 static int ath12k_wmi_tlv_mac_phy_caps_ext(struct ath12k_base *ab, u16 tag,
4674 					   u16 len, const void *ptr,
4675 					   void *data)
4676 {
4677 	const struct ath12k_wmi_caps_ext_params *caps = ptr;
4678 	int i = 0, ret;
4679 
4680 	if (tag != WMI_TAG_MAC_PHY_CAPABILITIES_EXT)
4681 		return -EPROTO;
4682 
4683 	if (ab->hw_params->single_pdev_only) {
4684 		if (ab->wmi_ab.preferred_hw_mode != le32_to_cpu(caps->hw_mode_id) &&
4685 		    caps->hw_mode_id != WMI_HOST_HW_MODE_SINGLE)
4686 			return 0;
4687 	} else {
4688 		for (i = 0; i < ab->num_radios; i++) {
4689 			if (ab->pdevs[i].pdev_id ==
4690 			    ath12k_wmi_caps_ext_get_pdev_id(caps))
4691 				break;
4692 		}
4693 
4694 		if (i == ab->num_radios)
4695 			return -EINVAL;
4696 	}
4697 
4698 	ret = ath12k_wmi_tlv_mac_phy_caps_ext_parse(ab, caps, &ab->pdevs[i]);
4699 	if (ret) {
4700 		ath12k_warn(ab,
4701 			    "failed to parse extended MAC PHY capabilities for pdev %d: %d\n",
4702 			    ret, ab->pdevs[i].pdev_id);
4703 		return ret;
4704 	}
4705 
4706 	return 0;
4707 }
4708 
ath12k_wmi_svc_rdy_ext2_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)4709 static int ath12k_wmi_svc_rdy_ext2_parse(struct ath12k_base *ab,
4710 					 u16 tag, u16 len,
4711 					 const void *ptr, void *data)
4712 {
4713 	struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0];
4714 	struct ath12k_wmi_svc_rdy_ext2_parse *parse = data;
4715 	int ret;
4716 
4717 	switch (tag) {
4718 	case WMI_TAG_SERVICE_READY_EXT2_EVENT:
4719 		ret = ath12k_pull_svc_ready_ext2(wmi_handle, ptr,
4720 						 &parse->arg);
4721 		if (ret) {
4722 			ath12k_warn(ab,
4723 				    "failed to extract wmi service ready ext2 parameters: %d\n",
4724 				    ret);
4725 			return ret;
4726 		}
4727 		break;
4728 
4729 	case WMI_TAG_ARRAY_STRUCT:
4730 		if (!parse->dma_ring_cap_done) {
4731 			ret = ath12k_wmi_dma_ring_caps(ab, len, ptr,
4732 						       &parse->dma_caps_parse);
4733 			if (ret)
4734 				return ret;
4735 
4736 			parse->dma_ring_cap_done = true;
4737 		} else if (!parse->spectral_bin_scaling_done) {
4738 			/* TODO: This is a place-holder as WMI tag for
4739 			 * spectral scaling is before
4740 			 * WMI_TAG_MAC_PHY_CAPABILITIES_EXT
4741 			 */
4742 			parse->spectral_bin_scaling_done = true;
4743 		} else if (!parse->mac_phy_caps_ext_done) {
4744 			ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4745 						  ath12k_wmi_tlv_mac_phy_caps_ext,
4746 						  parse);
4747 			if (ret) {
4748 				ath12k_warn(ab, "failed to parse extended MAC PHY capabilities WMI TLV: %d\n",
4749 					    ret);
4750 				return ret;
4751 			}
4752 
4753 			parse->mac_phy_caps_ext_done = true;
4754 		}
4755 		break;
4756 	default:
4757 		break;
4758 	}
4759 
4760 	return 0;
4761 }
4762 
ath12k_service_ready_ext2_event(struct ath12k_base * ab,struct sk_buff * skb)4763 static int ath12k_service_ready_ext2_event(struct ath12k_base *ab,
4764 					   struct sk_buff *skb)
4765 {
4766 	struct ath12k_wmi_svc_rdy_ext2_parse svc_rdy_ext2 = { };
4767 	int ret;
4768 
4769 	ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
4770 				  ath12k_wmi_svc_rdy_ext2_parse,
4771 				  &svc_rdy_ext2);
4772 	if (ret) {
4773 		ath12k_warn(ab, "failed to parse ext2 event tlv %d\n", ret);
4774 		goto err;
4775 	}
4776 
4777 	complete(&ab->wmi_ab.service_ready);
4778 
4779 	return 0;
4780 
4781 err:
4782 	ath12k_wmi_free_dbring_caps(ab);
4783 	return ret;
4784 }
4785 
ath12k_pull_vdev_start_resp_tlv(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_vdev_start_resp_event * vdev_rsp)4786 static int ath12k_pull_vdev_start_resp_tlv(struct ath12k_base *ab, struct sk_buff *skb,
4787 					   struct wmi_vdev_start_resp_event *vdev_rsp)
4788 {
4789 	const void **tb;
4790 	const struct wmi_vdev_start_resp_event *ev;
4791 	int ret;
4792 
4793 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
4794 	if (IS_ERR(tb)) {
4795 		ret = PTR_ERR(tb);
4796 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
4797 		return ret;
4798 	}
4799 
4800 	ev = tb[WMI_TAG_VDEV_START_RESPONSE_EVENT];
4801 	if (!ev) {
4802 		ath12k_warn(ab, "failed to fetch vdev start resp ev");
4803 		kfree(tb);
4804 		return -EPROTO;
4805 	}
4806 
4807 	*vdev_rsp = *ev;
4808 
4809 	kfree(tb);
4810 	return 0;
4811 }
4812 
4813 static struct ath12k_reg_rule
create_ext_reg_rules_from_wmi(u32 num_reg_rules,struct ath12k_wmi_reg_rule_ext_params * wmi_reg_rule)4814 *create_ext_reg_rules_from_wmi(u32 num_reg_rules,
4815 			       struct ath12k_wmi_reg_rule_ext_params *wmi_reg_rule)
4816 {
4817 	struct ath12k_reg_rule *reg_rule_ptr;
4818 	u32 count;
4819 
4820 	reg_rule_ptr = kzalloc((num_reg_rules * sizeof(*reg_rule_ptr)),
4821 			       GFP_ATOMIC);
4822 
4823 	if (!reg_rule_ptr)
4824 		return NULL;
4825 
4826 	for (count = 0; count < num_reg_rules; count++) {
4827 		reg_rule_ptr[count].start_freq =
4828 			le32_get_bits(wmi_reg_rule[count].freq_info,
4829 				      REG_RULE_START_FREQ);
4830 		reg_rule_ptr[count].end_freq =
4831 			le32_get_bits(wmi_reg_rule[count].freq_info,
4832 				      REG_RULE_END_FREQ);
4833 		reg_rule_ptr[count].max_bw =
4834 			le32_get_bits(wmi_reg_rule[count].bw_pwr_info,
4835 				      REG_RULE_MAX_BW);
4836 		reg_rule_ptr[count].reg_power =
4837 			le32_get_bits(wmi_reg_rule[count].bw_pwr_info,
4838 				      REG_RULE_REG_PWR);
4839 		reg_rule_ptr[count].ant_gain =
4840 			le32_get_bits(wmi_reg_rule[count].bw_pwr_info,
4841 				      REG_RULE_ANT_GAIN);
4842 		reg_rule_ptr[count].flags =
4843 			le32_get_bits(wmi_reg_rule[count].flag_info,
4844 				      REG_RULE_FLAGS);
4845 		reg_rule_ptr[count].psd_flag =
4846 			le32_get_bits(wmi_reg_rule[count].psd_power_info,
4847 				      REG_RULE_PSD_INFO);
4848 		reg_rule_ptr[count].psd_eirp =
4849 			le32_get_bits(wmi_reg_rule[count].psd_power_info,
4850 				      REG_RULE_PSD_EIRP);
4851 	}
4852 
4853 	return reg_rule_ptr;
4854 }
4855 
ath12k_wmi_ignore_num_extra_rules(struct ath12k_wmi_reg_rule_ext_params * rule,u32 num_reg_rules)4856 static u8 ath12k_wmi_ignore_num_extra_rules(struct ath12k_wmi_reg_rule_ext_params *rule,
4857 					    u32 num_reg_rules)
4858 {
4859 	u8 num_invalid_5ghz_rules = 0;
4860 	u32 count, start_freq;
4861 
4862 	for (count = 0; count < num_reg_rules; count++) {
4863 		start_freq = le32_get_bits(rule[count].freq_info, REG_RULE_START_FREQ);
4864 
4865 		if (start_freq >= ATH12K_MIN_6G_FREQ)
4866 			num_invalid_5ghz_rules++;
4867 	}
4868 
4869 	return num_invalid_5ghz_rules;
4870 }
4871 
ath12k_pull_reg_chan_list_ext_update_ev(struct ath12k_base * ab,struct sk_buff * skb,struct ath12k_reg_info * reg_info)4872 static int ath12k_pull_reg_chan_list_ext_update_ev(struct ath12k_base *ab,
4873 						   struct sk_buff *skb,
4874 						   struct ath12k_reg_info *reg_info)
4875 {
4876 	const void **tb;
4877 	const struct wmi_reg_chan_list_cc_ext_event *ev;
4878 	struct ath12k_wmi_reg_rule_ext_params *ext_wmi_reg_rule;
4879 	u32 num_2g_reg_rules, num_5g_reg_rules;
4880 	u32 num_6g_reg_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
4881 	u32 num_6g_reg_rules_cl[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
4882 	u8 num_invalid_5ghz_ext_rules;
4883 	u32 total_reg_rules = 0;
4884 	int ret, i, j;
4885 
4886 	ath12k_dbg(ab, ATH12K_DBG_WMI, "processing regulatory ext channel list\n");
4887 
4888 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
4889 	if (IS_ERR(tb)) {
4890 		ret = PTR_ERR(tb);
4891 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
4892 		return ret;
4893 	}
4894 
4895 	ev = tb[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT];
4896 	if (!ev) {
4897 		ath12k_warn(ab, "failed to fetch reg chan list ext update ev\n");
4898 		kfree(tb);
4899 		return -EPROTO;
4900 	}
4901 
4902 	reg_info->num_2g_reg_rules = le32_to_cpu(ev->num_2g_reg_rules);
4903 	reg_info->num_5g_reg_rules = le32_to_cpu(ev->num_5g_reg_rules);
4904 	reg_info->num_6g_reg_rules_ap[WMI_REG_INDOOR_AP] =
4905 		le32_to_cpu(ev->num_6g_reg_rules_ap_lpi);
4906 	reg_info->num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP] =
4907 		le32_to_cpu(ev->num_6g_reg_rules_ap_sp);
4908 	reg_info->num_6g_reg_rules_ap[WMI_REG_VLP_AP] =
4909 		le32_to_cpu(ev->num_6g_reg_rules_ap_vlp);
4910 
4911 	for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
4912 		reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] =
4913 			le32_to_cpu(ev->num_6g_reg_rules_cl_lpi[i]);
4914 		reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] =
4915 			le32_to_cpu(ev->num_6g_reg_rules_cl_sp[i]);
4916 		reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] =
4917 			le32_to_cpu(ev->num_6g_reg_rules_cl_vlp[i]);
4918 	}
4919 
4920 	num_2g_reg_rules = reg_info->num_2g_reg_rules;
4921 	total_reg_rules += num_2g_reg_rules;
4922 	num_5g_reg_rules = reg_info->num_5g_reg_rules;
4923 	total_reg_rules += num_5g_reg_rules;
4924 
4925 	if (num_2g_reg_rules > MAX_REG_RULES || num_5g_reg_rules > MAX_REG_RULES) {
4926 		ath12k_warn(ab, "Num reg rules for 2G/5G exceeds max limit (num_2g_reg_rules: %d num_5g_reg_rules: %d max_rules: %d)\n",
4927 			    num_2g_reg_rules, num_5g_reg_rules, MAX_REG_RULES);
4928 		kfree(tb);
4929 		return -EINVAL;
4930 	}
4931 
4932 	for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) {
4933 		num_6g_reg_rules_ap[i] = reg_info->num_6g_reg_rules_ap[i];
4934 
4935 		if (num_6g_reg_rules_ap[i] > MAX_6G_REG_RULES) {
4936 			ath12k_warn(ab, "Num 6G reg rules for AP mode(%d) exceeds max limit (num_6g_reg_rules_ap: %d, max_rules: %d)\n",
4937 				    i, num_6g_reg_rules_ap[i], MAX_6G_REG_RULES);
4938 			kfree(tb);
4939 			return -EINVAL;
4940 		}
4941 
4942 		total_reg_rules += num_6g_reg_rules_ap[i];
4943 	}
4944 
4945 	for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
4946 		num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] =
4947 				reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i];
4948 		total_reg_rules += num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i];
4949 
4950 		num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] =
4951 				reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i];
4952 		total_reg_rules += num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i];
4953 
4954 		num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] =
4955 				reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i];
4956 		total_reg_rules += num_6g_reg_rules_cl[WMI_REG_VLP_AP][i];
4957 
4958 		if (num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] > MAX_6G_REG_RULES ||
4959 		    num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] > MAX_6G_REG_RULES ||
4960 		    num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] >  MAX_6G_REG_RULES) {
4961 			ath12k_warn(ab, "Num 6g client reg rules exceeds max limit, for client(type: %d)\n",
4962 				    i);
4963 			kfree(tb);
4964 			return -EINVAL;
4965 		}
4966 	}
4967 
4968 	if (!total_reg_rules) {
4969 		ath12k_warn(ab, "No reg rules available\n");
4970 		kfree(tb);
4971 		return -EINVAL;
4972 	}
4973 
4974 	memcpy(reg_info->alpha2, &ev->alpha2, REG_ALPHA2_LEN);
4975 
4976 	reg_info->dfs_region = le32_to_cpu(ev->dfs_region);
4977 	reg_info->phybitmap = le32_to_cpu(ev->phybitmap);
4978 	reg_info->num_phy = le32_to_cpu(ev->num_phy);
4979 	reg_info->phy_id = le32_to_cpu(ev->phy_id);
4980 	reg_info->ctry_code = le32_to_cpu(ev->country_id);
4981 	reg_info->reg_dmn_pair = le32_to_cpu(ev->domain_code);
4982 
4983 	switch (le32_to_cpu(ev->status_code)) {
4984 	case WMI_REG_SET_CC_STATUS_PASS:
4985 		reg_info->status_code = REG_SET_CC_STATUS_PASS;
4986 		break;
4987 	case WMI_REG_CURRENT_ALPHA2_NOT_FOUND:
4988 		reg_info->status_code = REG_CURRENT_ALPHA2_NOT_FOUND;
4989 		break;
4990 	case WMI_REG_INIT_ALPHA2_NOT_FOUND:
4991 		reg_info->status_code = REG_INIT_ALPHA2_NOT_FOUND;
4992 		break;
4993 	case WMI_REG_SET_CC_CHANGE_NOT_ALLOWED:
4994 		reg_info->status_code = REG_SET_CC_CHANGE_NOT_ALLOWED;
4995 		break;
4996 	case WMI_REG_SET_CC_STATUS_NO_MEMORY:
4997 		reg_info->status_code = REG_SET_CC_STATUS_NO_MEMORY;
4998 		break;
4999 	case WMI_REG_SET_CC_STATUS_FAIL:
5000 		reg_info->status_code = REG_SET_CC_STATUS_FAIL;
5001 		break;
5002 	}
5003 
5004 	reg_info->is_ext_reg_event = true;
5005 
5006 	reg_info->min_bw_2g = le32_to_cpu(ev->min_bw_2g);
5007 	reg_info->max_bw_2g = le32_to_cpu(ev->max_bw_2g);
5008 	reg_info->min_bw_5g = le32_to_cpu(ev->min_bw_5g);
5009 	reg_info->max_bw_5g = le32_to_cpu(ev->max_bw_5g);
5010 	reg_info->min_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->min_bw_6g_ap_lpi);
5011 	reg_info->max_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->max_bw_6g_ap_lpi);
5012 	reg_info->min_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->min_bw_6g_ap_sp);
5013 	reg_info->max_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->max_bw_6g_ap_sp);
5014 	reg_info->min_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->min_bw_6g_ap_vlp);
5015 	reg_info->max_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->max_bw_6g_ap_vlp);
5016 
5017 	for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
5018 		reg_info->min_bw_6g_client[WMI_REG_INDOOR_AP][i] =
5019 			le32_to_cpu(ev->min_bw_6g_client_lpi[i]);
5020 		reg_info->max_bw_6g_client[WMI_REG_INDOOR_AP][i] =
5021 			le32_to_cpu(ev->max_bw_6g_client_lpi[i]);
5022 		reg_info->min_bw_6g_client[WMI_REG_STD_POWER_AP][i] =
5023 			le32_to_cpu(ev->min_bw_6g_client_sp[i]);
5024 		reg_info->max_bw_6g_client[WMI_REG_STD_POWER_AP][i] =
5025 			le32_to_cpu(ev->max_bw_6g_client_sp[i]);
5026 		reg_info->min_bw_6g_client[WMI_REG_VLP_AP][i] =
5027 			le32_to_cpu(ev->min_bw_6g_client_vlp[i]);
5028 		reg_info->max_bw_6g_client[WMI_REG_VLP_AP][i] =
5029 			le32_to_cpu(ev->max_bw_6g_client_vlp[i]);
5030 	}
5031 
5032 	ath12k_dbg(ab, ATH12K_DBG_WMI,
5033 		   "%s:cc_ext %s dfs %d BW: min_2g %d max_2g %d min_5g %d max_5g %d phy_bitmap 0x%x",
5034 		   __func__, reg_info->alpha2, reg_info->dfs_region,
5035 		   reg_info->min_bw_2g, reg_info->max_bw_2g,
5036 		   reg_info->min_bw_5g, reg_info->max_bw_5g,
5037 		   reg_info->phybitmap);
5038 
5039 	ath12k_dbg(ab, ATH12K_DBG_WMI,
5040 		   "num_2g_reg_rules %d num_5g_reg_rules %d",
5041 		   num_2g_reg_rules, num_5g_reg_rules);
5042 
5043 	ath12k_dbg(ab, ATH12K_DBG_WMI,
5044 		   "num_6g_reg_rules_ap_lpi: %d num_6g_reg_rules_ap_sp: %d num_6g_reg_rules_ap_vlp: %d",
5045 		   num_6g_reg_rules_ap[WMI_REG_INDOOR_AP],
5046 		   num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP],
5047 		   num_6g_reg_rules_ap[WMI_REG_VLP_AP]);
5048 
5049 	ath12k_dbg(ab, ATH12K_DBG_WMI,
5050 		   "6g Regular client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d",
5051 		   num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_DEFAULT_CLIENT],
5052 		   num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_DEFAULT_CLIENT],
5053 		   num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_DEFAULT_CLIENT]);
5054 
5055 	ath12k_dbg(ab, ATH12K_DBG_WMI,
5056 		   "6g Subordinate client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d",
5057 		   num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_SUBORDINATE_CLIENT],
5058 		   num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_SUBORDINATE_CLIENT],
5059 		   num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_SUBORDINATE_CLIENT]);
5060 
5061 	ext_wmi_reg_rule =
5062 		(struct ath12k_wmi_reg_rule_ext_params *)((u8 *)ev
5063 			+ sizeof(*ev)
5064 			+ sizeof(struct wmi_tlv));
5065 
5066 	if (num_2g_reg_rules) {
5067 		reg_info->reg_rules_2g_ptr =
5068 			create_ext_reg_rules_from_wmi(num_2g_reg_rules,
5069 						      ext_wmi_reg_rule);
5070 
5071 		if (!reg_info->reg_rules_2g_ptr) {
5072 			kfree(tb);
5073 			ath12k_warn(ab, "Unable to Allocate memory for 2g rules\n");
5074 			return -ENOMEM;
5075 		}
5076 	}
5077 
5078 	ext_wmi_reg_rule += num_2g_reg_rules;
5079 
5080 	/* Firmware might include 6 GHz reg rule in 5 GHz rule list
5081 	 * for few countries along with separate 6 GHz rule.
5082 	 * Having same 6 GHz reg rule in 5 GHz and 6 GHz rules list
5083 	 * causes intersect check to be true, and same rules will be
5084 	 * shown multiple times in iw cmd.
5085 	 * Hence, avoid parsing 6 GHz rule from 5 GHz reg rule list
5086 	 */
5087 	num_invalid_5ghz_ext_rules = ath12k_wmi_ignore_num_extra_rules(ext_wmi_reg_rule,
5088 								       num_5g_reg_rules);
5089 
5090 	if (num_invalid_5ghz_ext_rules) {
5091 		ath12k_dbg(ab, ATH12K_DBG_WMI,
5092 			   "CC: %s 5 GHz reg rules number %d from fw, %d number of invalid 5 GHz rules",
5093 			   reg_info->alpha2, reg_info->num_5g_reg_rules,
5094 			   num_invalid_5ghz_ext_rules);
5095 
5096 		num_5g_reg_rules = num_5g_reg_rules - num_invalid_5ghz_ext_rules;
5097 		reg_info->num_5g_reg_rules = num_5g_reg_rules;
5098 	}
5099 
5100 	if (num_5g_reg_rules) {
5101 		reg_info->reg_rules_5g_ptr =
5102 			create_ext_reg_rules_from_wmi(num_5g_reg_rules,
5103 						      ext_wmi_reg_rule);
5104 
5105 		if (!reg_info->reg_rules_5g_ptr) {
5106 			kfree(tb);
5107 			ath12k_warn(ab, "Unable to Allocate memory for 5g rules\n");
5108 			return -ENOMEM;
5109 		}
5110 	}
5111 
5112 	/* We have adjusted the number of 5 GHz reg rules above. But still those
5113 	 * many rules needs to be adjusted in ext_wmi_reg_rule.
5114 	 *
5115 	 * NOTE: num_invalid_5ghz_ext_rules will be 0 for rest other cases.
5116 	 */
5117 	ext_wmi_reg_rule += (num_5g_reg_rules + num_invalid_5ghz_ext_rules);
5118 
5119 	for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) {
5120 		reg_info->reg_rules_6g_ap_ptr[i] =
5121 			create_ext_reg_rules_from_wmi(num_6g_reg_rules_ap[i],
5122 						      ext_wmi_reg_rule);
5123 
5124 		if (!reg_info->reg_rules_6g_ap_ptr[i]) {
5125 			kfree(tb);
5126 			ath12k_warn(ab, "Unable to Allocate memory for 6g ap rules\n");
5127 			return -ENOMEM;
5128 		}
5129 
5130 		ext_wmi_reg_rule += num_6g_reg_rules_ap[i];
5131 	}
5132 
5133 	for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++) {
5134 		for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
5135 			reg_info->reg_rules_6g_client_ptr[j][i] =
5136 				create_ext_reg_rules_from_wmi(num_6g_reg_rules_cl[j][i],
5137 							      ext_wmi_reg_rule);
5138 
5139 			if (!reg_info->reg_rules_6g_client_ptr[j][i]) {
5140 				kfree(tb);
5141 				ath12k_warn(ab, "Unable to Allocate memory for 6g client rules\n");
5142 				return -ENOMEM;
5143 			}
5144 
5145 			ext_wmi_reg_rule += num_6g_reg_rules_cl[j][i];
5146 		}
5147 	}
5148 
5149 	reg_info->client_type = le32_to_cpu(ev->client_type);
5150 	reg_info->rnr_tpe_usable = ev->rnr_tpe_usable;
5151 	reg_info->unspecified_ap_usable = ev->unspecified_ap_usable;
5152 	reg_info->domain_code_6g_ap[WMI_REG_INDOOR_AP] =
5153 		le32_to_cpu(ev->domain_code_6g_ap_lpi);
5154 	reg_info->domain_code_6g_ap[WMI_REG_STD_POWER_AP] =
5155 		le32_to_cpu(ev->domain_code_6g_ap_sp);
5156 	reg_info->domain_code_6g_ap[WMI_REG_VLP_AP] =
5157 		le32_to_cpu(ev->domain_code_6g_ap_vlp);
5158 
5159 	for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
5160 		reg_info->domain_code_6g_client[WMI_REG_INDOOR_AP][i] =
5161 			le32_to_cpu(ev->domain_code_6g_client_lpi[i]);
5162 		reg_info->domain_code_6g_client[WMI_REG_STD_POWER_AP][i] =
5163 			le32_to_cpu(ev->domain_code_6g_client_sp[i]);
5164 		reg_info->domain_code_6g_client[WMI_REG_VLP_AP][i] =
5165 			le32_to_cpu(ev->domain_code_6g_client_vlp[i]);
5166 	}
5167 
5168 	reg_info->domain_code_6g_super_id = le32_to_cpu(ev->domain_code_6g_super_id);
5169 
5170 	ath12k_dbg(ab, ATH12K_DBG_WMI, "6g client_type: %d domain_code_6g_super_id: %d",
5171 		   reg_info->client_type, reg_info->domain_code_6g_super_id);
5172 
5173 	ath12k_dbg(ab, ATH12K_DBG_WMI, "processed regulatory ext channel list\n");
5174 
5175 	kfree(tb);
5176 	return 0;
5177 }
5178 
ath12k_pull_peer_del_resp_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_peer_delete_resp_event * peer_del_resp)5179 static int ath12k_pull_peer_del_resp_ev(struct ath12k_base *ab, struct sk_buff *skb,
5180 					struct wmi_peer_delete_resp_event *peer_del_resp)
5181 {
5182 	const void **tb;
5183 	const struct wmi_peer_delete_resp_event *ev;
5184 	int ret;
5185 
5186 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5187 	if (IS_ERR(tb)) {
5188 		ret = PTR_ERR(tb);
5189 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5190 		return ret;
5191 	}
5192 
5193 	ev = tb[WMI_TAG_PEER_DELETE_RESP_EVENT];
5194 	if (!ev) {
5195 		ath12k_warn(ab, "failed to fetch peer delete resp ev");
5196 		kfree(tb);
5197 		return -EPROTO;
5198 	}
5199 
5200 	memset(peer_del_resp, 0, sizeof(*peer_del_resp));
5201 
5202 	peer_del_resp->vdev_id = ev->vdev_id;
5203 	ether_addr_copy(peer_del_resp->peer_macaddr.addr,
5204 			ev->peer_macaddr.addr);
5205 
5206 	kfree(tb);
5207 	return 0;
5208 }
5209 
ath12k_pull_vdev_del_resp_ev(struct ath12k_base * ab,struct sk_buff * skb,u32 * vdev_id)5210 static int ath12k_pull_vdev_del_resp_ev(struct ath12k_base *ab,
5211 					struct sk_buff *skb,
5212 					u32 *vdev_id)
5213 {
5214 	const void **tb;
5215 	const struct wmi_vdev_delete_resp_event *ev;
5216 	int ret;
5217 
5218 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5219 	if (IS_ERR(tb)) {
5220 		ret = PTR_ERR(tb);
5221 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5222 		return ret;
5223 	}
5224 
5225 	ev = tb[WMI_TAG_VDEV_DELETE_RESP_EVENT];
5226 	if (!ev) {
5227 		ath12k_warn(ab, "failed to fetch vdev delete resp ev");
5228 		kfree(tb);
5229 		return -EPROTO;
5230 	}
5231 
5232 	*vdev_id = le32_to_cpu(ev->vdev_id);
5233 
5234 	kfree(tb);
5235 	return 0;
5236 }
5237 
ath12k_pull_bcn_tx_status_ev(struct ath12k_base * ab,struct sk_buff * skb,u32 * vdev_id,u32 * tx_status)5238 static int ath12k_pull_bcn_tx_status_ev(struct ath12k_base *ab,
5239 					struct sk_buff *skb,
5240 					u32 *vdev_id, u32 *tx_status)
5241 {
5242 	const void **tb;
5243 	const struct wmi_bcn_tx_status_event *ev;
5244 	int ret;
5245 
5246 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5247 	if (IS_ERR(tb)) {
5248 		ret = PTR_ERR(tb);
5249 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5250 		return ret;
5251 	}
5252 
5253 	ev = tb[WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT];
5254 	if (!ev) {
5255 		ath12k_warn(ab, "failed to fetch bcn tx status ev");
5256 		kfree(tb);
5257 		return -EPROTO;
5258 	}
5259 
5260 	*vdev_id = le32_to_cpu(ev->vdev_id);
5261 	*tx_status = le32_to_cpu(ev->tx_status);
5262 
5263 	kfree(tb);
5264 	return 0;
5265 }
5266 
ath12k_pull_vdev_stopped_param_tlv(struct ath12k_base * ab,struct sk_buff * skb,u32 * vdev_id)5267 static int ath12k_pull_vdev_stopped_param_tlv(struct ath12k_base *ab, struct sk_buff *skb,
5268 					      u32 *vdev_id)
5269 {
5270 	const void **tb;
5271 	const struct wmi_vdev_stopped_event *ev;
5272 	int ret;
5273 
5274 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5275 	if (IS_ERR(tb)) {
5276 		ret = PTR_ERR(tb);
5277 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5278 		return ret;
5279 	}
5280 
5281 	ev = tb[WMI_TAG_VDEV_STOPPED_EVENT];
5282 	if (!ev) {
5283 		ath12k_warn(ab, "failed to fetch vdev stop ev");
5284 		kfree(tb);
5285 		return -EPROTO;
5286 	}
5287 
5288 	*vdev_id = le32_to_cpu(ev->vdev_id);
5289 
5290 	kfree(tb);
5291 	return 0;
5292 }
5293 
ath12k_wmi_tlv_mgmt_rx_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)5294 static int ath12k_wmi_tlv_mgmt_rx_parse(struct ath12k_base *ab,
5295 					u16 tag, u16 len,
5296 					const void *ptr, void *data)
5297 {
5298 	struct wmi_tlv_mgmt_rx_parse *parse = data;
5299 
5300 	switch (tag) {
5301 	case WMI_TAG_MGMT_RX_HDR:
5302 		parse->fixed = ptr;
5303 		break;
5304 	case WMI_TAG_ARRAY_BYTE:
5305 		if (!parse->frame_buf_done) {
5306 			parse->frame_buf = ptr;
5307 			parse->frame_buf_done = true;
5308 		}
5309 		break;
5310 	}
5311 	return 0;
5312 }
5313 
ath12k_pull_mgmt_rx_params_tlv(struct ath12k_base * ab,struct sk_buff * skb,struct ath12k_wmi_mgmt_rx_arg * hdr)5314 static int ath12k_pull_mgmt_rx_params_tlv(struct ath12k_base *ab,
5315 					  struct sk_buff *skb,
5316 					  struct ath12k_wmi_mgmt_rx_arg *hdr)
5317 {
5318 	struct wmi_tlv_mgmt_rx_parse parse = { };
5319 	const struct ath12k_wmi_mgmt_rx_params *ev;
5320 	const u8 *frame;
5321 	int i, ret;
5322 
5323 	ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
5324 				  ath12k_wmi_tlv_mgmt_rx_parse,
5325 				  &parse);
5326 	if (ret) {
5327 		ath12k_warn(ab, "failed to parse mgmt rx tlv %d\n", ret);
5328 		return ret;
5329 	}
5330 
5331 	ev = parse.fixed;
5332 	frame = parse.frame_buf;
5333 
5334 	if (!ev || !frame) {
5335 		ath12k_warn(ab, "failed to fetch mgmt rx hdr");
5336 		return -EPROTO;
5337 	}
5338 
5339 	hdr->pdev_id = le32_to_cpu(ev->pdev_id);
5340 	hdr->chan_freq = le32_to_cpu(ev->chan_freq);
5341 	hdr->channel = le32_to_cpu(ev->channel);
5342 	hdr->snr = le32_to_cpu(ev->snr);
5343 	hdr->rate = le32_to_cpu(ev->rate);
5344 	hdr->phy_mode = le32_to_cpu(ev->phy_mode);
5345 	hdr->buf_len = le32_to_cpu(ev->buf_len);
5346 	hdr->status = le32_to_cpu(ev->status);
5347 	hdr->flags = le32_to_cpu(ev->flags);
5348 	hdr->rssi = a_sle32_to_cpu(ev->rssi);
5349 	hdr->tsf_delta = le32_to_cpu(ev->tsf_delta);
5350 
5351 	for (i = 0; i < ATH_MAX_ANTENNA; i++)
5352 		hdr->rssi_ctl[i] = le32_to_cpu(ev->rssi_ctl[i]);
5353 
5354 	if (skb->len < (frame - skb->data) + hdr->buf_len) {
5355 		ath12k_warn(ab, "invalid length in mgmt rx hdr ev");
5356 		return -EPROTO;
5357 	}
5358 
5359 	/* shift the sk_buff to point to `frame` */
5360 	skb_trim(skb, 0);
5361 	skb_put(skb, frame - skb->data);
5362 	skb_pull(skb, frame - skb->data);
5363 	skb_put(skb, hdr->buf_len);
5364 
5365 	return 0;
5366 }
5367 
wmi_process_mgmt_tx_comp(struct ath12k * ar,u32 desc_id,u32 status)5368 static int wmi_process_mgmt_tx_comp(struct ath12k *ar, u32 desc_id,
5369 				    u32 status)
5370 {
5371 	struct sk_buff *msdu;
5372 	struct ieee80211_tx_info *info;
5373 	struct ath12k_skb_cb *skb_cb;
5374 	int num_mgmt;
5375 
5376 	spin_lock_bh(&ar->txmgmt_idr_lock);
5377 	msdu = idr_find(&ar->txmgmt_idr, desc_id);
5378 
5379 	if (!msdu) {
5380 		ath12k_warn(ar->ab, "received mgmt tx compl for invalid msdu_id: %d\n",
5381 			    desc_id);
5382 		spin_unlock_bh(&ar->txmgmt_idr_lock);
5383 		return -ENOENT;
5384 	}
5385 
5386 	idr_remove(&ar->txmgmt_idr, desc_id);
5387 	spin_unlock_bh(&ar->txmgmt_idr_lock);
5388 
5389 	skb_cb = ATH12K_SKB_CB(msdu);
5390 	dma_unmap_single(ar->ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
5391 
5392 	info = IEEE80211_SKB_CB(msdu);
5393 	if ((!(info->flags & IEEE80211_TX_CTL_NO_ACK)) && !status)
5394 		info->flags |= IEEE80211_TX_STAT_ACK;
5395 
5396 	if ((info->flags & IEEE80211_TX_CTL_NO_ACK) && !status)
5397 		info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
5398 
5399 	ieee80211_tx_status_irqsafe(ath12k_ar_to_hw(ar), msdu);
5400 
5401 	num_mgmt = atomic_dec_if_positive(&ar->num_pending_mgmt_tx);
5402 
5403 	/* WARN when we received this event without doing any mgmt tx */
5404 	if (num_mgmt < 0)
5405 		WARN_ON_ONCE(1);
5406 
5407 	if (!num_mgmt)
5408 		wake_up(&ar->txmgmt_empty_waitq);
5409 
5410 	return 0;
5411 }
5412 
ath12k_pull_mgmt_tx_compl_param_tlv(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_mgmt_tx_compl_event * param)5413 static int ath12k_pull_mgmt_tx_compl_param_tlv(struct ath12k_base *ab,
5414 					       struct sk_buff *skb,
5415 					       struct wmi_mgmt_tx_compl_event *param)
5416 {
5417 	const void **tb;
5418 	const struct wmi_mgmt_tx_compl_event *ev;
5419 	int ret;
5420 
5421 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5422 	if (IS_ERR(tb)) {
5423 		ret = PTR_ERR(tb);
5424 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5425 		return ret;
5426 	}
5427 
5428 	ev = tb[WMI_TAG_MGMT_TX_COMPL_EVENT];
5429 	if (!ev) {
5430 		ath12k_warn(ab, "failed to fetch mgmt tx compl ev");
5431 		kfree(tb);
5432 		return -EPROTO;
5433 	}
5434 
5435 	param->pdev_id = ev->pdev_id;
5436 	param->desc_id = ev->desc_id;
5437 	param->status = ev->status;
5438 
5439 	kfree(tb);
5440 	return 0;
5441 }
5442 
ath12k_wmi_event_scan_started(struct ath12k * ar)5443 static void ath12k_wmi_event_scan_started(struct ath12k *ar)
5444 {
5445 	lockdep_assert_held(&ar->data_lock);
5446 
5447 	switch (ar->scan.state) {
5448 	case ATH12K_SCAN_IDLE:
5449 	case ATH12K_SCAN_RUNNING:
5450 	case ATH12K_SCAN_ABORTING:
5451 		ath12k_warn(ar->ab, "received scan started event in an invalid scan state: %s (%d)\n",
5452 			    ath12k_scan_state_str(ar->scan.state),
5453 			    ar->scan.state);
5454 		break;
5455 	case ATH12K_SCAN_STARTING:
5456 		ar->scan.state = ATH12K_SCAN_RUNNING;
5457 
5458 		if (ar->scan.is_roc)
5459 			ieee80211_ready_on_channel(ath12k_ar_to_hw(ar));
5460 
5461 		complete(&ar->scan.started);
5462 		break;
5463 	}
5464 }
5465 
ath12k_wmi_event_scan_start_failed(struct ath12k * ar)5466 static void ath12k_wmi_event_scan_start_failed(struct ath12k *ar)
5467 {
5468 	lockdep_assert_held(&ar->data_lock);
5469 
5470 	switch (ar->scan.state) {
5471 	case ATH12K_SCAN_IDLE:
5472 	case ATH12K_SCAN_RUNNING:
5473 	case ATH12K_SCAN_ABORTING:
5474 		ath12k_warn(ar->ab, "received scan start failed event in an invalid scan state: %s (%d)\n",
5475 			    ath12k_scan_state_str(ar->scan.state),
5476 			    ar->scan.state);
5477 		break;
5478 	case ATH12K_SCAN_STARTING:
5479 		complete(&ar->scan.started);
5480 		__ath12k_mac_scan_finish(ar);
5481 		break;
5482 	}
5483 }
5484 
ath12k_wmi_event_scan_completed(struct ath12k * ar)5485 static void ath12k_wmi_event_scan_completed(struct ath12k *ar)
5486 {
5487 	lockdep_assert_held(&ar->data_lock);
5488 
5489 	switch (ar->scan.state) {
5490 	case ATH12K_SCAN_IDLE:
5491 	case ATH12K_SCAN_STARTING:
5492 		/* One suspected reason scan can be completed while starting is
5493 		 * if firmware fails to deliver all scan events to the host,
5494 		 * e.g. when transport pipe is full. This has been observed
5495 		 * with spectral scan phyerr events starving wmi transport
5496 		 * pipe. In such case the "scan completed" event should be (and
5497 		 * is) ignored by the host as it may be just firmware's scan
5498 		 * state machine recovering.
5499 		 */
5500 		ath12k_warn(ar->ab, "received scan completed event in an invalid scan state: %s (%d)\n",
5501 			    ath12k_scan_state_str(ar->scan.state),
5502 			    ar->scan.state);
5503 		break;
5504 	case ATH12K_SCAN_RUNNING:
5505 	case ATH12K_SCAN_ABORTING:
5506 		__ath12k_mac_scan_finish(ar);
5507 		break;
5508 	}
5509 }
5510 
ath12k_wmi_event_scan_bss_chan(struct ath12k * ar)5511 static void ath12k_wmi_event_scan_bss_chan(struct ath12k *ar)
5512 {
5513 	lockdep_assert_held(&ar->data_lock);
5514 
5515 	switch (ar->scan.state) {
5516 	case ATH12K_SCAN_IDLE:
5517 	case ATH12K_SCAN_STARTING:
5518 		ath12k_warn(ar->ab, "received scan bss chan event in an invalid scan state: %s (%d)\n",
5519 			    ath12k_scan_state_str(ar->scan.state),
5520 			    ar->scan.state);
5521 		break;
5522 	case ATH12K_SCAN_RUNNING:
5523 	case ATH12K_SCAN_ABORTING:
5524 		ar->scan_channel = NULL;
5525 		break;
5526 	}
5527 }
5528 
ath12k_wmi_event_scan_foreign_chan(struct ath12k * ar,u32 freq)5529 static void ath12k_wmi_event_scan_foreign_chan(struct ath12k *ar, u32 freq)
5530 {
5531 	struct ieee80211_hw *hw = ath12k_ar_to_hw(ar);
5532 
5533 	lockdep_assert_held(&ar->data_lock);
5534 
5535 	switch (ar->scan.state) {
5536 	case ATH12K_SCAN_IDLE:
5537 	case ATH12K_SCAN_STARTING:
5538 		ath12k_warn(ar->ab, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
5539 			    ath12k_scan_state_str(ar->scan.state),
5540 			    ar->scan.state);
5541 		break;
5542 	case ATH12K_SCAN_RUNNING:
5543 	case ATH12K_SCAN_ABORTING:
5544 		ar->scan_channel = ieee80211_get_channel(hw->wiphy, freq);
5545 
5546 		if (ar->scan.is_roc && ar->scan.roc_freq == freq)
5547 			complete(&ar->scan.on_channel);
5548 
5549 		break;
5550 	}
5551 }
5552 
5553 static const char *
ath12k_wmi_event_scan_type_str(enum wmi_scan_event_type type,enum wmi_scan_completion_reason reason)5554 ath12k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
5555 			       enum wmi_scan_completion_reason reason)
5556 {
5557 	switch (type) {
5558 	case WMI_SCAN_EVENT_STARTED:
5559 		return "started";
5560 	case WMI_SCAN_EVENT_COMPLETED:
5561 		switch (reason) {
5562 		case WMI_SCAN_REASON_COMPLETED:
5563 			return "completed";
5564 		case WMI_SCAN_REASON_CANCELLED:
5565 			return "completed [cancelled]";
5566 		case WMI_SCAN_REASON_PREEMPTED:
5567 			return "completed [preempted]";
5568 		case WMI_SCAN_REASON_TIMEDOUT:
5569 			return "completed [timedout]";
5570 		case WMI_SCAN_REASON_INTERNAL_FAILURE:
5571 			return "completed [internal err]";
5572 		case WMI_SCAN_REASON_MAX:
5573 			break;
5574 		}
5575 		return "completed [unknown]";
5576 	case WMI_SCAN_EVENT_BSS_CHANNEL:
5577 		return "bss channel";
5578 	case WMI_SCAN_EVENT_FOREIGN_CHAN:
5579 		return "foreign channel";
5580 	case WMI_SCAN_EVENT_DEQUEUED:
5581 		return "dequeued";
5582 	case WMI_SCAN_EVENT_PREEMPTED:
5583 		return "preempted";
5584 	case WMI_SCAN_EVENT_START_FAILED:
5585 		return "start failed";
5586 	case WMI_SCAN_EVENT_RESTARTED:
5587 		return "restarted";
5588 	case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT:
5589 		return "foreign channel exit";
5590 	default:
5591 		return "unknown";
5592 	}
5593 }
5594 
ath12k_pull_scan_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_scan_event * scan_evt_param)5595 static int ath12k_pull_scan_ev(struct ath12k_base *ab, struct sk_buff *skb,
5596 			       struct wmi_scan_event *scan_evt_param)
5597 {
5598 	const void **tb;
5599 	const struct wmi_scan_event *ev;
5600 	int ret;
5601 
5602 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5603 	if (IS_ERR(tb)) {
5604 		ret = PTR_ERR(tb);
5605 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5606 		return ret;
5607 	}
5608 
5609 	ev = tb[WMI_TAG_SCAN_EVENT];
5610 	if (!ev) {
5611 		ath12k_warn(ab, "failed to fetch scan ev");
5612 		kfree(tb);
5613 		return -EPROTO;
5614 	}
5615 
5616 	scan_evt_param->event_type = ev->event_type;
5617 	scan_evt_param->reason = ev->reason;
5618 	scan_evt_param->channel_freq = ev->channel_freq;
5619 	scan_evt_param->scan_req_id = ev->scan_req_id;
5620 	scan_evt_param->scan_id = ev->scan_id;
5621 	scan_evt_param->vdev_id = ev->vdev_id;
5622 	scan_evt_param->tsf_timestamp = ev->tsf_timestamp;
5623 
5624 	kfree(tb);
5625 	return 0;
5626 }
5627 
ath12k_pull_peer_sta_kickout_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_peer_sta_kickout_arg * arg)5628 static int ath12k_pull_peer_sta_kickout_ev(struct ath12k_base *ab, struct sk_buff *skb,
5629 					   struct wmi_peer_sta_kickout_arg *arg)
5630 {
5631 	const void **tb;
5632 	const struct wmi_peer_sta_kickout_event *ev;
5633 	int ret;
5634 
5635 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5636 	if (IS_ERR(tb)) {
5637 		ret = PTR_ERR(tb);
5638 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5639 		return ret;
5640 	}
5641 
5642 	ev = tb[WMI_TAG_PEER_STA_KICKOUT_EVENT];
5643 	if (!ev) {
5644 		ath12k_warn(ab, "failed to fetch peer sta kickout ev");
5645 		kfree(tb);
5646 		return -EPROTO;
5647 	}
5648 
5649 	arg->mac_addr = ev->peer_macaddr.addr;
5650 
5651 	kfree(tb);
5652 	return 0;
5653 }
5654 
ath12k_pull_roam_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_roam_event * roam_ev)5655 static int ath12k_pull_roam_ev(struct ath12k_base *ab, struct sk_buff *skb,
5656 			       struct wmi_roam_event *roam_ev)
5657 {
5658 	const void **tb;
5659 	const struct wmi_roam_event *ev;
5660 	int ret;
5661 
5662 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5663 	if (IS_ERR(tb)) {
5664 		ret = PTR_ERR(tb);
5665 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5666 		return ret;
5667 	}
5668 
5669 	ev = tb[WMI_TAG_ROAM_EVENT];
5670 	if (!ev) {
5671 		ath12k_warn(ab, "failed to fetch roam ev");
5672 		kfree(tb);
5673 		return -EPROTO;
5674 	}
5675 
5676 	roam_ev->vdev_id = ev->vdev_id;
5677 	roam_ev->reason = ev->reason;
5678 	roam_ev->rssi = ev->rssi;
5679 
5680 	kfree(tb);
5681 	return 0;
5682 }
5683 
freq_to_idx(struct ath12k * ar,int freq)5684 static int freq_to_idx(struct ath12k *ar, int freq)
5685 {
5686 	struct ieee80211_supported_band *sband;
5687 	struct ieee80211_hw *hw = ath12k_ar_to_hw(ar);
5688 	int band, ch, idx = 0;
5689 
5690 	for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
5691 		if (!ar->mac.sbands[band].channels)
5692 			continue;
5693 
5694 		sband = hw->wiphy->bands[band];
5695 		if (!sband)
5696 			continue;
5697 
5698 		for (ch = 0; ch < sband->n_channels; ch++, idx++)
5699 			if (sband->channels[ch].center_freq == freq)
5700 				goto exit;
5701 	}
5702 
5703 exit:
5704 	return idx;
5705 }
5706 
ath12k_pull_chan_info_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_chan_info_event * ch_info_ev)5707 static int ath12k_pull_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb,
5708 				    struct wmi_chan_info_event *ch_info_ev)
5709 {
5710 	const void **tb;
5711 	const struct wmi_chan_info_event *ev;
5712 	int ret;
5713 
5714 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5715 	if (IS_ERR(tb)) {
5716 		ret = PTR_ERR(tb);
5717 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5718 		return ret;
5719 	}
5720 
5721 	ev = tb[WMI_TAG_CHAN_INFO_EVENT];
5722 	if (!ev) {
5723 		ath12k_warn(ab, "failed to fetch chan info ev");
5724 		kfree(tb);
5725 		return -EPROTO;
5726 	}
5727 
5728 	ch_info_ev->err_code = ev->err_code;
5729 	ch_info_ev->freq = ev->freq;
5730 	ch_info_ev->cmd_flags = ev->cmd_flags;
5731 	ch_info_ev->noise_floor = ev->noise_floor;
5732 	ch_info_ev->rx_clear_count = ev->rx_clear_count;
5733 	ch_info_ev->cycle_count = ev->cycle_count;
5734 	ch_info_ev->chan_tx_pwr_range = ev->chan_tx_pwr_range;
5735 	ch_info_ev->chan_tx_pwr_tp = ev->chan_tx_pwr_tp;
5736 	ch_info_ev->rx_frame_count = ev->rx_frame_count;
5737 	ch_info_ev->tx_frame_cnt = ev->tx_frame_cnt;
5738 	ch_info_ev->mac_clk_mhz = ev->mac_clk_mhz;
5739 	ch_info_ev->vdev_id = ev->vdev_id;
5740 
5741 	kfree(tb);
5742 	return 0;
5743 }
5744 
5745 static int
ath12k_pull_pdev_bss_chan_info_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_pdev_bss_chan_info_event * bss_ch_info_ev)5746 ath12k_pull_pdev_bss_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb,
5747 				  struct wmi_pdev_bss_chan_info_event *bss_ch_info_ev)
5748 {
5749 	const void **tb;
5750 	const struct wmi_pdev_bss_chan_info_event *ev;
5751 	int ret;
5752 
5753 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5754 	if (IS_ERR(tb)) {
5755 		ret = PTR_ERR(tb);
5756 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5757 		return ret;
5758 	}
5759 
5760 	ev = tb[WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT];
5761 	if (!ev) {
5762 		ath12k_warn(ab, "failed to fetch pdev bss chan info ev");
5763 		kfree(tb);
5764 		return -EPROTO;
5765 	}
5766 
5767 	bss_ch_info_ev->pdev_id = ev->pdev_id;
5768 	bss_ch_info_ev->freq = ev->freq;
5769 	bss_ch_info_ev->noise_floor = ev->noise_floor;
5770 	bss_ch_info_ev->rx_clear_count_low = ev->rx_clear_count_low;
5771 	bss_ch_info_ev->rx_clear_count_high = ev->rx_clear_count_high;
5772 	bss_ch_info_ev->cycle_count_low = ev->cycle_count_low;
5773 	bss_ch_info_ev->cycle_count_high = ev->cycle_count_high;
5774 	bss_ch_info_ev->tx_cycle_count_low = ev->tx_cycle_count_low;
5775 	bss_ch_info_ev->tx_cycle_count_high = ev->tx_cycle_count_high;
5776 	bss_ch_info_ev->rx_cycle_count_low = ev->rx_cycle_count_low;
5777 	bss_ch_info_ev->rx_cycle_count_high = ev->rx_cycle_count_high;
5778 	bss_ch_info_ev->rx_bss_cycle_count_low = ev->rx_bss_cycle_count_low;
5779 	bss_ch_info_ev->rx_bss_cycle_count_high = ev->rx_bss_cycle_count_high;
5780 
5781 	kfree(tb);
5782 	return 0;
5783 }
5784 
5785 static int
ath12k_pull_vdev_install_key_compl_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_vdev_install_key_complete_arg * arg)5786 ath12k_pull_vdev_install_key_compl_ev(struct ath12k_base *ab, struct sk_buff *skb,
5787 				      struct wmi_vdev_install_key_complete_arg *arg)
5788 {
5789 	const void **tb;
5790 	const struct wmi_vdev_install_key_compl_event *ev;
5791 	int ret;
5792 
5793 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5794 	if (IS_ERR(tb)) {
5795 		ret = PTR_ERR(tb);
5796 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5797 		return ret;
5798 	}
5799 
5800 	ev = tb[WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT];
5801 	if (!ev) {
5802 		ath12k_warn(ab, "failed to fetch vdev install key compl ev");
5803 		kfree(tb);
5804 		return -EPROTO;
5805 	}
5806 
5807 	arg->vdev_id = le32_to_cpu(ev->vdev_id);
5808 	arg->macaddr = ev->peer_macaddr.addr;
5809 	arg->key_idx = le32_to_cpu(ev->key_idx);
5810 	arg->key_flags = le32_to_cpu(ev->key_flags);
5811 	arg->status = le32_to_cpu(ev->status);
5812 
5813 	kfree(tb);
5814 	return 0;
5815 }
5816 
ath12k_pull_peer_assoc_conf_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_peer_assoc_conf_arg * peer_assoc_conf)5817 static int ath12k_pull_peer_assoc_conf_ev(struct ath12k_base *ab, struct sk_buff *skb,
5818 					  struct wmi_peer_assoc_conf_arg *peer_assoc_conf)
5819 {
5820 	const void **tb;
5821 	const struct wmi_peer_assoc_conf_event *ev;
5822 	int ret;
5823 
5824 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5825 	if (IS_ERR(tb)) {
5826 		ret = PTR_ERR(tb);
5827 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5828 		return ret;
5829 	}
5830 
5831 	ev = tb[WMI_TAG_PEER_ASSOC_CONF_EVENT];
5832 	if (!ev) {
5833 		ath12k_warn(ab, "failed to fetch peer assoc conf ev");
5834 		kfree(tb);
5835 		return -EPROTO;
5836 	}
5837 
5838 	peer_assoc_conf->vdev_id = le32_to_cpu(ev->vdev_id);
5839 	peer_assoc_conf->macaddr = ev->peer_macaddr.addr;
5840 
5841 	kfree(tb);
5842 	return 0;
5843 }
5844 
5845 static int
ath12k_pull_pdev_temp_ev(struct ath12k_base * ab,struct sk_buff * skb,const struct wmi_pdev_temperature_event * ev)5846 ath12k_pull_pdev_temp_ev(struct ath12k_base *ab, struct sk_buff *skb,
5847 			 const struct wmi_pdev_temperature_event *ev)
5848 {
5849 	const void **tb;
5850 	int ret;
5851 
5852 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5853 	if (IS_ERR(tb)) {
5854 		ret = PTR_ERR(tb);
5855 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5856 		return ret;
5857 	}
5858 
5859 	ev = tb[WMI_TAG_PDEV_TEMPERATURE_EVENT];
5860 	if (!ev) {
5861 		ath12k_warn(ab, "failed to fetch pdev temp ev");
5862 		kfree(tb);
5863 		return -EPROTO;
5864 	}
5865 
5866 	kfree(tb);
5867 	return 0;
5868 }
5869 
ath12k_wmi_op_ep_tx_credits(struct ath12k_base * ab)5870 static void ath12k_wmi_op_ep_tx_credits(struct ath12k_base *ab)
5871 {
5872 	/* try to send pending beacons first. they take priority */
5873 	wake_up(&ab->wmi_ab.tx_credits_wq);
5874 }
5875 
ath12k_wmi_htc_tx_complete(struct ath12k_base * ab,struct sk_buff * skb)5876 static void ath12k_wmi_htc_tx_complete(struct ath12k_base *ab,
5877 				       struct sk_buff *skb)
5878 {
5879 	dev_kfree_skb(skb);
5880 }
5881 
ath12k_reg_is_world_alpha(char * alpha)5882 static bool ath12k_reg_is_world_alpha(char *alpha)
5883 {
5884 	if (alpha[0] == '0' && alpha[1] == '0')
5885 		return true;
5886 
5887 	if (alpha[0] == 'n' && alpha[1] == 'a')
5888 		return true;
5889 
5890 	return false;
5891 }
5892 
ath12k_reg_chan_list_event(struct ath12k_base * ab,struct sk_buff * skb)5893 static int ath12k_reg_chan_list_event(struct ath12k_base *ab, struct sk_buff *skb)
5894 {
5895 	struct ath12k_reg_info *reg_info = NULL;
5896 	struct ieee80211_regdomain *regd = NULL;
5897 	bool intersect = false;
5898 	int ret = 0, pdev_idx, i, j;
5899 	struct ath12k *ar;
5900 
5901 	reg_info = kzalloc(sizeof(*reg_info), GFP_ATOMIC);
5902 	if (!reg_info) {
5903 		ret = -ENOMEM;
5904 		goto fallback;
5905 	}
5906 
5907 	ret = ath12k_pull_reg_chan_list_ext_update_ev(ab, skb, reg_info);
5908 
5909 	if (ret) {
5910 		ath12k_warn(ab, "failed to extract regulatory info from received event\n");
5911 		goto fallback;
5912 	}
5913 
5914 	if (reg_info->status_code != REG_SET_CC_STATUS_PASS) {
5915 		/* In case of failure to set the requested ctry,
5916 		 * fw retains the current regd. We print a failure info
5917 		 * and return from here.
5918 		 */
5919 		ath12k_warn(ab, "Failed to set the requested Country regulatory setting\n");
5920 		goto mem_free;
5921 	}
5922 
5923 	pdev_idx = reg_info->phy_id;
5924 
5925 	if (pdev_idx >= ab->num_radios) {
5926 		/* Process the event for phy0 only if single_pdev_only
5927 		 * is true. If pdev_idx is valid but not 0, discard the
5928 		 * event. Otherwise, it goes to fallback.
5929 		 */
5930 		if (ab->hw_params->single_pdev_only &&
5931 		    pdev_idx < ab->hw_params->num_rxdma_per_pdev)
5932 			goto mem_free;
5933 		else
5934 			goto fallback;
5935 	}
5936 
5937 	/* Avoid multiple overwrites to default regd, during core
5938 	 * stop-start after mac registration.
5939 	 */
5940 	if (ab->default_regd[pdev_idx] && !ab->new_regd[pdev_idx] &&
5941 	    !memcmp(ab->default_regd[pdev_idx]->alpha2,
5942 		    reg_info->alpha2, 2))
5943 		goto mem_free;
5944 
5945 	/* Intersect new rules with default regd if a new country setting was
5946 	 * requested, i.e a default regd was already set during initialization
5947 	 * and the regd coming from this event has a valid country info.
5948 	 */
5949 	if (ab->default_regd[pdev_idx] &&
5950 	    !ath12k_reg_is_world_alpha((char *)
5951 		ab->default_regd[pdev_idx]->alpha2) &&
5952 	    !ath12k_reg_is_world_alpha((char *)reg_info->alpha2))
5953 		intersect = true;
5954 
5955 	regd = ath12k_reg_build_regd(ab, reg_info, intersect);
5956 	if (!regd) {
5957 		ath12k_warn(ab, "failed to build regd from reg_info\n");
5958 		goto fallback;
5959 	}
5960 
5961 	spin_lock(&ab->base_lock);
5962 	if (test_bit(ATH12K_FLAG_REGISTERED, &ab->dev_flags)) {
5963 		/* Once mac is registered, ar is valid and all CC events from
5964 		 * fw is considered to be received due to user requests
5965 		 * currently.
5966 		 * Free previously built regd before assigning the newly
5967 		 * generated regd to ar. NULL pointer handling will be
5968 		 * taken care by kfree itself.
5969 		 */
5970 		ar = ab->pdevs[pdev_idx].ar;
5971 		kfree(ab->new_regd[pdev_idx]);
5972 		ab->new_regd[pdev_idx] = regd;
5973 		queue_work(ab->workqueue, &ar->regd_update_work);
5974 	} else {
5975 		/* Multiple events for the same *ar is not expected. But we
5976 		 * can still clear any previously stored default_regd if we
5977 		 * are receiving this event for the same radio by mistake.
5978 		 * NULL pointer handling will be taken care by kfree itself.
5979 		 */
5980 		kfree(ab->default_regd[pdev_idx]);
5981 		/* This regd would be applied during mac registration */
5982 		ab->default_regd[pdev_idx] = regd;
5983 	}
5984 	ab->dfs_region = reg_info->dfs_region;
5985 	spin_unlock(&ab->base_lock);
5986 
5987 	goto mem_free;
5988 
5989 fallback:
5990 	/* Fallback to older reg (by sending previous country setting
5991 	 * again if fw has succeeded and we failed to process here.
5992 	 * The Regdomain should be uniform across driver and fw. Since the
5993 	 * FW has processed the command and sent a success status, we expect
5994 	 * this function to succeed as well. If it doesn't, CTRY needs to be
5995 	 * reverted at the fw and the old SCAN_CHAN_LIST cmd needs to be sent.
5996 	 */
5997 	/* TODO: This is rare, but still should also be handled */
5998 	WARN_ON(1);
5999 mem_free:
6000 	if (reg_info) {
6001 		kfree(reg_info->reg_rules_2g_ptr);
6002 		kfree(reg_info->reg_rules_5g_ptr);
6003 		if (reg_info->is_ext_reg_event) {
6004 			for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++)
6005 				kfree(reg_info->reg_rules_6g_ap_ptr[i]);
6006 
6007 			for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++)
6008 				for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++)
6009 					kfree(reg_info->reg_rules_6g_client_ptr[j][i]);
6010 		}
6011 		kfree(reg_info);
6012 	}
6013 	return ret;
6014 }
6015 
ath12k_wmi_rdy_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)6016 static int ath12k_wmi_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len,
6017 				const void *ptr, void *data)
6018 {
6019 	struct ath12k_wmi_rdy_parse *rdy_parse = data;
6020 	struct wmi_ready_event fixed_param;
6021 	struct ath12k_wmi_mac_addr_params *addr_list;
6022 	struct ath12k_pdev *pdev;
6023 	u32 num_mac_addr;
6024 	int i;
6025 
6026 	switch (tag) {
6027 	case WMI_TAG_READY_EVENT:
6028 		memset(&fixed_param, 0, sizeof(fixed_param));
6029 		memcpy(&fixed_param, (struct wmi_ready_event *)ptr,
6030 		       min_t(u16, sizeof(fixed_param), len));
6031 		ab->wlan_init_status = le32_to_cpu(fixed_param.ready_event_min.status);
6032 		rdy_parse->num_extra_mac_addr =
6033 			le32_to_cpu(fixed_param.ready_event_min.num_extra_mac_addr);
6034 
6035 		ether_addr_copy(ab->mac_addr,
6036 				fixed_param.ready_event_min.mac_addr.addr);
6037 		ab->pktlog_defs_checksum = le32_to_cpu(fixed_param.pktlog_defs_checksum);
6038 		ab->wmi_ready = true;
6039 		break;
6040 	case WMI_TAG_ARRAY_FIXED_STRUCT:
6041 		addr_list = (struct ath12k_wmi_mac_addr_params *)ptr;
6042 		num_mac_addr = rdy_parse->num_extra_mac_addr;
6043 
6044 		if (!(ab->num_radios > 1 && num_mac_addr >= ab->num_radios))
6045 			break;
6046 
6047 		for (i = 0; i < ab->num_radios; i++) {
6048 			pdev = &ab->pdevs[i];
6049 			ether_addr_copy(pdev->mac_addr, addr_list[i].addr);
6050 		}
6051 		ab->pdevs_macaddr_valid = true;
6052 		break;
6053 	default:
6054 		break;
6055 	}
6056 
6057 	return 0;
6058 }
6059 
ath12k_ready_event(struct ath12k_base * ab,struct sk_buff * skb)6060 static int ath12k_ready_event(struct ath12k_base *ab, struct sk_buff *skb)
6061 {
6062 	struct ath12k_wmi_rdy_parse rdy_parse = { };
6063 	int ret;
6064 
6065 	ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
6066 				  ath12k_wmi_rdy_parse, &rdy_parse);
6067 	if (ret) {
6068 		ath12k_warn(ab, "failed to parse tlv %d\n", ret);
6069 		return ret;
6070 	}
6071 
6072 	complete(&ab->wmi_ab.unified_ready);
6073 	return 0;
6074 }
6075 
ath12k_peer_delete_resp_event(struct ath12k_base * ab,struct sk_buff * skb)6076 static void ath12k_peer_delete_resp_event(struct ath12k_base *ab, struct sk_buff *skb)
6077 {
6078 	struct wmi_peer_delete_resp_event peer_del_resp;
6079 	struct ath12k *ar;
6080 
6081 	if (ath12k_pull_peer_del_resp_ev(ab, skb, &peer_del_resp) != 0) {
6082 		ath12k_warn(ab, "failed to extract peer delete resp");
6083 		return;
6084 	}
6085 
6086 	rcu_read_lock();
6087 	ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(peer_del_resp.vdev_id));
6088 	if (!ar) {
6089 		ath12k_warn(ab, "invalid vdev id in peer delete resp ev %d",
6090 			    peer_del_resp.vdev_id);
6091 		rcu_read_unlock();
6092 		return;
6093 	}
6094 
6095 	complete(&ar->peer_delete_done);
6096 	rcu_read_unlock();
6097 	ath12k_dbg(ab, ATH12K_DBG_WMI, "peer delete resp for vdev id %d addr %pM\n",
6098 		   peer_del_resp.vdev_id, peer_del_resp.peer_macaddr.addr);
6099 }
6100 
ath12k_vdev_delete_resp_event(struct ath12k_base * ab,struct sk_buff * skb)6101 static void ath12k_vdev_delete_resp_event(struct ath12k_base *ab,
6102 					  struct sk_buff *skb)
6103 {
6104 	struct ath12k *ar;
6105 	u32 vdev_id = 0;
6106 
6107 	if (ath12k_pull_vdev_del_resp_ev(ab, skb, &vdev_id) != 0) {
6108 		ath12k_warn(ab, "failed to extract vdev delete resp");
6109 		return;
6110 	}
6111 
6112 	rcu_read_lock();
6113 	ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
6114 	if (!ar) {
6115 		ath12k_warn(ab, "invalid vdev id in vdev delete resp ev %d",
6116 			    vdev_id);
6117 		rcu_read_unlock();
6118 		return;
6119 	}
6120 
6121 	complete(&ar->vdev_delete_done);
6122 
6123 	rcu_read_unlock();
6124 
6125 	ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev delete resp for vdev id %d\n",
6126 		   vdev_id);
6127 }
6128 
ath12k_wmi_vdev_resp_print(u32 vdev_resp_status)6129 static const char *ath12k_wmi_vdev_resp_print(u32 vdev_resp_status)
6130 {
6131 	switch (vdev_resp_status) {
6132 	case WMI_VDEV_START_RESPONSE_INVALID_VDEVID:
6133 		return "invalid vdev id";
6134 	case WMI_VDEV_START_RESPONSE_NOT_SUPPORTED:
6135 		return "not supported";
6136 	case WMI_VDEV_START_RESPONSE_DFS_VIOLATION:
6137 		return "dfs violation";
6138 	case WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN:
6139 		return "invalid regdomain";
6140 	default:
6141 		return "unknown";
6142 	}
6143 }
6144 
ath12k_vdev_start_resp_event(struct ath12k_base * ab,struct sk_buff * skb)6145 static void ath12k_vdev_start_resp_event(struct ath12k_base *ab, struct sk_buff *skb)
6146 {
6147 	struct wmi_vdev_start_resp_event vdev_start_resp;
6148 	struct ath12k *ar;
6149 	u32 status;
6150 
6151 	if (ath12k_pull_vdev_start_resp_tlv(ab, skb, &vdev_start_resp) != 0) {
6152 		ath12k_warn(ab, "failed to extract vdev start resp");
6153 		return;
6154 	}
6155 
6156 	rcu_read_lock();
6157 	ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(vdev_start_resp.vdev_id));
6158 	if (!ar) {
6159 		ath12k_warn(ab, "invalid vdev id in vdev start resp ev %d",
6160 			    vdev_start_resp.vdev_id);
6161 		rcu_read_unlock();
6162 		return;
6163 	}
6164 
6165 	ar->last_wmi_vdev_start_status = 0;
6166 
6167 	status = le32_to_cpu(vdev_start_resp.status);
6168 
6169 	if (WARN_ON_ONCE(status)) {
6170 		ath12k_warn(ab, "vdev start resp error status %d (%s)\n",
6171 			    status, ath12k_wmi_vdev_resp_print(status));
6172 		ar->last_wmi_vdev_start_status = status;
6173 	}
6174 
6175 	complete(&ar->vdev_setup_done);
6176 
6177 	rcu_read_unlock();
6178 
6179 	ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev start resp for vdev id %d",
6180 		   vdev_start_resp.vdev_id);
6181 }
6182 
ath12k_bcn_tx_status_event(struct ath12k_base * ab,struct sk_buff * skb)6183 static void ath12k_bcn_tx_status_event(struct ath12k_base *ab, struct sk_buff *skb)
6184 {
6185 	u32 vdev_id, tx_status;
6186 
6187 	if (ath12k_pull_bcn_tx_status_ev(ab, skb, &vdev_id, &tx_status) != 0) {
6188 		ath12k_warn(ab, "failed to extract bcn tx status");
6189 		return;
6190 	}
6191 }
6192 
ath12k_vdev_stopped_event(struct ath12k_base * ab,struct sk_buff * skb)6193 static void ath12k_vdev_stopped_event(struct ath12k_base *ab, struct sk_buff *skb)
6194 {
6195 	struct ath12k *ar;
6196 	u32 vdev_id = 0;
6197 
6198 	if (ath12k_pull_vdev_stopped_param_tlv(ab, skb, &vdev_id) != 0) {
6199 		ath12k_warn(ab, "failed to extract vdev stopped event");
6200 		return;
6201 	}
6202 
6203 	rcu_read_lock();
6204 	ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
6205 	if (!ar) {
6206 		ath12k_warn(ab, "invalid vdev id in vdev stopped ev %d",
6207 			    vdev_id);
6208 		rcu_read_unlock();
6209 		return;
6210 	}
6211 
6212 	complete(&ar->vdev_setup_done);
6213 
6214 	rcu_read_unlock();
6215 
6216 	ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev stopped for vdev id %d", vdev_id);
6217 }
6218 
ath12k_mgmt_rx_event(struct ath12k_base * ab,struct sk_buff * skb)6219 static void ath12k_mgmt_rx_event(struct ath12k_base *ab, struct sk_buff *skb)
6220 {
6221 	struct ath12k_wmi_mgmt_rx_arg rx_ev = {0};
6222 	struct ath12k *ar;
6223 	struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
6224 	struct ieee80211_hdr *hdr;
6225 	u16 fc;
6226 	struct ieee80211_supported_band *sband;
6227 
6228 	if (ath12k_pull_mgmt_rx_params_tlv(ab, skb, &rx_ev) != 0) {
6229 		ath12k_warn(ab, "failed to extract mgmt rx event");
6230 		dev_kfree_skb(skb);
6231 		return;
6232 	}
6233 
6234 	memset(status, 0, sizeof(*status));
6235 
6236 	ath12k_dbg(ab, ATH12K_DBG_MGMT, "mgmt rx event status %08x\n",
6237 		   rx_ev.status);
6238 
6239 	rcu_read_lock();
6240 	ar = ath12k_mac_get_ar_by_pdev_id(ab, rx_ev.pdev_id);
6241 
6242 	if (!ar) {
6243 		ath12k_warn(ab, "invalid pdev_id %d in mgmt_rx_event\n",
6244 			    rx_ev.pdev_id);
6245 		dev_kfree_skb(skb);
6246 		goto exit;
6247 	}
6248 
6249 	if ((test_bit(ATH12K_FLAG_CAC_RUNNING, &ar->dev_flags)) ||
6250 	    (rx_ev.status & (WMI_RX_STATUS_ERR_DECRYPT |
6251 			     WMI_RX_STATUS_ERR_KEY_CACHE_MISS |
6252 			     WMI_RX_STATUS_ERR_CRC))) {
6253 		dev_kfree_skb(skb);
6254 		goto exit;
6255 	}
6256 
6257 	if (rx_ev.status & WMI_RX_STATUS_ERR_MIC)
6258 		status->flag |= RX_FLAG_MMIC_ERROR;
6259 
6260 	if (rx_ev.chan_freq >= ATH12K_MIN_6G_FREQ &&
6261 	    rx_ev.chan_freq <= ATH12K_MAX_6G_FREQ) {
6262 		status->band = NL80211_BAND_6GHZ;
6263 		status->freq = rx_ev.chan_freq;
6264 	} else if (rx_ev.channel >= 1 && rx_ev.channel <= 14) {
6265 		status->band = NL80211_BAND_2GHZ;
6266 	} else if (rx_ev.channel >= 36 && rx_ev.channel <= ATH12K_MAX_5G_CHAN) {
6267 		status->band = NL80211_BAND_5GHZ;
6268 	} else {
6269 		/* Shouldn't happen unless list of advertised channels to
6270 		 * mac80211 has been changed.
6271 		 */
6272 		WARN_ON_ONCE(1);
6273 		dev_kfree_skb(skb);
6274 		goto exit;
6275 	}
6276 
6277 	if (rx_ev.phy_mode == MODE_11B &&
6278 	    (status->band == NL80211_BAND_5GHZ || status->band == NL80211_BAND_6GHZ))
6279 		ath12k_dbg(ab, ATH12K_DBG_WMI,
6280 			   "wmi mgmt rx 11b (CCK) on 5/6GHz, band = %d\n", status->band);
6281 
6282 	sband = &ar->mac.sbands[status->band];
6283 
6284 	if (status->band != NL80211_BAND_6GHZ)
6285 		status->freq = ieee80211_channel_to_frequency(rx_ev.channel,
6286 							      status->band);
6287 
6288 	status->signal = rx_ev.snr + ATH12K_DEFAULT_NOISE_FLOOR;
6289 	status->rate_idx = ath12k_mac_bitrate_to_idx(sband, rx_ev.rate / 100);
6290 
6291 	hdr = (struct ieee80211_hdr *)skb->data;
6292 	fc = le16_to_cpu(hdr->frame_control);
6293 
6294 	/* Firmware is guaranteed to report all essential management frames via
6295 	 * WMI while it can deliver some extra via HTT. Since there can be
6296 	 * duplicates split the reporting wrt monitor/sniffing.
6297 	 */
6298 	status->flag |= RX_FLAG_SKIP_MONITOR;
6299 
6300 	/* In case of PMF, FW delivers decrypted frames with Protected Bit set
6301 	 * including group privacy action frames.
6302 	 */
6303 	if (ieee80211_has_protected(hdr->frame_control)) {
6304 		status->flag |= RX_FLAG_DECRYPTED;
6305 
6306 		if (!ieee80211_is_robust_mgmt_frame(skb)) {
6307 			status->flag |= RX_FLAG_IV_STRIPPED |
6308 					RX_FLAG_MMIC_STRIPPED;
6309 			hdr->frame_control = __cpu_to_le16(fc &
6310 					     ~IEEE80211_FCTL_PROTECTED);
6311 		}
6312 	}
6313 
6314 	if (ieee80211_is_beacon(hdr->frame_control))
6315 		ath12k_mac_handle_beacon(ar, skb);
6316 
6317 	ath12k_dbg(ab, ATH12K_DBG_MGMT,
6318 		   "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
6319 		   skb, skb->len,
6320 		   fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
6321 
6322 	ath12k_dbg(ab, ATH12K_DBG_MGMT,
6323 		   "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
6324 		   status->freq, status->band, status->signal,
6325 		   status->rate_idx);
6326 
6327 	ieee80211_rx_ni(ath12k_ar_to_hw(ar), skb);
6328 
6329 exit:
6330 	rcu_read_unlock();
6331 }
6332 
ath12k_mgmt_tx_compl_event(struct ath12k_base * ab,struct sk_buff * skb)6333 static void ath12k_mgmt_tx_compl_event(struct ath12k_base *ab, struct sk_buff *skb)
6334 {
6335 	struct wmi_mgmt_tx_compl_event tx_compl_param = {0};
6336 	struct ath12k *ar;
6337 
6338 	if (ath12k_pull_mgmt_tx_compl_param_tlv(ab, skb, &tx_compl_param) != 0) {
6339 		ath12k_warn(ab, "failed to extract mgmt tx compl event");
6340 		return;
6341 	}
6342 
6343 	rcu_read_lock();
6344 	ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(tx_compl_param.pdev_id));
6345 	if (!ar) {
6346 		ath12k_warn(ab, "invalid pdev id %d in mgmt_tx_compl_event\n",
6347 			    tx_compl_param.pdev_id);
6348 		goto exit;
6349 	}
6350 
6351 	wmi_process_mgmt_tx_comp(ar, le32_to_cpu(tx_compl_param.desc_id),
6352 				 le32_to_cpu(tx_compl_param.status));
6353 
6354 	ath12k_dbg(ab, ATH12K_DBG_MGMT,
6355 		   "mgmt tx compl ev pdev_id %d, desc_id %d, status %d",
6356 		   tx_compl_param.pdev_id, tx_compl_param.desc_id,
6357 		   tx_compl_param.status);
6358 
6359 exit:
6360 	rcu_read_unlock();
6361 }
6362 
ath12k_get_ar_on_scan_state(struct ath12k_base * ab,u32 vdev_id,enum ath12k_scan_state state)6363 static struct ath12k *ath12k_get_ar_on_scan_state(struct ath12k_base *ab,
6364 						  u32 vdev_id,
6365 						  enum ath12k_scan_state state)
6366 {
6367 	int i;
6368 	struct ath12k_pdev *pdev;
6369 	struct ath12k *ar;
6370 
6371 	for (i = 0; i < ab->num_radios; i++) {
6372 		pdev = rcu_dereference(ab->pdevs_active[i]);
6373 		if (pdev && pdev->ar) {
6374 			ar = pdev->ar;
6375 
6376 			spin_lock_bh(&ar->data_lock);
6377 			if (ar->scan.state == state &&
6378 			    ar->scan.arvif &&
6379 			    ar->scan.arvif->vdev_id == vdev_id) {
6380 				spin_unlock_bh(&ar->data_lock);
6381 				return ar;
6382 			}
6383 			spin_unlock_bh(&ar->data_lock);
6384 		}
6385 	}
6386 	return NULL;
6387 }
6388 
ath12k_scan_event(struct ath12k_base * ab,struct sk_buff * skb)6389 static void ath12k_scan_event(struct ath12k_base *ab, struct sk_buff *skb)
6390 {
6391 	struct ath12k *ar;
6392 	struct wmi_scan_event scan_ev = {0};
6393 
6394 	if (ath12k_pull_scan_ev(ab, skb, &scan_ev) != 0) {
6395 		ath12k_warn(ab, "failed to extract scan event");
6396 		return;
6397 	}
6398 
6399 	rcu_read_lock();
6400 
6401 	/* In case the scan was cancelled, ex. during interface teardown,
6402 	 * the interface will not be found in active interfaces.
6403 	 * Rather, in such scenarios, iterate over the active pdev's to
6404 	 * search 'ar' if the corresponding 'ar' scan is ABORTING and the
6405 	 * aborting scan's vdev id matches this event info.
6406 	 */
6407 	if (le32_to_cpu(scan_ev.event_type) == WMI_SCAN_EVENT_COMPLETED &&
6408 	    le32_to_cpu(scan_ev.reason) == WMI_SCAN_REASON_CANCELLED) {
6409 		ar = ath12k_get_ar_on_scan_state(ab, le32_to_cpu(scan_ev.vdev_id),
6410 						 ATH12K_SCAN_ABORTING);
6411 		if (!ar)
6412 			ar = ath12k_get_ar_on_scan_state(ab, le32_to_cpu(scan_ev.vdev_id),
6413 							 ATH12K_SCAN_RUNNING);
6414 	} else {
6415 		ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(scan_ev.vdev_id));
6416 	}
6417 
6418 	if (!ar) {
6419 		ath12k_warn(ab, "Received scan event for unknown vdev");
6420 		rcu_read_unlock();
6421 		return;
6422 	}
6423 
6424 	spin_lock_bh(&ar->data_lock);
6425 
6426 	ath12k_dbg(ab, ATH12K_DBG_WMI,
6427 		   "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
6428 		   ath12k_wmi_event_scan_type_str(le32_to_cpu(scan_ev.event_type),
6429 						  le32_to_cpu(scan_ev.reason)),
6430 		   le32_to_cpu(scan_ev.event_type),
6431 		   le32_to_cpu(scan_ev.reason),
6432 		   le32_to_cpu(scan_ev.channel_freq),
6433 		   le32_to_cpu(scan_ev.scan_req_id),
6434 		   le32_to_cpu(scan_ev.scan_id),
6435 		   le32_to_cpu(scan_ev.vdev_id),
6436 		   ath12k_scan_state_str(ar->scan.state), ar->scan.state);
6437 
6438 	switch (le32_to_cpu(scan_ev.event_type)) {
6439 	case WMI_SCAN_EVENT_STARTED:
6440 		ath12k_wmi_event_scan_started(ar);
6441 		break;
6442 	case WMI_SCAN_EVENT_COMPLETED:
6443 		ath12k_wmi_event_scan_completed(ar);
6444 		break;
6445 	case WMI_SCAN_EVENT_BSS_CHANNEL:
6446 		ath12k_wmi_event_scan_bss_chan(ar);
6447 		break;
6448 	case WMI_SCAN_EVENT_FOREIGN_CHAN:
6449 		ath12k_wmi_event_scan_foreign_chan(ar, le32_to_cpu(scan_ev.channel_freq));
6450 		break;
6451 	case WMI_SCAN_EVENT_START_FAILED:
6452 		ath12k_warn(ab, "received scan start failure event\n");
6453 		ath12k_wmi_event_scan_start_failed(ar);
6454 		break;
6455 	case WMI_SCAN_EVENT_DEQUEUED:
6456 		__ath12k_mac_scan_finish(ar);
6457 		break;
6458 	case WMI_SCAN_EVENT_PREEMPTED:
6459 	case WMI_SCAN_EVENT_RESTARTED:
6460 	case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT:
6461 	default:
6462 		break;
6463 	}
6464 
6465 	spin_unlock_bh(&ar->data_lock);
6466 
6467 	rcu_read_unlock();
6468 }
6469 
ath12k_peer_sta_kickout_event(struct ath12k_base * ab,struct sk_buff * skb)6470 static void ath12k_peer_sta_kickout_event(struct ath12k_base *ab, struct sk_buff *skb)
6471 {
6472 	struct wmi_peer_sta_kickout_arg arg = {};
6473 	struct ieee80211_sta *sta;
6474 	struct ath12k_peer *peer;
6475 	struct ath12k *ar;
6476 
6477 	if (ath12k_pull_peer_sta_kickout_ev(ab, skb, &arg) != 0) {
6478 		ath12k_warn(ab, "failed to extract peer sta kickout event");
6479 		return;
6480 	}
6481 
6482 	rcu_read_lock();
6483 
6484 	spin_lock_bh(&ab->base_lock);
6485 
6486 	peer = ath12k_peer_find_by_addr(ab, arg.mac_addr);
6487 
6488 	if (!peer) {
6489 		ath12k_warn(ab, "peer not found %pM\n",
6490 			    arg.mac_addr);
6491 		goto exit;
6492 	}
6493 
6494 	ar = ath12k_mac_get_ar_by_vdev_id(ab, peer->vdev_id);
6495 	if (!ar) {
6496 		ath12k_warn(ab, "invalid vdev id in peer sta kickout ev %d",
6497 			    peer->vdev_id);
6498 		goto exit;
6499 	}
6500 
6501 	sta = ieee80211_find_sta_by_ifaddr(ath12k_ar_to_hw(ar),
6502 					   arg.mac_addr, NULL);
6503 	if (!sta) {
6504 		ath12k_warn(ab, "Spurious quick kickout for STA %pM\n",
6505 			    arg.mac_addr);
6506 		goto exit;
6507 	}
6508 
6509 	ath12k_dbg(ab, ATH12K_DBG_WMI, "peer sta kickout event %pM",
6510 		   arg.mac_addr);
6511 
6512 	ieee80211_report_low_ack(sta, 10);
6513 
6514 exit:
6515 	spin_unlock_bh(&ab->base_lock);
6516 	rcu_read_unlock();
6517 }
6518 
ath12k_roam_event(struct ath12k_base * ab,struct sk_buff * skb)6519 static void ath12k_roam_event(struct ath12k_base *ab, struct sk_buff *skb)
6520 {
6521 	struct wmi_roam_event roam_ev = {};
6522 	struct ath12k *ar;
6523 	u32 vdev_id;
6524 	u8 roam_reason;
6525 
6526 	if (ath12k_pull_roam_ev(ab, skb, &roam_ev) != 0) {
6527 		ath12k_warn(ab, "failed to extract roam event");
6528 		return;
6529 	}
6530 
6531 	vdev_id = le32_to_cpu(roam_ev.vdev_id);
6532 	roam_reason = u32_get_bits(le32_to_cpu(roam_ev.reason),
6533 				   WMI_ROAM_REASON_MASK);
6534 
6535 	ath12k_dbg(ab, ATH12K_DBG_WMI,
6536 		   "wmi roam event vdev %u reason %d rssi %d\n",
6537 		   vdev_id, roam_reason, roam_ev.rssi);
6538 
6539 	rcu_read_lock();
6540 	ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
6541 	if (!ar) {
6542 		ath12k_warn(ab, "invalid vdev id in roam ev %d", vdev_id);
6543 		rcu_read_unlock();
6544 		return;
6545 	}
6546 
6547 	if (roam_reason >= WMI_ROAM_REASON_MAX)
6548 		ath12k_warn(ab, "ignoring unknown roam event reason %d on vdev %i\n",
6549 			    roam_reason, vdev_id);
6550 
6551 	switch (roam_reason) {
6552 	case WMI_ROAM_REASON_BEACON_MISS:
6553 		ath12k_mac_handle_beacon_miss(ar, vdev_id);
6554 		break;
6555 	case WMI_ROAM_REASON_BETTER_AP:
6556 	case WMI_ROAM_REASON_LOW_RSSI:
6557 	case WMI_ROAM_REASON_SUITABLE_AP_FOUND:
6558 	case WMI_ROAM_REASON_HO_FAILED:
6559 		ath12k_warn(ab, "ignoring not implemented roam event reason %d on vdev %i\n",
6560 			    roam_reason, vdev_id);
6561 		break;
6562 	}
6563 
6564 	rcu_read_unlock();
6565 }
6566 
ath12k_chan_info_event(struct ath12k_base * ab,struct sk_buff * skb)6567 static void ath12k_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb)
6568 {
6569 	struct wmi_chan_info_event ch_info_ev = {0};
6570 	struct ath12k *ar;
6571 	struct survey_info *survey;
6572 	int idx;
6573 	/* HW channel counters frequency value in hertz */
6574 	u32 cc_freq_hz = ab->cc_freq_hz;
6575 
6576 	if (ath12k_pull_chan_info_ev(ab, skb, &ch_info_ev) != 0) {
6577 		ath12k_warn(ab, "failed to extract chan info event");
6578 		return;
6579 	}
6580 
6581 	ath12k_dbg(ab, ATH12K_DBG_WMI,
6582 		   "chan info vdev_id %d err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d mac_clk_mhz %d\n",
6583 		   ch_info_ev.vdev_id, ch_info_ev.err_code, ch_info_ev.freq,
6584 		   ch_info_ev.cmd_flags, ch_info_ev.noise_floor,
6585 		   ch_info_ev.rx_clear_count, ch_info_ev.cycle_count,
6586 		   ch_info_ev.mac_clk_mhz);
6587 
6588 	if (le32_to_cpu(ch_info_ev.cmd_flags) == WMI_CHAN_INFO_END_RESP) {
6589 		ath12k_dbg(ab, ATH12K_DBG_WMI, "chan info report completed\n");
6590 		return;
6591 	}
6592 
6593 	rcu_read_lock();
6594 	ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(ch_info_ev.vdev_id));
6595 	if (!ar) {
6596 		ath12k_warn(ab, "invalid vdev id in chan info ev %d",
6597 			    ch_info_ev.vdev_id);
6598 		rcu_read_unlock();
6599 		return;
6600 	}
6601 	spin_lock_bh(&ar->data_lock);
6602 
6603 	switch (ar->scan.state) {
6604 	case ATH12K_SCAN_IDLE:
6605 	case ATH12K_SCAN_STARTING:
6606 		ath12k_warn(ab, "received chan info event without a scan request, ignoring\n");
6607 		goto exit;
6608 	case ATH12K_SCAN_RUNNING:
6609 	case ATH12K_SCAN_ABORTING:
6610 		break;
6611 	}
6612 
6613 	idx = freq_to_idx(ar, le32_to_cpu(ch_info_ev.freq));
6614 	if (idx >= ARRAY_SIZE(ar->survey)) {
6615 		ath12k_warn(ab, "chan info: invalid frequency %d (idx %d out of bounds)\n",
6616 			    ch_info_ev.freq, idx);
6617 		goto exit;
6618 	}
6619 
6620 	/* If FW provides MAC clock frequency in Mhz, overriding the initialized
6621 	 * HW channel counters frequency value
6622 	 */
6623 	if (ch_info_ev.mac_clk_mhz)
6624 		cc_freq_hz = (le32_to_cpu(ch_info_ev.mac_clk_mhz) * 1000);
6625 
6626 	if (ch_info_ev.cmd_flags == WMI_CHAN_INFO_START_RESP) {
6627 		survey = &ar->survey[idx];
6628 		memset(survey, 0, sizeof(*survey));
6629 		survey->noise = le32_to_cpu(ch_info_ev.noise_floor);
6630 		survey->filled = SURVEY_INFO_NOISE_DBM | SURVEY_INFO_TIME |
6631 				 SURVEY_INFO_TIME_BUSY;
6632 		survey->time = div_u64(le32_to_cpu(ch_info_ev.cycle_count), cc_freq_hz);
6633 		survey->time_busy = div_u64(le32_to_cpu(ch_info_ev.rx_clear_count),
6634 					    cc_freq_hz);
6635 	}
6636 exit:
6637 	spin_unlock_bh(&ar->data_lock);
6638 	rcu_read_unlock();
6639 }
6640 
6641 static void
ath12k_pdev_bss_chan_info_event(struct ath12k_base * ab,struct sk_buff * skb)6642 ath12k_pdev_bss_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb)
6643 {
6644 	struct wmi_pdev_bss_chan_info_event bss_ch_info_ev = {};
6645 	struct survey_info *survey;
6646 	struct ath12k *ar;
6647 	u32 cc_freq_hz = ab->cc_freq_hz;
6648 	u64 busy, total, tx, rx, rx_bss;
6649 	int idx;
6650 
6651 	if (ath12k_pull_pdev_bss_chan_info_ev(ab, skb, &bss_ch_info_ev) != 0) {
6652 		ath12k_warn(ab, "failed to extract pdev bss chan info event");
6653 		return;
6654 	}
6655 
6656 	busy = (u64)(le32_to_cpu(bss_ch_info_ev.rx_clear_count_high)) << 32 |
6657 		le32_to_cpu(bss_ch_info_ev.rx_clear_count_low);
6658 
6659 	total = (u64)(le32_to_cpu(bss_ch_info_ev.cycle_count_high)) << 32 |
6660 		le32_to_cpu(bss_ch_info_ev.cycle_count_low);
6661 
6662 	tx = (u64)(le32_to_cpu(bss_ch_info_ev.tx_cycle_count_high)) << 32 |
6663 		le32_to_cpu(bss_ch_info_ev.tx_cycle_count_low);
6664 
6665 	rx = (u64)(le32_to_cpu(bss_ch_info_ev.rx_cycle_count_high)) << 32 |
6666 		le32_to_cpu(bss_ch_info_ev.rx_cycle_count_low);
6667 
6668 	rx_bss = (u64)(le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_high)) << 32 |
6669 		le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_low);
6670 
6671 	ath12k_dbg(ab, ATH12K_DBG_WMI,
6672 		   "pdev bss chan info:\n pdev_id: %d freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n",
6673 		   bss_ch_info_ev.pdev_id, bss_ch_info_ev.freq,
6674 		   bss_ch_info_ev.noise_floor, busy, total,
6675 		   tx, rx, rx_bss);
6676 
6677 	rcu_read_lock();
6678 	ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(bss_ch_info_ev.pdev_id));
6679 
6680 	if (!ar) {
6681 		ath12k_warn(ab, "invalid pdev id %d in bss_chan_info event\n",
6682 			    bss_ch_info_ev.pdev_id);
6683 		rcu_read_unlock();
6684 		return;
6685 	}
6686 
6687 	spin_lock_bh(&ar->data_lock);
6688 	idx = freq_to_idx(ar, le32_to_cpu(bss_ch_info_ev.freq));
6689 	if (idx >= ARRAY_SIZE(ar->survey)) {
6690 		ath12k_warn(ab, "bss chan info: invalid frequency %d (idx %d out of bounds)\n",
6691 			    bss_ch_info_ev.freq, idx);
6692 		goto exit;
6693 	}
6694 
6695 	survey = &ar->survey[idx];
6696 
6697 	survey->noise     = le32_to_cpu(bss_ch_info_ev.noise_floor);
6698 	survey->time      = div_u64(total, cc_freq_hz);
6699 	survey->time_busy = div_u64(busy, cc_freq_hz);
6700 	survey->time_rx   = div_u64(rx_bss, cc_freq_hz);
6701 	survey->time_tx   = div_u64(tx, cc_freq_hz);
6702 	survey->filled   |= (SURVEY_INFO_NOISE_DBM |
6703 			     SURVEY_INFO_TIME |
6704 			     SURVEY_INFO_TIME_BUSY |
6705 			     SURVEY_INFO_TIME_RX |
6706 			     SURVEY_INFO_TIME_TX);
6707 exit:
6708 	spin_unlock_bh(&ar->data_lock);
6709 	complete(&ar->bss_survey_done);
6710 
6711 	rcu_read_unlock();
6712 }
6713 
ath12k_vdev_install_key_compl_event(struct ath12k_base * ab,struct sk_buff * skb)6714 static void ath12k_vdev_install_key_compl_event(struct ath12k_base *ab,
6715 						struct sk_buff *skb)
6716 {
6717 	struct wmi_vdev_install_key_complete_arg install_key_compl = {0};
6718 	struct ath12k *ar;
6719 
6720 	if (ath12k_pull_vdev_install_key_compl_ev(ab, skb, &install_key_compl) != 0) {
6721 		ath12k_warn(ab, "failed to extract install key compl event");
6722 		return;
6723 	}
6724 
6725 	ath12k_dbg(ab, ATH12K_DBG_WMI,
6726 		   "vdev install key ev idx %d flags %08x macaddr %pM status %d\n",
6727 		   install_key_compl.key_idx, install_key_compl.key_flags,
6728 		   install_key_compl.macaddr, install_key_compl.status);
6729 
6730 	rcu_read_lock();
6731 	ar = ath12k_mac_get_ar_by_vdev_id(ab, install_key_compl.vdev_id);
6732 	if (!ar) {
6733 		ath12k_warn(ab, "invalid vdev id in install key compl ev %d",
6734 			    install_key_compl.vdev_id);
6735 		rcu_read_unlock();
6736 		return;
6737 	}
6738 
6739 	ar->install_key_status = 0;
6740 
6741 	if (install_key_compl.status != WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS) {
6742 		ath12k_warn(ab, "install key failed for %pM status %d\n",
6743 			    install_key_compl.macaddr, install_key_compl.status);
6744 		ar->install_key_status = install_key_compl.status;
6745 	}
6746 
6747 	complete(&ar->install_key_done);
6748 	rcu_read_unlock();
6749 }
6750 
ath12k_wmi_tlv_services_parser(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)6751 static int ath12k_wmi_tlv_services_parser(struct ath12k_base *ab,
6752 					  u16 tag, u16 len,
6753 					  const void *ptr,
6754 					  void *data)
6755 {
6756 	const struct wmi_service_available_event *ev;
6757 	u32 *wmi_ext2_service_bitmap;
6758 	int i, j;
6759 	u16 expected_len;
6760 
6761 	expected_len = WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32);
6762 	if (len < expected_len) {
6763 		ath12k_warn(ab, "invalid length %d for the WMI services available tag 0x%x\n",
6764 			    len, tag);
6765 		return -EINVAL;
6766 	}
6767 
6768 	switch (tag) {
6769 	case WMI_TAG_SERVICE_AVAILABLE_EVENT:
6770 		ev = (struct wmi_service_available_event *)ptr;
6771 		for (i = 0, j = WMI_MAX_SERVICE;
6772 		     i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT_SERVICE;
6773 		     i++) {
6774 			do {
6775 				if (le32_to_cpu(ev->wmi_service_segment_bitmap[i]) &
6776 				    BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32))
6777 					set_bit(j, ab->wmi_ab.svc_map);
6778 			} while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32);
6779 		}
6780 
6781 		ath12k_dbg(ab, ATH12K_DBG_WMI,
6782 			   "wmi_ext_service_bitmap 0x%x 0x%x 0x%x 0x%x",
6783 			   ev->wmi_service_segment_bitmap[0],
6784 			   ev->wmi_service_segment_bitmap[1],
6785 			   ev->wmi_service_segment_bitmap[2],
6786 			   ev->wmi_service_segment_bitmap[3]);
6787 		break;
6788 	case WMI_TAG_ARRAY_UINT32:
6789 		wmi_ext2_service_bitmap = (u32 *)ptr;
6790 		for (i = 0, j = WMI_MAX_EXT_SERVICE;
6791 		     i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT2_SERVICE;
6792 		     i++) {
6793 			do {
6794 				if (wmi_ext2_service_bitmap[i] &
6795 				    BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32))
6796 					set_bit(j, ab->wmi_ab.svc_map);
6797 			} while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32);
6798 		}
6799 
6800 		ath12k_dbg(ab, ATH12K_DBG_WMI,
6801 			   "wmi_ext2_service_bitmap 0x%04x 0x%04x 0x%04x 0x%04x",
6802 			   wmi_ext2_service_bitmap[0], wmi_ext2_service_bitmap[1],
6803 			   wmi_ext2_service_bitmap[2], wmi_ext2_service_bitmap[3]);
6804 		break;
6805 	}
6806 	return 0;
6807 }
6808 
ath12k_service_available_event(struct ath12k_base * ab,struct sk_buff * skb)6809 static int ath12k_service_available_event(struct ath12k_base *ab, struct sk_buff *skb)
6810 {
6811 	int ret;
6812 
6813 	ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
6814 				  ath12k_wmi_tlv_services_parser,
6815 				  NULL);
6816 	return ret;
6817 }
6818 
ath12k_peer_assoc_conf_event(struct ath12k_base * ab,struct sk_buff * skb)6819 static void ath12k_peer_assoc_conf_event(struct ath12k_base *ab, struct sk_buff *skb)
6820 {
6821 	struct wmi_peer_assoc_conf_arg peer_assoc_conf = {0};
6822 	struct ath12k *ar;
6823 
6824 	if (ath12k_pull_peer_assoc_conf_ev(ab, skb, &peer_assoc_conf) != 0) {
6825 		ath12k_warn(ab, "failed to extract peer assoc conf event");
6826 		return;
6827 	}
6828 
6829 	ath12k_dbg(ab, ATH12K_DBG_WMI,
6830 		   "peer assoc conf ev vdev id %d macaddr %pM\n",
6831 		   peer_assoc_conf.vdev_id, peer_assoc_conf.macaddr);
6832 
6833 	rcu_read_lock();
6834 	ar = ath12k_mac_get_ar_by_vdev_id(ab, peer_assoc_conf.vdev_id);
6835 
6836 	if (!ar) {
6837 		ath12k_warn(ab, "invalid vdev id in peer assoc conf ev %d",
6838 			    peer_assoc_conf.vdev_id);
6839 		rcu_read_unlock();
6840 		return;
6841 	}
6842 
6843 	complete(&ar->peer_assoc_done);
6844 	rcu_read_unlock();
6845 }
6846 
ath12k_update_stats_event(struct ath12k_base * ab,struct sk_buff * skb)6847 static void ath12k_update_stats_event(struct ath12k_base *ab, struct sk_buff *skb)
6848 {
6849 }
6850 
6851 /* PDEV_CTL_FAILSAFE_CHECK_EVENT is received from FW when the frequency scanned
6852  * is not part of BDF CTL(Conformance test limits) table entries.
6853  */
ath12k_pdev_ctl_failsafe_check_event(struct ath12k_base * ab,struct sk_buff * skb)6854 static void ath12k_pdev_ctl_failsafe_check_event(struct ath12k_base *ab,
6855 						 struct sk_buff *skb)
6856 {
6857 	const void **tb;
6858 	const struct wmi_pdev_ctl_failsafe_chk_event *ev;
6859 	int ret;
6860 
6861 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6862 	if (IS_ERR(tb)) {
6863 		ret = PTR_ERR(tb);
6864 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6865 		return;
6866 	}
6867 
6868 	ev = tb[WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT];
6869 	if (!ev) {
6870 		ath12k_warn(ab, "failed to fetch pdev ctl failsafe check ev");
6871 		kfree(tb);
6872 		return;
6873 	}
6874 
6875 	ath12k_dbg(ab, ATH12K_DBG_WMI,
6876 		   "pdev ctl failsafe check ev status %d\n",
6877 		   ev->ctl_failsafe_status);
6878 
6879 	/* If ctl_failsafe_status is set to 1 FW will max out the Transmit power
6880 	 * to 10 dBm else the CTL power entry in the BDF would be picked up.
6881 	 */
6882 	if (ev->ctl_failsafe_status != 0)
6883 		ath12k_warn(ab, "pdev ctl failsafe failure status %d",
6884 			    ev->ctl_failsafe_status);
6885 
6886 	kfree(tb);
6887 }
6888 
6889 static void
ath12k_wmi_process_csa_switch_count_event(struct ath12k_base * ab,const struct ath12k_wmi_pdev_csa_event * ev,const u32 * vdev_ids)6890 ath12k_wmi_process_csa_switch_count_event(struct ath12k_base *ab,
6891 					  const struct ath12k_wmi_pdev_csa_event *ev,
6892 					  const u32 *vdev_ids)
6893 {
6894 	int i;
6895 	struct ieee80211_bss_conf *conf;
6896 	struct ath12k_link_vif *arvif;
6897 	struct ath12k_vif *ahvif;
6898 
6899 	/* Finish CSA once the switch count becomes NULL */
6900 	if (ev->current_switch_count)
6901 		return;
6902 
6903 	rcu_read_lock();
6904 	for (i = 0; i < le32_to_cpu(ev->num_vdevs); i++) {
6905 		arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_ids[i]);
6906 
6907 		if (!arvif) {
6908 			ath12k_warn(ab, "Recvd csa status for unknown vdev %d",
6909 				    vdev_ids[i]);
6910 			continue;
6911 		}
6912 		ahvif = arvif->ahvif;
6913 
6914 		if (arvif->link_id >= IEEE80211_MLD_MAX_NUM_LINKS) {
6915 			ath12k_warn(ab, "Invalid CSA switch count even link id: %d\n",
6916 				    arvif->link_id);
6917 			continue;
6918 		}
6919 
6920 		conf = rcu_dereference(ahvif->vif->link_conf[arvif->link_id]);
6921 		if (!conf) {
6922 			ath12k_warn(ab, "unable to access bss link conf in process csa for vif %pM link %u\n",
6923 				    ahvif->vif->addr, arvif->link_id);
6924 			continue;
6925 		}
6926 
6927 		if (arvif->is_up && conf->csa_active)
6928 			ieee80211_csa_finish(ahvif->vif, 0);
6929 	}
6930 	rcu_read_unlock();
6931 }
6932 
6933 static void
ath12k_wmi_pdev_csa_switch_count_status_event(struct ath12k_base * ab,struct sk_buff * skb)6934 ath12k_wmi_pdev_csa_switch_count_status_event(struct ath12k_base *ab,
6935 					      struct sk_buff *skb)
6936 {
6937 	const void **tb;
6938 	const struct ath12k_wmi_pdev_csa_event *ev;
6939 	const u32 *vdev_ids;
6940 	int ret;
6941 
6942 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6943 	if (IS_ERR(tb)) {
6944 		ret = PTR_ERR(tb);
6945 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6946 		return;
6947 	}
6948 
6949 	ev = tb[WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT];
6950 	vdev_ids = tb[WMI_TAG_ARRAY_UINT32];
6951 
6952 	if (!ev || !vdev_ids) {
6953 		ath12k_warn(ab, "failed to fetch pdev csa switch count ev");
6954 		kfree(tb);
6955 		return;
6956 	}
6957 
6958 	ath12k_dbg(ab, ATH12K_DBG_WMI,
6959 		   "pdev csa switch count %d for pdev %d, num_vdevs %d",
6960 		   ev->current_switch_count, ev->pdev_id,
6961 		   ev->num_vdevs);
6962 
6963 	ath12k_wmi_process_csa_switch_count_event(ab, ev, vdev_ids);
6964 
6965 	kfree(tb);
6966 }
6967 
6968 static void
ath12k_wmi_pdev_dfs_radar_detected_event(struct ath12k_base * ab,struct sk_buff * skb)6969 ath12k_wmi_pdev_dfs_radar_detected_event(struct ath12k_base *ab, struct sk_buff *skb)
6970 {
6971 	const void **tb;
6972 	struct ath12k_mac_get_any_chanctx_conf_arg arg;
6973 	const struct ath12k_wmi_pdev_radar_event *ev;
6974 	struct ath12k *ar;
6975 	int ret;
6976 
6977 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6978 	if (IS_ERR(tb)) {
6979 		ret = PTR_ERR(tb);
6980 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6981 		return;
6982 	}
6983 
6984 	ev = tb[WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT];
6985 
6986 	if (!ev) {
6987 		ath12k_warn(ab, "failed to fetch pdev dfs radar detected ev");
6988 		kfree(tb);
6989 		return;
6990 	}
6991 
6992 	ath12k_dbg(ab, ATH12K_DBG_WMI,
6993 		   "pdev dfs radar detected on pdev %d, detection mode %d, chan freq %d, chan_width %d, detector id %d, seg id %d, timestamp %d, chirp %d, freq offset %d, sidx %d",
6994 		   ev->pdev_id, ev->detection_mode, ev->chan_freq, ev->chan_width,
6995 		   ev->detector_id, ev->segment_id, ev->timestamp, ev->is_chirp,
6996 		   ev->freq_offset, ev->sidx);
6997 
6998 	rcu_read_lock();
6999 
7000 	ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev->pdev_id));
7001 
7002 	if (!ar) {
7003 		ath12k_warn(ab, "radar detected in invalid pdev %d\n",
7004 			    ev->pdev_id);
7005 		goto exit;
7006 	}
7007 
7008 	arg.ar = ar;
7009 	arg.chanctx_conf = NULL;
7010 	ieee80211_iter_chan_contexts_atomic(ath12k_ar_to_hw(ar),
7011 					    ath12k_mac_get_any_chanctx_conf_iter, &arg);
7012 	if (!arg.chanctx_conf) {
7013 		ath12k_warn(ab, "failed to find valid chanctx_conf in radar detected event\n");
7014 		goto exit;
7015 	}
7016 
7017 	ath12k_dbg(ar->ab, ATH12K_DBG_REG, "DFS Radar Detected in pdev %d\n",
7018 		   ev->pdev_id);
7019 
7020 	if (ar->dfs_block_radar_events)
7021 		ath12k_info(ab, "DFS Radar detected, but ignored as requested\n");
7022 	else
7023 		ieee80211_radar_detected(ath12k_ar_to_hw(ar), arg.chanctx_conf);
7024 
7025 exit:
7026 	rcu_read_unlock();
7027 
7028 	kfree(tb);
7029 }
7030 
7031 static void
ath12k_wmi_pdev_temperature_event(struct ath12k_base * ab,struct sk_buff * skb)7032 ath12k_wmi_pdev_temperature_event(struct ath12k_base *ab,
7033 				  struct sk_buff *skb)
7034 {
7035 	struct ath12k *ar;
7036 	struct wmi_pdev_temperature_event ev = {0};
7037 
7038 	if (ath12k_pull_pdev_temp_ev(ab, skb, &ev) != 0) {
7039 		ath12k_warn(ab, "failed to extract pdev temperature event");
7040 		return;
7041 	}
7042 
7043 	ath12k_dbg(ab, ATH12K_DBG_WMI,
7044 		   "pdev temperature ev temp %d pdev_id %d\n", ev.temp, ev.pdev_id);
7045 
7046 	rcu_read_lock();
7047 
7048 	ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev.pdev_id));
7049 	if (!ar) {
7050 		ath12k_warn(ab, "invalid pdev id in pdev temperature ev %d", ev.pdev_id);
7051 		goto exit;
7052 	}
7053 
7054 exit:
7055 	rcu_read_unlock();
7056 }
7057 
ath12k_fils_discovery_event(struct ath12k_base * ab,struct sk_buff * skb)7058 static void ath12k_fils_discovery_event(struct ath12k_base *ab,
7059 					struct sk_buff *skb)
7060 {
7061 	const void **tb;
7062 	const struct wmi_fils_discovery_event *ev;
7063 	int ret;
7064 
7065 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
7066 	if (IS_ERR(tb)) {
7067 		ret = PTR_ERR(tb);
7068 		ath12k_warn(ab,
7069 			    "failed to parse FILS discovery event tlv %d\n",
7070 			    ret);
7071 		return;
7072 	}
7073 
7074 	ev = tb[WMI_TAG_HOST_SWFDA_EVENT];
7075 	if (!ev) {
7076 		ath12k_warn(ab, "failed to fetch FILS discovery event\n");
7077 		kfree(tb);
7078 		return;
7079 	}
7080 
7081 	ath12k_warn(ab,
7082 		    "FILS discovery frame expected from host for vdev_id: %u, transmission scheduled at %u, next TBTT: %u\n",
7083 		    ev->vdev_id, ev->fils_tt, ev->tbtt);
7084 
7085 	kfree(tb);
7086 }
7087 
ath12k_probe_resp_tx_status_event(struct ath12k_base * ab,struct sk_buff * skb)7088 static void ath12k_probe_resp_tx_status_event(struct ath12k_base *ab,
7089 					      struct sk_buff *skb)
7090 {
7091 	const void **tb;
7092 	const struct wmi_probe_resp_tx_status_event *ev;
7093 	int ret;
7094 
7095 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
7096 	if (IS_ERR(tb)) {
7097 		ret = PTR_ERR(tb);
7098 		ath12k_warn(ab,
7099 			    "failed to parse probe response transmission status event tlv: %d\n",
7100 			    ret);
7101 		return;
7102 	}
7103 
7104 	ev = tb[WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT];
7105 	if (!ev) {
7106 		ath12k_warn(ab,
7107 			    "failed to fetch probe response transmission status event");
7108 		kfree(tb);
7109 		return;
7110 	}
7111 
7112 	if (ev->tx_status)
7113 		ath12k_warn(ab,
7114 			    "Probe response transmission failed for vdev_id %u, status %u\n",
7115 			    ev->vdev_id, ev->tx_status);
7116 
7117 	kfree(tb);
7118 }
7119 
ath12k_wmi_p2p_noa_event(struct ath12k_base * ab,struct sk_buff * skb)7120 static int ath12k_wmi_p2p_noa_event(struct ath12k_base *ab,
7121 				    struct sk_buff *skb)
7122 {
7123 	const void **tb;
7124 	const struct wmi_p2p_noa_event *ev;
7125 	const struct ath12k_wmi_p2p_noa_info *noa;
7126 	struct ath12k *ar;
7127 	int ret, vdev_id;
7128 
7129 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
7130 	if (IS_ERR(tb)) {
7131 		ret = PTR_ERR(tb);
7132 		ath12k_warn(ab, "failed to parse P2P NoA TLV: %d\n", ret);
7133 		return ret;
7134 	}
7135 
7136 	ev = tb[WMI_TAG_P2P_NOA_EVENT];
7137 	noa = tb[WMI_TAG_P2P_NOA_INFO];
7138 
7139 	if (!ev || !noa) {
7140 		ret = -EPROTO;
7141 		goto out;
7142 	}
7143 
7144 	vdev_id = __le32_to_cpu(ev->vdev_id);
7145 
7146 	ath12k_dbg(ab, ATH12K_DBG_WMI,
7147 		   "wmi tlv p2p noa vdev_id %i descriptors %u\n",
7148 		   vdev_id, le32_get_bits(noa->noa_attr, WMI_P2P_NOA_INFO_DESC_NUM));
7149 
7150 	rcu_read_lock();
7151 	ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
7152 	if (!ar) {
7153 		ath12k_warn(ab, "invalid vdev id %d in P2P NoA event\n",
7154 			    vdev_id);
7155 		ret = -EINVAL;
7156 		goto unlock;
7157 	}
7158 
7159 	ath12k_p2p_noa_update_by_vdev_id(ar, vdev_id, noa);
7160 
7161 	ret = 0;
7162 
7163 unlock:
7164 	rcu_read_unlock();
7165 out:
7166 	kfree(tb);
7167 	return ret;
7168 }
7169 
ath12k_rfkill_state_change_event(struct ath12k_base * ab,struct sk_buff * skb)7170 static void ath12k_rfkill_state_change_event(struct ath12k_base *ab,
7171 					     struct sk_buff *skb)
7172 {
7173 	const struct wmi_rfkill_state_change_event *ev;
7174 	const void **tb;
7175 	int ret;
7176 
7177 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
7178 	if (IS_ERR(tb)) {
7179 		ret = PTR_ERR(tb);
7180 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
7181 		return;
7182 	}
7183 
7184 	ev = tb[WMI_TAG_RFKILL_EVENT];
7185 	if (!ev) {
7186 		kfree(tb);
7187 		return;
7188 	}
7189 
7190 	ath12k_dbg(ab, ATH12K_DBG_MAC,
7191 		   "wmi tlv rfkill state change gpio %d type %d radio_state %d\n",
7192 		   le32_to_cpu(ev->gpio_pin_num),
7193 		   le32_to_cpu(ev->int_type),
7194 		   le32_to_cpu(ev->radio_state));
7195 
7196 	spin_lock_bh(&ab->base_lock);
7197 	ab->rfkill_radio_on = (ev->radio_state == cpu_to_le32(WMI_RFKILL_RADIO_STATE_ON));
7198 	spin_unlock_bh(&ab->base_lock);
7199 
7200 	queue_work(ab->workqueue, &ab->rfkill_work);
7201 	kfree(tb);
7202 }
7203 
7204 static void
ath12k_wmi_diag_event(struct ath12k_base * ab,struct sk_buff * skb)7205 ath12k_wmi_diag_event(struct ath12k_base *ab, struct sk_buff *skb)
7206 {
7207 	trace_ath12k_wmi_diag(ab, skb->data, skb->len);
7208 }
7209 
ath12k_wmi_twt_enable_event(struct ath12k_base * ab,struct sk_buff * skb)7210 static void ath12k_wmi_twt_enable_event(struct ath12k_base *ab,
7211 					struct sk_buff *skb)
7212 {
7213 	const void **tb;
7214 	const struct wmi_twt_enable_event *ev;
7215 	int ret;
7216 
7217 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
7218 	if (IS_ERR(tb)) {
7219 		ret = PTR_ERR(tb);
7220 		ath12k_warn(ab, "failed to parse wmi twt enable status event tlv: %d\n",
7221 			    ret);
7222 		return;
7223 	}
7224 
7225 	ev = tb[WMI_TAG_TWT_ENABLE_COMPLETE_EVENT];
7226 	if (!ev) {
7227 		ath12k_warn(ab, "failed to fetch twt enable wmi event\n");
7228 		goto exit;
7229 	}
7230 
7231 	ath12k_dbg(ab, ATH12K_DBG_MAC, "wmi twt enable event pdev id %u status %u\n",
7232 		   le32_to_cpu(ev->pdev_id),
7233 		   le32_to_cpu(ev->status));
7234 
7235 exit:
7236 	kfree(tb);
7237 }
7238 
ath12k_wmi_twt_disable_event(struct ath12k_base * ab,struct sk_buff * skb)7239 static void ath12k_wmi_twt_disable_event(struct ath12k_base *ab,
7240 					 struct sk_buff *skb)
7241 {
7242 	const void **tb;
7243 	const struct wmi_twt_disable_event *ev;
7244 	int ret;
7245 
7246 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
7247 	if (IS_ERR(tb)) {
7248 		ret = PTR_ERR(tb);
7249 		ath12k_warn(ab, "failed to parse wmi twt disable status event tlv: %d\n",
7250 			    ret);
7251 		return;
7252 	}
7253 
7254 	ev = tb[WMI_TAG_TWT_DISABLE_COMPLETE_EVENT];
7255 	if (!ev) {
7256 		ath12k_warn(ab, "failed to fetch twt disable wmi event\n");
7257 		goto exit;
7258 	}
7259 
7260 	ath12k_dbg(ab, ATH12K_DBG_MAC, "wmi twt disable event pdev id %d status %u\n",
7261 		   le32_to_cpu(ev->pdev_id),
7262 		   le32_to_cpu(ev->status));
7263 
7264 exit:
7265 	kfree(tb);
7266 }
7267 
ath12k_wmi_wow_wakeup_host_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)7268 static int ath12k_wmi_wow_wakeup_host_parse(struct ath12k_base *ab,
7269 					    u16 tag, u16 len,
7270 					    const void *ptr, void *data)
7271 {
7272 	const struct wmi_wow_ev_pg_fault_param *pf_param;
7273 	const struct wmi_wow_ev_param *param;
7274 	struct wmi_wow_ev_arg *arg = data;
7275 	int pf_len;
7276 
7277 	switch (tag) {
7278 	case WMI_TAG_WOW_EVENT_INFO:
7279 		param = ptr;
7280 		arg->wake_reason = le32_to_cpu(param->wake_reason);
7281 		ath12k_dbg(ab, ATH12K_DBG_WMI, "wow wakeup host reason %d %s\n",
7282 			   arg->wake_reason, wow_reason(arg->wake_reason));
7283 		break;
7284 
7285 	case WMI_TAG_ARRAY_BYTE:
7286 		if (arg && arg->wake_reason == WOW_REASON_PAGE_FAULT) {
7287 			pf_param = ptr;
7288 			pf_len = le32_to_cpu(pf_param->len);
7289 			if (pf_len > len - sizeof(pf_len) ||
7290 			    pf_len < 0) {
7291 				ath12k_warn(ab, "invalid wo reason page fault buffer len %d\n",
7292 					    pf_len);
7293 				return -EINVAL;
7294 			}
7295 			ath12k_dbg(ab, ATH12K_DBG_WMI, "wow_reason_page_fault len %d\n",
7296 				   pf_len);
7297 			ath12k_dbg_dump(ab, ATH12K_DBG_WMI,
7298 					"wow_reason_page_fault packet present",
7299 					"wow_pg_fault ",
7300 					pf_param->data,
7301 					pf_len);
7302 		}
7303 		break;
7304 	default:
7305 		break;
7306 	}
7307 
7308 	return 0;
7309 }
7310 
ath12k_wmi_event_wow_wakeup_host(struct ath12k_base * ab,struct sk_buff * skb)7311 static void ath12k_wmi_event_wow_wakeup_host(struct ath12k_base *ab, struct sk_buff *skb)
7312 {
7313 	struct wmi_wow_ev_arg arg = { };
7314 	int ret;
7315 
7316 	ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
7317 				  ath12k_wmi_wow_wakeup_host_parse,
7318 				  &arg);
7319 	if (ret) {
7320 		ath12k_warn(ab, "failed to parse wmi wow wakeup host event tlv: %d\n",
7321 			    ret);
7322 		return;
7323 	}
7324 
7325 	complete(&ab->wow.wakeup_completed);
7326 }
7327 
ath12k_wmi_gtk_offload_status_event(struct ath12k_base * ab,struct sk_buff * skb)7328 static void ath12k_wmi_gtk_offload_status_event(struct ath12k_base *ab,
7329 						struct sk_buff *skb)
7330 {
7331 	const struct wmi_gtk_offload_status_event *ev;
7332 	struct ath12k_link_vif *arvif;
7333 	__be64 replay_ctr_be;
7334 	u64 replay_ctr;
7335 	const void **tb;
7336 	int ret;
7337 
7338 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
7339 	if (IS_ERR(tb)) {
7340 		ret = PTR_ERR(tb);
7341 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
7342 		return;
7343 	}
7344 
7345 	ev = tb[WMI_TAG_GTK_OFFLOAD_STATUS_EVENT];
7346 	if (!ev) {
7347 		ath12k_warn(ab, "failed to fetch gtk offload status ev");
7348 		kfree(tb);
7349 		return;
7350 	}
7351 
7352 	rcu_read_lock();
7353 	arvif = ath12k_mac_get_arvif_by_vdev_id(ab, le32_to_cpu(ev->vdev_id));
7354 	if (!arvif) {
7355 		rcu_read_unlock();
7356 		ath12k_warn(ab, "failed to get arvif for vdev_id:%d\n",
7357 			    le32_to_cpu(ev->vdev_id));
7358 		kfree(tb);
7359 		return;
7360 	}
7361 
7362 	replay_ctr = le64_to_cpu(ev->replay_ctr);
7363 	arvif->rekey_data.replay_ctr = replay_ctr;
7364 	ath12k_dbg(ab, ATH12K_DBG_WMI, "wmi gtk offload event refresh_cnt %d replay_ctr %llu\n",
7365 		   le32_to_cpu(ev->refresh_cnt), replay_ctr);
7366 
7367 	/* supplicant expects big-endian replay counter */
7368 	replay_ctr_be = cpu_to_be64(replay_ctr);
7369 
7370 	ieee80211_gtk_rekey_notify(arvif->ahvif->vif, arvif->bssid,
7371 				   (void *)&replay_ctr_be, GFP_ATOMIC);
7372 
7373 	rcu_read_unlock();
7374 
7375 	kfree(tb);
7376 }
7377 
ath12k_wmi_event_mlo_setup_complete(struct ath12k_base * ab,struct sk_buff * skb)7378 static void ath12k_wmi_event_mlo_setup_complete(struct ath12k_base *ab,
7379 						struct sk_buff *skb)
7380 {
7381 	const struct wmi_mlo_setup_complete_event *ev;
7382 	struct ath12k *ar = NULL;
7383 	struct ath12k_pdev *pdev;
7384 	const void **tb;
7385 	int ret, i;
7386 
7387 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
7388 	if (IS_ERR(tb)) {
7389 		ret = PTR_ERR(tb);
7390 		ath12k_warn(ab, "failed to parse mlo setup complete event tlv: %d\n",
7391 			    ret);
7392 		return;
7393 	}
7394 
7395 	ev = tb[WMI_TAG_MLO_SETUP_COMPLETE_EVENT];
7396 	if (!ev) {
7397 		ath12k_warn(ab, "failed to fetch mlo setup complete event\n");
7398 		kfree(tb);
7399 		return;
7400 	}
7401 
7402 	if (le32_to_cpu(ev->pdev_id) > ab->num_radios)
7403 		goto skip_lookup;
7404 
7405 	for (i = 0; i < ab->num_radios; i++) {
7406 		pdev = &ab->pdevs[i];
7407 		if (pdev && pdev->pdev_id == le32_to_cpu(ev->pdev_id)) {
7408 			ar = pdev->ar;
7409 			break;
7410 		}
7411 	}
7412 
7413 skip_lookup:
7414 	if (!ar) {
7415 		ath12k_warn(ab, "invalid pdev_id %d status %u in setup complete event\n",
7416 			    ev->pdev_id, ev->status);
7417 		goto out;
7418 	}
7419 
7420 	ar->mlo_setup_status = le32_to_cpu(ev->status);
7421 	complete(&ar->mlo_setup_done);
7422 
7423 out:
7424 	kfree(tb);
7425 }
7426 
ath12k_wmi_event_teardown_complete(struct ath12k_base * ab,struct sk_buff * skb)7427 static void ath12k_wmi_event_teardown_complete(struct ath12k_base *ab,
7428 					       struct sk_buff *skb)
7429 {
7430 	const struct wmi_mlo_teardown_complete_event *ev;
7431 	const void **tb;
7432 	int ret;
7433 
7434 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
7435 	if (IS_ERR(tb)) {
7436 		ret = PTR_ERR(tb);
7437 		ath12k_warn(ab, "failed to parse teardown complete event tlv: %d\n", ret);
7438 		return;
7439 	}
7440 
7441 	ev = tb[WMI_TAG_MLO_TEARDOWN_COMPLETE];
7442 	if (!ev) {
7443 		ath12k_warn(ab, "failed to fetch teardown complete event\n");
7444 		kfree(tb);
7445 		return;
7446 	}
7447 
7448 	kfree(tb);
7449 }
7450 
ath12k_wmi_op_rx(struct ath12k_base * ab,struct sk_buff * skb)7451 static void ath12k_wmi_op_rx(struct ath12k_base *ab, struct sk_buff *skb)
7452 {
7453 	struct wmi_cmd_hdr *cmd_hdr;
7454 	enum wmi_tlv_event_id id;
7455 
7456 	cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
7457 	id = le32_get_bits(cmd_hdr->cmd_id, WMI_CMD_HDR_CMD_ID);
7458 
7459 	if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr)))
7460 		goto out;
7461 
7462 	switch (id) {
7463 		/* Process all the WMI events here */
7464 	case WMI_SERVICE_READY_EVENTID:
7465 		ath12k_service_ready_event(ab, skb);
7466 		break;
7467 	case WMI_SERVICE_READY_EXT_EVENTID:
7468 		ath12k_service_ready_ext_event(ab, skb);
7469 		break;
7470 	case WMI_SERVICE_READY_EXT2_EVENTID:
7471 		ath12k_service_ready_ext2_event(ab, skb);
7472 		break;
7473 	case WMI_REG_CHAN_LIST_CC_EXT_EVENTID:
7474 		ath12k_reg_chan_list_event(ab, skb);
7475 		break;
7476 	case WMI_READY_EVENTID:
7477 		ath12k_ready_event(ab, skb);
7478 		break;
7479 	case WMI_PEER_DELETE_RESP_EVENTID:
7480 		ath12k_peer_delete_resp_event(ab, skb);
7481 		break;
7482 	case WMI_VDEV_START_RESP_EVENTID:
7483 		ath12k_vdev_start_resp_event(ab, skb);
7484 		break;
7485 	case WMI_OFFLOAD_BCN_TX_STATUS_EVENTID:
7486 		ath12k_bcn_tx_status_event(ab, skb);
7487 		break;
7488 	case WMI_VDEV_STOPPED_EVENTID:
7489 		ath12k_vdev_stopped_event(ab, skb);
7490 		break;
7491 	case WMI_MGMT_RX_EVENTID:
7492 		ath12k_mgmt_rx_event(ab, skb);
7493 		/* mgmt_rx_event() owns the skb now! */
7494 		return;
7495 	case WMI_MGMT_TX_COMPLETION_EVENTID:
7496 		ath12k_mgmt_tx_compl_event(ab, skb);
7497 		break;
7498 	case WMI_SCAN_EVENTID:
7499 		ath12k_scan_event(ab, skb);
7500 		break;
7501 	case WMI_PEER_STA_KICKOUT_EVENTID:
7502 		ath12k_peer_sta_kickout_event(ab, skb);
7503 		break;
7504 	case WMI_ROAM_EVENTID:
7505 		ath12k_roam_event(ab, skb);
7506 		break;
7507 	case WMI_CHAN_INFO_EVENTID:
7508 		ath12k_chan_info_event(ab, skb);
7509 		break;
7510 	case WMI_PDEV_BSS_CHAN_INFO_EVENTID:
7511 		ath12k_pdev_bss_chan_info_event(ab, skb);
7512 		break;
7513 	case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
7514 		ath12k_vdev_install_key_compl_event(ab, skb);
7515 		break;
7516 	case WMI_SERVICE_AVAILABLE_EVENTID:
7517 		ath12k_service_available_event(ab, skb);
7518 		break;
7519 	case WMI_PEER_ASSOC_CONF_EVENTID:
7520 		ath12k_peer_assoc_conf_event(ab, skb);
7521 		break;
7522 	case WMI_UPDATE_STATS_EVENTID:
7523 		ath12k_update_stats_event(ab, skb);
7524 		break;
7525 	case WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID:
7526 		ath12k_pdev_ctl_failsafe_check_event(ab, skb);
7527 		break;
7528 	case WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID:
7529 		ath12k_wmi_pdev_csa_switch_count_status_event(ab, skb);
7530 		break;
7531 	case WMI_PDEV_TEMPERATURE_EVENTID:
7532 		ath12k_wmi_pdev_temperature_event(ab, skb);
7533 		break;
7534 	case WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID:
7535 		ath12k_wmi_pdev_dma_ring_buf_release_event(ab, skb);
7536 		break;
7537 	case WMI_HOST_FILS_DISCOVERY_EVENTID:
7538 		ath12k_fils_discovery_event(ab, skb);
7539 		break;
7540 	case WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID:
7541 		ath12k_probe_resp_tx_status_event(ab, skb);
7542 		break;
7543 	case WMI_RFKILL_STATE_CHANGE_EVENTID:
7544 		ath12k_rfkill_state_change_event(ab, skb);
7545 		break;
7546 	case WMI_TWT_ENABLE_EVENTID:
7547 		ath12k_wmi_twt_enable_event(ab, skb);
7548 		break;
7549 	case WMI_TWT_DISABLE_EVENTID:
7550 		ath12k_wmi_twt_disable_event(ab, skb);
7551 		break;
7552 	case WMI_P2P_NOA_EVENTID:
7553 		ath12k_wmi_p2p_noa_event(ab, skb);
7554 		break;
7555 	case WMI_PDEV_DFS_RADAR_DETECTION_EVENTID:
7556 		ath12k_wmi_pdev_dfs_radar_detected_event(ab, skb);
7557 		break;
7558 	case WMI_VDEV_DELETE_RESP_EVENTID:
7559 		ath12k_vdev_delete_resp_event(ab, skb);
7560 		break;
7561 	case WMI_DIAG_EVENTID:
7562 		ath12k_wmi_diag_event(ab, skb);
7563 		break;
7564 	case WMI_WOW_WAKEUP_HOST_EVENTID:
7565 		ath12k_wmi_event_wow_wakeup_host(ab, skb);
7566 		break;
7567 	case WMI_GTK_OFFLOAD_STATUS_EVENTID:
7568 		ath12k_wmi_gtk_offload_status_event(ab, skb);
7569 		break;
7570 	case WMI_MLO_SETUP_COMPLETE_EVENTID:
7571 		ath12k_wmi_event_mlo_setup_complete(ab, skb);
7572 		break;
7573 	case WMI_MLO_TEARDOWN_COMPLETE_EVENTID:
7574 		ath12k_wmi_event_teardown_complete(ab, skb);
7575 		break;
7576 	/* add Unsupported events (rare) here */
7577 	case WMI_TBTTOFFSET_EXT_UPDATE_EVENTID:
7578 	case WMI_PEER_OPER_MODE_CHANGE_EVENTID:
7579 	case WMI_PDEV_DMA_RING_CFG_RSP_EVENTID:
7580 		ath12k_dbg(ab, ATH12K_DBG_WMI,
7581 			   "ignoring unsupported event 0x%x\n", id);
7582 		break;
7583 	/* add Unsupported events (frequent) here */
7584 	case WMI_PDEV_GET_HALPHY_CAL_STATUS_EVENTID:
7585 	case WMI_MGMT_RX_FW_CONSUMED_EVENTID:
7586 	case WMI_OBSS_COLOR_COLLISION_DETECTION_EVENTID:
7587 		/* debug might flood hence silently ignore (no-op) */
7588 		break;
7589 	/* TODO: Add remaining events */
7590 	default:
7591 		ath12k_dbg(ab, ATH12K_DBG_WMI, "Unknown eventid: 0x%x\n", id);
7592 		break;
7593 	}
7594 
7595 out:
7596 	dev_kfree_skb(skb);
7597 }
7598 
ath12k_connect_pdev_htc_service(struct ath12k_base * ab,u32 pdev_idx)7599 static int ath12k_connect_pdev_htc_service(struct ath12k_base *ab,
7600 					   u32 pdev_idx)
7601 {
7602 	int status;
7603 	static const u32 svc_id[] = {
7604 		ATH12K_HTC_SVC_ID_WMI_CONTROL,
7605 		ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC1,
7606 		ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC2
7607 	};
7608 	struct ath12k_htc_svc_conn_req conn_req = {};
7609 	struct ath12k_htc_svc_conn_resp conn_resp = {};
7610 
7611 	/* these fields are the same for all service endpoints */
7612 	conn_req.ep_ops.ep_tx_complete = ath12k_wmi_htc_tx_complete;
7613 	conn_req.ep_ops.ep_rx_complete = ath12k_wmi_op_rx;
7614 	conn_req.ep_ops.ep_tx_credits = ath12k_wmi_op_ep_tx_credits;
7615 
7616 	/* connect to control service */
7617 	conn_req.service_id = svc_id[pdev_idx];
7618 
7619 	status = ath12k_htc_connect_service(&ab->htc, &conn_req, &conn_resp);
7620 	if (status) {
7621 		ath12k_warn(ab, "failed to connect to WMI CONTROL service status: %d\n",
7622 			    status);
7623 		return status;
7624 	}
7625 
7626 	ab->wmi_ab.wmi_endpoint_id[pdev_idx] = conn_resp.eid;
7627 	ab->wmi_ab.wmi[pdev_idx].eid = conn_resp.eid;
7628 	ab->wmi_ab.max_msg_len[pdev_idx] = conn_resp.max_msg_len;
7629 
7630 	return 0;
7631 }
7632 
7633 static int
ath12k_wmi_send_unit_test_cmd(struct ath12k * ar,struct wmi_unit_test_cmd ut_cmd,u32 * test_args)7634 ath12k_wmi_send_unit_test_cmd(struct ath12k *ar,
7635 			      struct wmi_unit_test_cmd ut_cmd,
7636 			      u32 *test_args)
7637 {
7638 	struct ath12k_wmi_pdev *wmi = ar->wmi;
7639 	struct wmi_unit_test_cmd *cmd;
7640 	struct sk_buff *skb;
7641 	struct wmi_tlv *tlv;
7642 	void *ptr;
7643 	u32 *ut_cmd_args;
7644 	int buf_len, arg_len;
7645 	int ret;
7646 	int i;
7647 
7648 	arg_len = sizeof(u32) * le32_to_cpu(ut_cmd.num_args);
7649 	buf_len = sizeof(ut_cmd) + arg_len + TLV_HDR_SIZE;
7650 
7651 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len);
7652 	if (!skb)
7653 		return -ENOMEM;
7654 
7655 	cmd = (struct wmi_unit_test_cmd *)skb->data;
7656 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_UNIT_TEST_CMD,
7657 						 sizeof(ut_cmd));
7658 
7659 	cmd->vdev_id = ut_cmd.vdev_id;
7660 	cmd->module_id = ut_cmd.module_id;
7661 	cmd->num_args = ut_cmd.num_args;
7662 	cmd->diag_token = ut_cmd.diag_token;
7663 
7664 	ptr = skb->data + sizeof(ut_cmd);
7665 
7666 	tlv = ptr;
7667 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, arg_len);
7668 
7669 	ptr += TLV_HDR_SIZE;
7670 
7671 	ut_cmd_args = ptr;
7672 	for (i = 0; i < le32_to_cpu(ut_cmd.num_args); i++)
7673 		ut_cmd_args[i] = test_args[i];
7674 
7675 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
7676 		   "WMI unit test : module %d vdev %d n_args %d token %d\n",
7677 		   cmd->module_id, cmd->vdev_id, cmd->num_args,
7678 		   cmd->diag_token);
7679 
7680 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_UNIT_TEST_CMDID);
7681 
7682 	if (ret) {
7683 		ath12k_warn(ar->ab, "failed to send WMI_UNIT_TEST CMD :%d\n",
7684 			    ret);
7685 		dev_kfree_skb(skb);
7686 	}
7687 
7688 	return ret;
7689 }
7690 
ath12k_wmi_simulate_radar(struct ath12k * ar)7691 int ath12k_wmi_simulate_radar(struct ath12k *ar)
7692 {
7693 	struct ath12k_link_vif *arvif;
7694 	u32 dfs_args[DFS_MAX_TEST_ARGS];
7695 	struct wmi_unit_test_cmd wmi_ut;
7696 	bool arvif_found = false;
7697 
7698 	list_for_each_entry(arvif, &ar->arvifs, list) {
7699 		if (arvif->is_started && arvif->ahvif->vdev_type == WMI_VDEV_TYPE_AP) {
7700 			arvif_found = true;
7701 			break;
7702 		}
7703 	}
7704 
7705 	if (!arvif_found)
7706 		return -EINVAL;
7707 
7708 	dfs_args[DFS_TEST_CMDID] = 0;
7709 	dfs_args[DFS_TEST_PDEV_ID] = ar->pdev->pdev_id;
7710 	/* Currently we could pass segment_id(b0 - b1), chirp(b2)
7711 	 * freq offset (b3 - b10) to unit test. For simulation
7712 	 * purpose this can be set to 0 which is valid.
7713 	 */
7714 	dfs_args[DFS_TEST_RADAR_PARAM] = 0;
7715 
7716 	wmi_ut.vdev_id = cpu_to_le32(arvif->vdev_id);
7717 	wmi_ut.module_id = cpu_to_le32(DFS_UNIT_TEST_MODULE);
7718 	wmi_ut.num_args = cpu_to_le32(DFS_MAX_TEST_ARGS);
7719 	wmi_ut.diag_token = cpu_to_le32(DFS_UNIT_TEST_TOKEN);
7720 
7721 	ath12k_dbg(ar->ab, ATH12K_DBG_REG, "Triggering Radar Simulation\n");
7722 
7723 	return ath12k_wmi_send_unit_test_cmd(ar, wmi_ut, dfs_args);
7724 }
7725 
ath12k_wmi_connect(struct ath12k_base * ab)7726 int ath12k_wmi_connect(struct ath12k_base *ab)
7727 {
7728 	u32 i;
7729 	u8 wmi_ep_count;
7730 
7731 	wmi_ep_count = ab->htc.wmi_ep_count;
7732 	if (wmi_ep_count > ab->hw_params->max_radios)
7733 		return -1;
7734 
7735 	for (i = 0; i < wmi_ep_count; i++)
7736 		ath12k_connect_pdev_htc_service(ab, i);
7737 
7738 	return 0;
7739 }
7740 
ath12k_wmi_pdev_detach(struct ath12k_base * ab,u8 pdev_id)7741 static void ath12k_wmi_pdev_detach(struct ath12k_base *ab, u8 pdev_id)
7742 {
7743 	if (WARN_ON(pdev_id >= MAX_RADIOS))
7744 		return;
7745 
7746 	/* TODO: Deinit any pdev specific wmi resource */
7747 }
7748 
ath12k_wmi_pdev_attach(struct ath12k_base * ab,u8 pdev_id)7749 int ath12k_wmi_pdev_attach(struct ath12k_base *ab,
7750 			   u8 pdev_id)
7751 {
7752 	struct ath12k_wmi_pdev *wmi_handle;
7753 
7754 	if (pdev_id >= ab->hw_params->max_radios)
7755 		return -EINVAL;
7756 
7757 	wmi_handle = &ab->wmi_ab.wmi[pdev_id];
7758 
7759 	wmi_handle->wmi_ab = &ab->wmi_ab;
7760 
7761 	ab->wmi_ab.ab = ab;
7762 	/* TODO: Init remaining resource specific to pdev */
7763 
7764 	return 0;
7765 }
7766 
ath12k_wmi_attach(struct ath12k_base * ab)7767 int ath12k_wmi_attach(struct ath12k_base *ab)
7768 {
7769 	int ret;
7770 
7771 	ret = ath12k_wmi_pdev_attach(ab, 0);
7772 	if (ret)
7773 		return ret;
7774 
7775 	ab->wmi_ab.ab = ab;
7776 	ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_MAX;
7777 
7778 	/* It's overwritten when service_ext_ready is handled */
7779 	if (ab->hw_params->single_pdev_only)
7780 		ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_SINGLE;
7781 
7782 	/* TODO: Init remaining wmi soc resources required */
7783 	init_completion(&ab->wmi_ab.service_ready);
7784 	init_completion(&ab->wmi_ab.unified_ready);
7785 
7786 	return 0;
7787 }
7788 
ath12k_wmi_detach(struct ath12k_base * ab)7789 void ath12k_wmi_detach(struct ath12k_base *ab)
7790 {
7791 	int i;
7792 
7793 	/* TODO: Deinit wmi resource specific to SOC as required */
7794 
7795 	for (i = 0; i < ab->htc.wmi_ep_count; i++)
7796 		ath12k_wmi_pdev_detach(ab, i);
7797 
7798 	ath12k_wmi_free_dbring_caps(ab);
7799 }
7800 
ath12k_wmi_hw_data_filter_cmd(struct ath12k * ar,struct wmi_hw_data_filter_arg * arg)7801 int ath12k_wmi_hw_data_filter_cmd(struct ath12k *ar, struct wmi_hw_data_filter_arg *arg)
7802 {
7803 	struct wmi_hw_data_filter_cmd *cmd;
7804 	struct sk_buff *skb;
7805 	int len;
7806 
7807 	len = sizeof(*cmd);
7808 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
7809 
7810 	if (!skb)
7811 		return -ENOMEM;
7812 
7813 	cmd = (struct wmi_hw_data_filter_cmd *)skb->data;
7814 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HW_DATA_FILTER_CMD,
7815 						 sizeof(*cmd));
7816 	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
7817 	cmd->enable = cpu_to_le32(arg->enable ? 1 : 0);
7818 
7819 	/* Set all modes in case of disable */
7820 	if (arg->enable)
7821 		cmd->hw_filter_bitmap = cpu_to_le32(arg->hw_filter_bitmap);
7822 	else
7823 		cmd->hw_filter_bitmap = cpu_to_le32((u32)~0U);
7824 
7825 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
7826 		   "wmi hw data filter enable %d filter_bitmap 0x%x\n",
7827 		   arg->enable, arg->hw_filter_bitmap);
7828 
7829 	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_HW_DATA_FILTER_CMDID);
7830 }
7831 
ath12k_wmi_wow_host_wakeup_ind(struct ath12k * ar)7832 int ath12k_wmi_wow_host_wakeup_ind(struct ath12k *ar)
7833 {
7834 	struct wmi_wow_host_wakeup_cmd *cmd;
7835 	struct sk_buff *skb;
7836 	size_t len;
7837 
7838 	len = sizeof(*cmd);
7839 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
7840 	if (!skb)
7841 		return -ENOMEM;
7842 
7843 	cmd = (struct wmi_wow_host_wakeup_cmd *)skb->data;
7844 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD,
7845 						 sizeof(*cmd));
7846 
7847 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow host wakeup ind\n");
7848 
7849 	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID);
7850 }
7851 
ath12k_wmi_wow_enable(struct ath12k * ar)7852 int ath12k_wmi_wow_enable(struct ath12k *ar)
7853 {
7854 	struct wmi_wow_enable_cmd *cmd;
7855 	struct sk_buff *skb;
7856 	int len;
7857 
7858 	len = sizeof(*cmd);
7859 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
7860 	if (!skb)
7861 		return -ENOMEM;
7862 
7863 	cmd = (struct wmi_wow_enable_cmd *)skb->data;
7864 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ENABLE_CMD,
7865 						 sizeof(*cmd));
7866 
7867 	cmd->enable = cpu_to_le32(1);
7868 	cmd->pause_iface_config = cpu_to_le32(WOW_IFACE_PAUSE_ENABLED);
7869 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow enable\n");
7870 
7871 	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ENABLE_CMDID);
7872 }
7873 
ath12k_wmi_wow_add_wakeup_event(struct ath12k * ar,u32 vdev_id,enum wmi_wow_wakeup_event event,u32 enable)7874 int ath12k_wmi_wow_add_wakeup_event(struct ath12k *ar, u32 vdev_id,
7875 				    enum wmi_wow_wakeup_event event,
7876 				    u32 enable)
7877 {
7878 	struct wmi_wow_add_del_event_cmd *cmd;
7879 	struct sk_buff *skb;
7880 	size_t len;
7881 
7882 	len = sizeof(*cmd);
7883 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
7884 	if (!skb)
7885 		return -ENOMEM;
7886 
7887 	cmd = (struct wmi_wow_add_del_event_cmd *)skb->data;
7888 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ADD_DEL_EVT_CMD,
7889 						 sizeof(*cmd));
7890 	cmd->vdev_id = cpu_to_le32(vdev_id);
7891 	cmd->is_add = cpu_to_le32(enable);
7892 	cmd->event_bitmap = cpu_to_le32((1 << event));
7893 
7894 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow add wakeup event %s enable %d vdev_id %d\n",
7895 		   wow_wakeup_event(event), enable, vdev_id);
7896 
7897 	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID);
7898 }
7899 
ath12k_wmi_wow_add_pattern(struct ath12k * ar,u32 vdev_id,u32 pattern_id,const u8 * pattern,const u8 * mask,int pattern_len,int pattern_offset)7900 int ath12k_wmi_wow_add_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id,
7901 			       const u8 *pattern, const u8 *mask,
7902 			       int pattern_len, int pattern_offset)
7903 {
7904 	struct wmi_wow_add_pattern_cmd *cmd;
7905 	struct wmi_wow_bitmap_pattern_params *bitmap;
7906 	struct wmi_tlv *tlv;
7907 	struct sk_buff *skb;
7908 	void *ptr;
7909 	size_t len;
7910 
7911 	len = sizeof(*cmd) +
7912 	      sizeof(*tlv) +			/* array struct */
7913 	      sizeof(*bitmap) +			/* bitmap */
7914 	      sizeof(*tlv) +			/* empty ipv4 sync */
7915 	      sizeof(*tlv) +			/* empty ipv6 sync */
7916 	      sizeof(*tlv) +			/* empty magic */
7917 	      sizeof(*tlv) +			/* empty info timeout */
7918 	      sizeof(*tlv) + sizeof(u32);	/* ratelimit interval */
7919 
7920 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
7921 	if (!skb)
7922 		return -ENOMEM;
7923 
7924 	/* cmd */
7925 	ptr = skb->data;
7926 	cmd = ptr;
7927 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ADD_PATTERN_CMD,
7928 						 sizeof(*cmd));
7929 	cmd->vdev_id = cpu_to_le32(vdev_id);
7930 	cmd->pattern_id = cpu_to_le32(pattern_id);
7931 	cmd->pattern_type = cpu_to_le32(WOW_BITMAP_PATTERN);
7932 
7933 	ptr += sizeof(*cmd);
7934 
7935 	/* bitmap */
7936 	tlv = ptr;
7937 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, sizeof(*bitmap));
7938 
7939 	ptr += sizeof(*tlv);
7940 
7941 	bitmap = ptr;
7942 	bitmap->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_BITMAP_PATTERN_T,
7943 						    sizeof(*bitmap));
7944 	memcpy(bitmap->patternbuf, pattern, pattern_len);
7945 	memcpy(bitmap->bitmaskbuf, mask, pattern_len);
7946 	bitmap->pattern_offset = cpu_to_le32(pattern_offset);
7947 	bitmap->pattern_len = cpu_to_le32(pattern_len);
7948 	bitmap->bitmask_len = cpu_to_le32(pattern_len);
7949 	bitmap->pattern_id = cpu_to_le32(pattern_id);
7950 
7951 	ptr += sizeof(*bitmap);
7952 
7953 	/* ipv4 sync */
7954 	tlv = ptr;
7955 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
7956 
7957 	ptr += sizeof(*tlv);
7958 
7959 	/* ipv6 sync */
7960 	tlv = ptr;
7961 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
7962 
7963 	ptr += sizeof(*tlv);
7964 
7965 	/* magic */
7966 	tlv = ptr;
7967 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
7968 
7969 	ptr += sizeof(*tlv);
7970 
7971 	/* pattern info timeout */
7972 	tlv = ptr;
7973 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0);
7974 
7975 	ptr += sizeof(*tlv);
7976 
7977 	/* ratelimit interval */
7978 	tlv = ptr;
7979 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, sizeof(u32));
7980 
7981 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow add pattern vdev_id %d pattern_id %d pattern_offset %d pattern_len %d\n",
7982 		   vdev_id, pattern_id, pattern_offset, pattern_len);
7983 
7984 	ath12k_dbg_dump(ar->ab, ATH12K_DBG_WMI, NULL, "wow pattern: ",
7985 			bitmap->patternbuf, pattern_len);
7986 	ath12k_dbg_dump(ar->ab, ATH12K_DBG_WMI, NULL, "wow bitmask: ",
7987 			bitmap->bitmaskbuf, pattern_len);
7988 
7989 	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ADD_WAKE_PATTERN_CMDID);
7990 }
7991 
ath12k_wmi_wow_del_pattern(struct ath12k * ar,u32 vdev_id,u32 pattern_id)7992 int ath12k_wmi_wow_del_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id)
7993 {
7994 	struct wmi_wow_del_pattern_cmd *cmd;
7995 	struct sk_buff *skb;
7996 	size_t len;
7997 
7998 	len = sizeof(*cmd);
7999 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
8000 	if (!skb)
8001 		return -ENOMEM;
8002 
8003 	cmd = (struct wmi_wow_del_pattern_cmd *)skb->data;
8004 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_DEL_PATTERN_CMD,
8005 						 sizeof(*cmd));
8006 	cmd->vdev_id = cpu_to_le32(vdev_id);
8007 	cmd->pattern_id = cpu_to_le32(pattern_id);
8008 	cmd->pattern_type = cpu_to_le32(WOW_BITMAP_PATTERN);
8009 
8010 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow del pattern vdev_id %d pattern_id %d\n",
8011 		   vdev_id, pattern_id);
8012 
8013 	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_DEL_WAKE_PATTERN_CMDID);
8014 }
8015 
8016 static struct sk_buff *
ath12k_wmi_op_gen_config_pno_start(struct ath12k * ar,u32 vdev_id,struct wmi_pno_scan_req_arg * pno)8017 ath12k_wmi_op_gen_config_pno_start(struct ath12k *ar, u32 vdev_id,
8018 				   struct wmi_pno_scan_req_arg *pno)
8019 {
8020 	struct nlo_configured_params *nlo_list;
8021 	size_t len, nlo_list_len, channel_list_len;
8022 	struct wmi_wow_nlo_config_cmd *cmd;
8023 	__le32 *channel_list;
8024 	struct wmi_tlv *tlv;
8025 	struct sk_buff *skb;
8026 	void *ptr;
8027 	u32 i;
8028 
8029 	len = sizeof(*cmd) +
8030 	      sizeof(*tlv) +
8031 	      /* TLV place holder for array of structures
8032 	       * nlo_configured_params(nlo_list)
8033 	       */
8034 	      sizeof(*tlv);
8035 	      /* TLV place holder for array of uint32 channel_list */
8036 
8037 	channel_list_len = sizeof(u32) * pno->a_networks[0].channel_count;
8038 	len += channel_list_len;
8039 
8040 	nlo_list_len = sizeof(*nlo_list) * pno->uc_networks_count;
8041 	len += nlo_list_len;
8042 
8043 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
8044 	if (!skb)
8045 		return ERR_PTR(-ENOMEM);
8046 
8047 	ptr = skb->data;
8048 	cmd = ptr;
8049 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NLO_CONFIG_CMD, sizeof(*cmd));
8050 
8051 	cmd->vdev_id = cpu_to_le32(pno->vdev_id);
8052 	cmd->flags = cpu_to_le32(WMI_NLO_CONFIG_START | WMI_NLO_CONFIG_SSID_HIDE_EN);
8053 
8054 	/* current FW does not support min-max range for dwell time */
8055 	cmd->active_dwell_time = cpu_to_le32(pno->active_max_time);
8056 	cmd->passive_dwell_time = cpu_to_le32(pno->passive_max_time);
8057 
8058 	if (pno->do_passive_scan)
8059 		cmd->flags |= cpu_to_le32(WMI_NLO_CONFIG_SCAN_PASSIVE);
8060 
8061 	cmd->fast_scan_period = cpu_to_le32(pno->fast_scan_period);
8062 	cmd->slow_scan_period = cpu_to_le32(pno->slow_scan_period);
8063 	cmd->fast_scan_max_cycles = cpu_to_le32(pno->fast_scan_max_cycles);
8064 	cmd->delay_start_time = cpu_to_le32(pno->delay_start_time);
8065 
8066 	if (pno->enable_pno_scan_randomization) {
8067 		cmd->flags |= cpu_to_le32(WMI_NLO_CONFIG_SPOOFED_MAC_IN_PROBE_REQ |
8068 					  WMI_NLO_CONFIG_RANDOM_SEQ_NO_IN_PROBE_REQ);
8069 		ether_addr_copy(cmd->mac_addr.addr, pno->mac_addr);
8070 		ether_addr_copy(cmd->mac_mask.addr, pno->mac_addr_mask);
8071 	}
8072 
8073 	ptr += sizeof(*cmd);
8074 
8075 	/* nlo_configured_params(nlo_list) */
8076 	cmd->no_of_ssids = cpu_to_le32(pno->uc_networks_count);
8077 	tlv = ptr;
8078 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, nlo_list_len);
8079 
8080 	ptr += sizeof(*tlv);
8081 	nlo_list = ptr;
8082 	for (i = 0; i < pno->uc_networks_count; i++) {
8083 		tlv = (struct wmi_tlv *)(&nlo_list[i].tlv_header);
8084 		tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_BYTE,
8085 						     sizeof(*nlo_list));
8086 
8087 		nlo_list[i].ssid.valid = cpu_to_le32(1);
8088 		nlo_list[i].ssid.ssid.ssid_len =
8089 			cpu_to_le32(pno->a_networks[i].ssid.ssid_len);
8090 		memcpy(nlo_list[i].ssid.ssid.ssid,
8091 		       pno->a_networks[i].ssid.ssid,
8092 		       le32_to_cpu(nlo_list[i].ssid.ssid.ssid_len));
8093 
8094 		if (pno->a_networks[i].rssi_threshold &&
8095 		    pno->a_networks[i].rssi_threshold > -300) {
8096 			nlo_list[i].rssi_cond.valid = cpu_to_le32(1);
8097 			nlo_list[i].rssi_cond.rssi =
8098 					cpu_to_le32(pno->a_networks[i].rssi_threshold);
8099 		}
8100 
8101 		nlo_list[i].bcast_nw_type.valid = cpu_to_le32(1);
8102 		nlo_list[i].bcast_nw_type.bcast_nw_type =
8103 					cpu_to_le32(pno->a_networks[i].bcast_nw_type);
8104 	}
8105 
8106 	ptr += nlo_list_len;
8107 	cmd->num_of_channels = cpu_to_le32(pno->a_networks[0].channel_count);
8108 	tlv = ptr;
8109 	tlv->header =  ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, channel_list_len);
8110 	ptr += sizeof(*tlv);
8111 	channel_list = ptr;
8112 
8113 	for (i = 0; i < pno->a_networks[0].channel_count; i++)
8114 		channel_list[i] = cpu_to_le32(pno->a_networks[0].channels[i]);
8115 
8116 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv start pno config vdev_id %d\n",
8117 		   vdev_id);
8118 
8119 	return skb;
8120 }
8121 
ath12k_wmi_op_gen_config_pno_stop(struct ath12k * ar,u32 vdev_id)8122 static struct sk_buff *ath12k_wmi_op_gen_config_pno_stop(struct ath12k *ar,
8123 							 u32 vdev_id)
8124 {
8125 	struct wmi_wow_nlo_config_cmd *cmd;
8126 	struct sk_buff *skb;
8127 	size_t len;
8128 
8129 	len = sizeof(*cmd);
8130 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
8131 	if (!skb)
8132 		return ERR_PTR(-ENOMEM);
8133 
8134 	cmd = (struct wmi_wow_nlo_config_cmd *)skb->data;
8135 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NLO_CONFIG_CMD, len);
8136 
8137 	cmd->vdev_id = cpu_to_le32(vdev_id);
8138 	cmd->flags = cpu_to_le32(WMI_NLO_CONFIG_STOP);
8139 
8140 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
8141 		   "wmi tlv stop pno config vdev_id %d\n", vdev_id);
8142 	return skb;
8143 }
8144 
ath12k_wmi_wow_config_pno(struct ath12k * ar,u32 vdev_id,struct wmi_pno_scan_req_arg * pno_scan)8145 int ath12k_wmi_wow_config_pno(struct ath12k *ar, u32 vdev_id,
8146 			      struct wmi_pno_scan_req_arg  *pno_scan)
8147 {
8148 	struct sk_buff *skb;
8149 
8150 	if (pno_scan->enable)
8151 		skb = ath12k_wmi_op_gen_config_pno_start(ar, vdev_id, pno_scan);
8152 	else
8153 		skb = ath12k_wmi_op_gen_config_pno_stop(ar, vdev_id);
8154 
8155 	if (IS_ERR_OR_NULL(skb))
8156 		return -ENOMEM;
8157 
8158 	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID);
8159 }
8160 
ath12k_wmi_fill_ns_offload(struct ath12k * ar,struct wmi_arp_ns_offload_arg * offload,void ** ptr,bool enable,bool ext)8161 static void ath12k_wmi_fill_ns_offload(struct ath12k *ar,
8162 				       struct wmi_arp_ns_offload_arg *offload,
8163 				       void **ptr,
8164 				       bool enable,
8165 				       bool ext)
8166 {
8167 	struct wmi_ns_offload_params *ns;
8168 	struct wmi_tlv *tlv;
8169 	void *buf_ptr = *ptr;
8170 	u32 ns_cnt, ns_ext_tuples;
8171 	int i, max_offloads;
8172 
8173 	ns_cnt = offload->ipv6_count;
8174 
8175 	tlv  = buf_ptr;
8176 
8177 	if (ext) {
8178 		ns_ext_tuples = offload->ipv6_count - WMI_MAX_NS_OFFLOADS;
8179 		tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
8180 						 ns_ext_tuples * sizeof(*ns));
8181 		i = WMI_MAX_NS_OFFLOADS;
8182 		max_offloads = offload->ipv6_count;
8183 	} else {
8184 		tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
8185 						 WMI_MAX_NS_OFFLOADS * sizeof(*ns));
8186 		i = 0;
8187 		max_offloads = WMI_MAX_NS_OFFLOADS;
8188 	}
8189 
8190 	buf_ptr += sizeof(*tlv);
8191 
8192 	for (; i < max_offloads; i++) {
8193 		ns = buf_ptr;
8194 		ns->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NS_OFFLOAD_TUPLE,
8195 							sizeof(*ns));
8196 
8197 		if (enable) {
8198 			if (i < ns_cnt)
8199 				ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_VALID);
8200 
8201 			memcpy(ns->target_ipaddr[0], offload->ipv6_addr[i], 16);
8202 			memcpy(ns->solicitation_ipaddr, offload->self_ipv6_addr[i], 16);
8203 
8204 			if (offload->ipv6_type[i])
8205 				ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_IS_IPV6_ANYCAST);
8206 
8207 			memcpy(ns->target_mac.addr, offload->mac_addr, ETH_ALEN);
8208 
8209 			if (!is_zero_ether_addr(ns->target_mac.addr))
8210 				ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_MAC_VALID);
8211 
8212 			ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
8213 				   "wmi index %d ns_solicited %pI6 target %pI6",
8214 				   i, ns->solicitation_ipaddr,
8215 				   ns->target_ipaddr[0]);
8216 		}
8217 
8218 		buf_ptr += sizeof(*ns);
8219 	}
8220 
8221 	*ptr = buf_ptr;
8222 }
8223 
ath12k_wmi_fill_arp_offload(struct ath12k * ar,struct wmi_arp_ns_offload_arg * offload,void ** ptr,bool enable)8224 static void ath12k_wmi_fill_arp_offload(struct ath12k *ar,
8225 					struct wmi_arp_ns_offload_arg *offload,
8226 					void **ptr,
8227 					bool enable)
8228 {
8229 	struct wmi_arp_offload_params *arp;
8230 	struct wmi_tlv *tlv;
8231 	void *buf_ptr = *ptr;
8232 	int i;
8233 
8234 	/* fill arp tuple */
8235 	tlv = buf_ptr;
8236 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
8237 					 WMI_MAX_ARP_OFFLOADS * sizeof(*arp));
8238 	buf_ptr += sizeof(*tlv);
8239 
8240 	for (i = 0; i < WMI_MAX_ARP_OFFLOADS; i++) {
8241 		arp = buf_ptr;
8242 		arp->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARP_OFFLOAD_TUPLE,
8243 							 sizeof(*arp));
8244 
8245 		if (enable && i < offload->ipv4_count) {
8246 			/* Copy the target ip addr and flags */
8247 			arp->flags = cpu_to_le32(WMI_ARPOL_FLAGS_VALID);
8248 			memcpy(arp->target_ipaddr, offload->ipv4_addr[i], 4);
8249 
8250 			ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi arp offload address %pI4",
8251 				   arp->target_ipaddr);
8252 		}
8253 
8254 		buf_ptr += sizeof(*arp);
8255 	}
8256 
8257 	*ptr = buf_ptr;
8258 }
8259 
ath12k_wmi_arp_ns_offload(struct ath12k * ar,struct ath12k_link_vif * arvif,struct wmi_arp_ns_offload_arg * offload,bool enable)8260 int ath12k_wmi_arp_ns_offload(struct ath12k *ar,
8261 			      struct ath12k_link_vif *arvif,
8262 			      struct wmi_arp_ns_offload_arg *offload,
8263 			      bool enable)
8264 {
8265 	struct wmi_set_arp_ns_offload_cmd *cmd;
8266 	struct wmi_tlv *tlv;
8267 	struct sk_buff *skb;
8268 	void *buf_ptr;
8269 	size_t len;
8270 	u8 ns_cnt, ns_ext_tuples = 0;
8271 
8272 	ns_cnt = offload->ipv6_count;
8273 
8274 	len = sizeof(*cmd) +
8275 	      sizeof(*tlv) +
8276 	      WMI_MAX_NS_OFFLOADS * sizeof(struct wmi_ns_offload_params) +
8277 	      sizeof(*tlv) +
8278 	      WMI_MAX_ARP_OFFLOADS * sizeof(struct wmi_arp_offload_params);
8279 
8280 	if (ns_cnt > WMI_MAX_NS_OFFLOADS) {
8281 		ns_ext_tuples = ns_cnt - WMI_MAX_NS_OFFLOADS;
8282 		len += sizeof(*tlv) +
8283 		       ns_ext_tuples * sizeof(struct wmi_ns_offload_params);
8284 	}
8285 
8286 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
8287 	if (!skb)
8288 		return -ENOMEM;
8289 
8290 	buf_ptr = skb->data;
8291 	cmd = buf_ptr;
8292 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_ARP_NS_OFFLOAD_CMD,
8293 						 sizeof(*cmd));
8294 	cmd->flags = cpu_to_le32(0);
8295 	cmd->vdev_id = cpu_to_le32(arvif->vdev_id);
8296 	cmd->num_ns_ext_tuples = cpu_to_le32(ns_ext_tuples);
8297 
8298 	buf_ptr += sizeof(*cmd);
8299 
8300 	ath12k_wmi_fill_ns_offload(ar, offload, &buf_ptr, enable, 0);
8301 	ath12k_wmi_fill_arp_offload(ar, offload, &buf_ptr, enable);
8302 
8303 	if (ns_ext_tuples)
8304 		ath12k_wmi_fill_ns_offload(ar, offload, &buf_ptr, enable, 1);
8305 
8306 	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_SET_ARP_NS_OFFLOAD_CMDID);
8307 }
8308 
ath12k_wmi_gtk_rekey_offload(struct ath12k * ar,struct ath12k_link_vif * arvif,bool enable)8309 int ath12k_wmi_gtk_rekey_offload(struct ath12k *ar,
8310 				 struct ath12k_link_vif *arvif, bool enable)
8311 {
8312 	struct ath12k_rekey_data *rekey_data = &arvif->rekey_data;
8313 	struct wmi_gtk_rekey_offload_cmd *cmd;
8314 	struct sk_buff *skb;
8315 	__le64 replay_ctr;
8316 	int len;
8317 
8318 	len = sizeof(*cmd);
8319 	skb =  ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
8320 	if (!skb)
8321 		return -ENOMEM;
8322 
8323 	cmd = (struct wmi_gtk_rekey_offload_cmd *)skb->data;
8324 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_GTK_OFFLOAD_CMD, sizeof(*cmd));
8325 	cmd->vdev_id = cpu_to_le32(arvif->vdev_id);
8326 
8327 	if (enable) {
8328 		cmd->flags = cpu_to_le32(GTK_OFFLOAD_ENABLE_OPCODE);
8329 
8330 		/* the length in rekey_data and cmd is equal */
8331 		memcpy(cmd->kck, rekey_data->kck, sizeof(cmd->kck));
8332 		memcpy(cmd->kek, rekey_data->kek, sizeof(cmd->kek));
8333 
8334 		replay_ctr = cpu_to_le64(rekey_data->replay_ctr);
8335 		memcpy(cmd->replay_ctr, &replay_ctr,
8336 		       sizeof(replay_ctr));
8337 	} else {
8338 		cmd->flags = cpu_to_le32(GTK_OFFLOAD_DISABLE_OPCODE);
8339 	}
8340 
8341 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "offload gtk rekey vdev: %d %d\n",
8342 		   arvif->vdev_id, enable);
8343 	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_GTK_OFFLOAD_CMDID);
8344 }
8345 
ath12k_wmi_gtk_rekey_getinfo(struct ath12k * ar,struct ath12k_link_vif * arvif)8346 int ath12k_wmi_gtk_rekey_getinfo(struct ath12k *ar,
8347 				 struct ath12k_link_vif *arvif)
8348 {
8349 	struct wmi_gtk_rekey_offload_cmd *cmd;
8350 	struct sk_buff *skb;
8351 	int len;
8352 
8353 	len = sizeof(*cmd);
8354 	skb =  ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
8355 	if (!skb)
8356 		return -ENOMEM;
8357 
8358 	cmd = (struct wmi_gtk_rekey_offload_cmd *)skb->data;
8359 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_GTK_OFFLOAD_CMD, sizeof(*cmd));
8360 	cmd->vdev_id = cpu_to_le32(arvif->vdev_id);
8361 	cmd->flags = cpu_to_le32(GTK_OFFLOAD_REQUEST_STATUS_OPCODE);
8362 
8363 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "get gtk rekey vdev_id: %d\n",
8364 		   arvif->vdev_id);
8365 	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_GTK_OFFLOAD_CMDID);
8366 }
8367 
ath12k_wmi_sta_keepalive(struct ath12k * ar,const struct wmi_sta_keepalive_arg * arg)8368 int ath12k_wmi_sta_keepalive(struct ath12k *ar,
8369 			     const struct wmi_sta_keepalive_arg *arg)
8370 {
8371 	struct wmi_sta_keepalive_arp_resp_params *arp;
8372 	struct ath12k_wmi_pdev *wmi = ar->wmi;
8373 	struct wmi_sta_keepalive_cmd *cmd;
8374 	struct sk_buff *skb;
8375 	size_t len;
8376 
8377 	len = sizeof(*cmd) + sizeof(*arp);
8378 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
8379 	if (!skb)
8380 		return -ENOMEM;
8381 
8382 	cmd = (struct wmi_sta_keepalive_cmd *)skb->data;
8383 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_KEEPALIVE_CMD, sizeof(*cmd));
8384 	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
8385 	cmd->enabled = cpu_to_le32(arg->enabled);
8386 	cmd->interval = cpu_to_le32(arg->interval);
8387 	cmd->method = cpu_to_le32(arg->method);
8388 
8389 	arp = (struct wmi_sta_keepalive_arp_resp_params *)(cmd + 1);
8390 	arp->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_KEEPALVE_ARP_RESPONSE,
8391 						 sizeof(*arp));
8392 	if (arg->method == WMI_STA_KEEPALIVE_METHOD_UNSOLICITED_ARP_RESPONSE ||
8393 	    arg->method == WMI_STA_KEEPALIVE_METHOD_GRATUITOUS_ARP_REQUEST) {
8394 		arp->src_ip4_addr = cpu_to_le32(arg->src_ip4_addr);
8395 		arp->dest_ip4_addr = cpu_to_le32(arg->dest_ip4_addr);
8396 		ether_addr_copy(arp->dest_mac_addr.addr, arg->dest_mac_addr);
8397 	}
8398 
8399 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
8400 		   "wmi sta keepalive vdev %d enabled %d method %d interval %d\n",
8401 		   arg->vdev_id, arg->enabled, arg->method, arg->interval);
8402 
8403 	return ath12k_wmi_cmd_send(wmi, skb, WMI_STA_KEEPALIVE_CMDID);
8404 }
8405 
ath12k_wmi_mlo_setup(struct ath12k * ar,struct wmi_mlo_setup_arg * mlo_params)8406 int ath12k_wmi_mlo_setup(struct ath12k *ar, struct wmi_mlo_setup_arg *mlo_params)
8407 {
8408 	struct wmi_mlo_setup_cmd *cmd;
8409 	struct ath12k_wmi_pdev *wmi = ar->wmi;
8410 	u32 *partner_links, num_links;
8411 	int i, ret, buf_len, arg_len;
8412 	struct sk_buff *skb;
8413 	struct wmi_tlv *tlv;
8414 	void *ptr;
8415 
8416 	num_links = mlo_params->num_partner_links;
8417 	arg_len = num_links * sizeof(u32);
8418 	buf_len = sizeof(*cmd) + TLV_HDR_SIZE + arg_len;
8419 
8420 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len);
8421 	if (!skb)
8422 		return -ENOMEM;
8423 
8424 	cmd = (struct wmi_mlo_setup_cmd *)skb->data;
8425 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_SETUP_CMD,
8426 						 sizeof(*cmd));
8427 	cmd->mld_group_id = mlo_params->group_id;
8428 	cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
8429 	ptr = skb->data + sizeof(*cmd);
8430 
8431 	tlv = ptr;
8432 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, arg_len);
8433 	ptr += TLV_HDR_SIZE;
8434 
8435 	partner_links = ptr;
8436 	for (i = 0; i < num_links; i++)
8437 		partner_links[i] = mlo_params->partner_link_id[i];
8438 
8439 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MLO_SETUP_CMDID);
8440 	if (ret) {
8441 		ath12k_warn(ar->ab, "failed to submit WMI_MLO_SETUP_CMDID command: %d\n",
8442 			    ret);
8443 		dev_kfree_skb(skb);
8444 		return ret;
8445 	}
8446 
8447 	return 0;
8448 }
8449 
ath12k_wmi_mlo_ready(struct ath12k * ar)8450 int ath12k_wmi_mlo_ready(struct ath12k *ar)
8451 {
8452 	struct wmi_mlo_ready_cmd *cmd;
8453 	struct ath12k_wmi_pdev *wmi = ar->wmi;
8454 	struct sk_buff *skb;
8455 	int ret, len;
8456 
8457 	len = sizeof(*cmd);
8458 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
8459 	if (!skb)
8460 		return -ENOMEM;
8461 
8462 	cmd = (struct wmi_mlo_ready_cmd *)skb->data;
8463 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_READY_CMD,
8464 						 sizeof(*cmd));
8465 	cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
8466 
8467 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MLO_READY_CMDID);
8468 	if (ret) {
8469 		ath12k_warn(ar->ab, "failed to submit WMI_MLO_READY_CMDID command: %d\n",
8470 			    ret);
8471 		dev_kfree_skb(skb);
8472 		return ret;
8473 	}
8474 
8475 	return 0;
8476 }
8477 
ath12k_wmi_mlo_teardown(struct ath12k * ar)8478 int ath12k_wmi_mlo_teardown(struct ath12k *ar)
8479 {
8480 	struct wmi_mlo_teardown_cmd *cmd;
8481 	struct ath12k_wmi_pdev *wmi = ar->wmi;
8482 	struct sk_buff *skb;
8483 	int ret, len;
8484 
8485 	len = sizeof(*cmd);
8486 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
8487 	if (!skb)
8488 		return -ENOMEM;
8489 
8490 	cmd = (struct wmi_mlo_teardown_cmd *)skb->data;
8491 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_TEARDOWN_CMD,
8492 						 sizeof(*cmd));
8493 	cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
8494 	cmd->reason_code = WMI_MLO_TEARDOWN_SSR_REASON;
8495 
8496 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MLO_TEARDOWN_CMDID);
8497 	if (ret) {
8498 		ath12k_warn(ar->ab, "failed to submit WMI MLO teardown command: %d\n",
8499 			    ret);
8500 		dev_kfree_skb(skb);
8501 		return ret;
8502 	}
8503 
8504 	return 0;
8505 }
8506