1 // SPDX-License-Identifier: ISC
2 /*
3 * Copyright (C) 2022 MediaTek Inc.
4 */
5
6 #include <linux/firmware.h>
7 #include <linux/fs.h>
8 #include "mt7996.h"
9 #include "mcu.h"
10 #include "mac.h"
11 #include "eeprom.h"
12
13 #define fw_name(_dev, name, ...) ({ \
14 char *_fw; \
15 switch (mt76_chip(&(_dev)->mt76)) { \
16 case 0x7992: \
17 switch ((_dev)->var.type) { \
18 case MT7992_VAR_TYPE_23: \
19 _fw = MT7992_##name##_23; \
20 break; \
21 default: \
22 _fw = MT7992_##name; \
23 } \
24 break; \
25 case 0x7990: \
26 default: \
27 switch ((_dev)->var.type) { \
28 case MT7996_VAR_TYPE_233: \
29 _fw = MT7996_##name##_233; \
30 break; \
31 default: \
32 _fw = MT7996_##name; \
33 } \
34 break; \
35 } \
36 _fw; \
37 })
38
39 struct mt7996_patch_hdr {
40 char build_date[16];
41 char platform[4];
42 __be32 hw_sw_ver;
43 __be32 patch_ver;
44 __be16 checksum;
45 u16 reserved;
46 struct {
47 __be32 patch_ver;
48 __be32 subsys;
49 __be32 feature;
50 __be32 n_region;
51 __be32 crc;
52 u32 reserved[11];
53 } desc;
54 } __packed;
55
56 struct mt7996_patch_sec {
57 __be32 type;
58 __be32 offs;
59 __be32 size;
60 union {
61 __be32 spec[13];
62 struct {
63 __be32 addr;
64 __be32 len;
65 __be32 sec_key_idx;
66 __be32 align_len;
67 u32 reserved[9];
68 } info;
69 };
70 } __packed;
71
72 struct mt7996_fw_trailer {
73 u8 chip_id;
74 u8 eco_code;
75 u8 n_region;
76 u8 format_ver;
77 u8 format_flag;
78 u8 reserved[2];
79 char fw_ver[10];
80 char build_date[15];
81 u32 crc;
82 } __packed;
83
84 struct mt7996_fw_region {
85 __le32 decomp_crc;
86 __le32 decomp_len;
87 __le32 decomp_blk_sz;
88 u8 reserved[4];
89 __le32 addr;
90 __le32 len;
91 u8 feature_set;
92 u8 reserved1[15];
93 } __packed;
94
95 #define MCU_PATCH_ADDRESS 0x200000
96
97 #define HE_PHY(p, c) u8_get_bits(c, IEEE80211_HE_PHY_##p)
98 #define HE_MAC(m, c) u8_get_bits(c, IEEE80211_HE_MAC_##m)
99 #define EHT_PHY(p, c) u8_get_bits(c, IEEE80211_EHT_PHY_##p)
100
101 static bool sr_scene_detect = true;
102 module_param(sr_scene_detect, bool, 0644);
103 MODULE_PARM_DESC(sr_scene_detect, "Enable firmware scene detection algorithm");
104
105 static u8
mt7996_mcu_get_sta_nss(u16 mcs_map)106 mt7996_mcu_get_sta_nss(u16 mcs_map)
107 {
108 u8 nss;
109
110 for (nss = 8; nss > 0; nss--) {
111 u8 nss_mcs = (mcs_map >> (2 * (nss - 1))) & 3;
112
113 if (nss_mcs != IEEE80211_VHT_MCS_NOT_SUPPORTED)
114 break;
115 }
116
117 return nss - 1;
118 }
119
120 static void
mt7996_mcu_set_sta_he_mcs(struct ieee80211_sta * sta,__le16 * he_mcs,u16 mcs_map)121 mt7996_mcu_set_sta_he_mcs(struct ieee80211_sta *sta, __le16 *he_mcs,
122 u16 mcs_map)
123 {
124 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv;
125 enum nl80211_band band = msta->vif->deflink.phy->mt76->chandef.chan->band;
126 const u16 *mask = msta->vif->deflink.bitrate_mask.control[band].he_mcs;
127 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss;
128
129 for (nss = 0; nss < max_nss; nss++) {
130 int mcs;
131
132 switch ((mcs_map >> (2 * nss)) & 0x3) {
133 case IEEE80211_HE_MCS_SUPPORT_0_11:
134 mcs = GENMASK(11, 0);
135 break;
136 case IEEE80211_HE_MCS_SUPPORT_0_9:
137 mcs = GENMASK(9, 0);
138 break;
139 case IEEE80211_HE_MCS_SUPPORT_0_7:
140 mcs = GENMASK(7, 0);
141 break;
142 default:
143 mcs = 0;
144 }
145
146 mcs = mcs ? fls(mcs & mask[nss]) - 1 : -1;
147
148 switch (mcs) {
149 case 0 ... 7:
150 mcs = IEEE80211_HE_MCS_SUPPORT_0_7;
151 break;
152 case 8 ... 9:
153 mcs = IEEE80211_HE_MCS_SUPPORT_0_9;
154 break;
155 case 10 ... 11:
156 mcs = IEEE80211_HE_MCS_SUPPORT_0_11;
157 break;
158 default:
159 mcs = IEEE80211_HE_MCS_NOT_SUPPORTED;
160 break;
161 }
162 mcs_map &= ~(0x3 << (nss * 2));
163 mcs_map |= mcs << (nss * 2);
164 }
165
166 *he_mcs = cpu_to_le16(mcs_map);
167 }
168
169 static void
mt7996_mcu_set_sta_vht_mcs(struct ieee80211_sta * sta,__le16 * vht_mcs,const u16 * mask)170 mt7996_mcu_set_sta_vht_mcs(struct ieee80211_sta *sta, __le16 *vht_mcs,
171 const u16 *mask)
172 {
173 u16 mcs, mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map);
174 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss;
175
176 for (nss = 0; nss < max_nss; nss++, mcs_map >>= 2) {
177 switch (mcs_map & 0x3) {
178 case IEEE80211_VHT_MCS_SUPPORT_0_9:
179 mcs = GENMASK(9, 0);
180 break;
181 case IEEE80211_VHT_MCS_SUPPORT_0_8:
182 mcs = GENMASK(8, 0);
183 break;
184 case IEEE80211_VHT_MCS_SUPPORT_0_7:
185 mcs = GENMASK(7, 0);
186 break;
187 default:
188 mcs = 0;
189 }
190
191 vht_mcs[nss] = cpu_to_le16(mcs & mask[nss]);
192 }
193 }
194
195 static void
mt7996_mcu_set_sta_ht_mcs(struct ieee80211_sta * sta,u8 * ht_mcs,const u8 * mask)196 mt7996_mcu_set_sta_ht_mcs(struct ieee80211_sta *sta, u8 *ht_mcs,
197 const u8 *mask)
198 {
199 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss;
200
201 for (nss = 0; nss < max_nss; nss++)
202 ht_mcs[nss] = sta->deflink.ht_cap.mcs.rx_mask[nss] & mask[nss];
203 }
204
205 static int
mt7996_mcu_parse_response(struct mt76_dev * mdev,int cmd,struct sk_buff * skb,int seq)206 mt7996_mcu_parse_response(struct mt76_dev *mdev, int cmd,
207 struct sk_buff *skb, int seq)
208 {
209 struct mt7996_mcu_rxd *rxd;
210 struct mt7996_mcu_uni_event *event;
211 int mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd);
212 int ret = 0;
213
214 if (!skb) {
215 dev_err(mdev->dev, "Message %08x (seq %d) timeout\n",
216 cmd, seq);
217 return -ETIMEDOUT;
218 }
219
220 rxd = (struct mt7996_mcu_rxd *)skb->data;
221 if (seq != rxd->seq)
222 return -EAGAIN;
223
224 if (cmd == MCU_CMD(PATCH_SEM_CONTROL)) {
225 skb_pull(skb, sizeof(*rxd) - 4);
226 ret = *skb->data;
227 } else if ((rxd->option & MCU_UNI_CMD_EVENT) &&
228 rxd->eid == MCU_UNI_EVENT_RESULT) {
229 skb_pull(skb, sizeof(*rxd));
230 event = (struct mt7996_mcu_uni_event *)skb->data;
231 ret = le32_to_cpu(event->status);
232 /* skip invalid event */
233 if (mcu_cmd != event->cid)
234 ret = -EAGAIN;
235 } else {
236 skb_pull(skb, sizeof(struct mt7996_mcu_rxd));
237 }
238
239 return ret;
240 }
241
242 static int
mt7996_mcu_send_message(struct mt76_dev * mdev,struct sk_buff * skb,int cmd,int * wait_seq)243 mt7996_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb,
244 int cmd, int *wait_seq)
245 {
246 struct mt7996_dev *dev = container_of(mdev, struct mt7996_dev, mt76);
247 int txd_len, mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd);
248 struct mt76_connac2_mcu_uni_txd *uni_txd;
249 struct mt76_connac2_mcu_txd *mcu_txd;
250 enum mt76_mcuq_id qid;
251 __le32 *txd;
252 u32 val;
253 u8 seq;
254
255 mdev->mcu.timeout = 20 * HZ;
256
257 seq = ++dev->mt76.mcu.msg_seq & 0xf;
258 if (!seq)
259 seq = ++dev->mt76.mcu.msg_seq & 0xf;
260
261 if (cmd == MCU_CMD(FW_SCATTER)) {
262 qid = MT_MCUQ_FWDL;
263 goto exit;
264 }
265
266 txd_len = cmd & __MCU_CMD_FIELD_UNI ? sizeof(*uni_txd) : sizeof(*mcu_txd);
267 txd = (__le32 *)skb_push(skb, txd_len);
268 if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state))
269 qid = MT_MCUQ_WA;
270 else
271 qid = MT_MCUQ_WM;
272
273 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) |
274 FIELD_PREP(MT_TXD0_PKT_FMT, MT_TX_TYPE_CMD) |
275 FIELD_PREP(MT_TXD0_Q_IDX, MT_TX_MCU_PORT_RX_Q0);
276 txd[0] = cpu_to_le32(val);
277
278 val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD);
279 txd[1] = cpu_to_le32(val);
280
281 if (cmd & __MCU_CMD_FIELD_UNI) {
282 uni_txd = (struct mt76_connac2_mcu_uni_txd *)txd;
283 uni_txd->len = cpu_to_le16(skb->len - sizeof(uni_txd->txd));
284 uni_txd->cid = cpu_to_le16(mcu_cmd);
285 uni_txd->s2d_index = MCU_S2D_H2CN;
286 uni_txd->pkt_type = MCU_PKT_ID;
287 uni_txd->seq = seq;
288
289 if (cmd & __MCU_CMD_FIELD_QUERY)
290 uni_txd->option = MCU_CMD_UNI_QUERY_ACK;
291 else
292 uni_txd->option = MCU_CMD_UNI_EXT_ACK;
293
294 if ((cmd & __MCU_CMD_FIELD_WA) && (cmd & __MCU_CMD_FIELD_WM))
295 uni_txd->s2d_index = MCU_S2D_H2CN;
296 else if (cmd & __MCU_CMD_FIELD_WA)
297 uni_txd->s2d_index = MCU_S2D_H2C;
298 else if (cmd & __MCU_CMD_FIELD_WM)
299 uni_txd->s2d_index = MCU_S2D_H2N;
300
301 goto exit;
302 }
303
304 mcu_txd = (struct mt76_connac2_mcu_txd *)txd;
305 mcu_txd->len = cpu_to_le16(skb->len - sizeof(mcu_txd->txd));
306 mcu_txd->pq_id = cpu_to_le16(MCU_PQ_ID(MT_TX_PORT_IDX_MCU,
307 MT_TX_MCU_PORT_RX_Q0));
308 mcu_txd->pkt_type = MCU_PKT_ID;
309 mcu_txd->seq = seq;
310
311 mcu_txd->cid = FIELD_GET(__MCU_CMD_FIELD_ID, cmd);
312 mcu_txd->set_query = MCU_Q_NA;
313 mcu_txd->ext_cid = FIELD_GET(__MCU_CMD_FIELD_EXT_ID, cmd);
314 if (mcu_txd->ext_cid) {
315 mcu_txd->ext_cid_ack = 1;
316
317 if (cmd & __MCU_CMD_FIELD_QUERY)
318 mcu_txd->set_query = MCU_Q_QUERY;
319 else
320 mcu_txd->set_query = MCU_Q_SET;
321 }
322
323 if (cmd & __MCU_CMD_FIELD_WA)
324 mcu_txd->s2d_index = MCU_S2D_H2C;
325 else
326 mcu_txd->s2d_index = MCU_S2D_H2N;
327
328 exit:
329 if (wait_seq)
330 *wait_seq = seq;
331
332 return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[qid], skb, 0);
333 }
334
mt7996_mcu_wa_cmd(struct mt7996_dev * dev,int cmd,u32 a1,u32 a2,u32 a3)335 int mt7996_mcu_wa_cmd(struct mt7996_dev *dev, int cmd, u32 a1, u32 a2, u32 a3)
336 {
337 struct {
338 __le32 args[3];
339 } req = {
340 .args = {
341 cpu_to_le32(a1),
342 cpu_to_le32(a2),
343 cpu_to_le32(a3),
344 },
345 };
346
347 return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), false);
348 }
349
350 static void
mt7996_mcu_csa_finish(void * priv,u8 * mac,struct ieee80211_vif * vif)351 mt7996_mcu_csa_finish(void *priv, u8 *mac, struct ieee80211_vif *vif)
352 {
353 if (!vif->bss_conf.csa_active || vif->type == NL80211_IFTYPE_STATION)
354 return;
355
356 ieee80211_csa_finish(vif, 0);
357 }
358
359 static void
mt7996_mcu_rx_radar_detected(struct mt7996_dev * dev,struct sk_buff * skb)360 mt7996_mcu_rx_radar_detected(struct mt7996_dev *dev, struct sk_buff *skb)
361 {
362 struct mt76_phy *mphy = &dev->mt76.phy;
363 struct mt7996_mcu_rdd_report *r;
364
365 r = (struct mt7996_mcu_rdd_report *)skb->data;
366
367 if (r->band_idx >= ARRAY_SIZE(dev->mt76.phys))
368 return;
369
370 if (r->band_idx == MT_RX_SEL2 && !dev->rdd2_phy)
371 return;
372
373 if (r->band_idx == MT_RX_SEL2)
374 mphy = dev->rdd2_phy->mt76;
375 else
376 mphy = dev->mt76.phys[r->band_idx];
377
378 if (!mphy)
379 return;
380
381 if (r->band_idx == MT_RX_SEL2)
382 cfg80211_background_radar_event(mphy->hw->wiphy,
383 &dev->rdd2_chandef,
384 GFP_ATOMIC);
385 else
386 ieee80211_radar_detected(mphy->hw, NULL);
387 dev->hw_pattern++;
388 }
389
390 static void
mt7996_mcu_rx_log_message(struct mt7996_dev * dev,struct sk_buff * skb)391 mt7996_mcu_rx_log_message(struct mt7996_dev *dev, struct sk_buff *skb)
392 {
393 #define UNI_EVENT_FW_LOG_FORMAT 0
394 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data;
395 const char *data = (char *)&rxd[1] + 4, *type;
396 struct tlv *tlv = (struct tlv *)data;
397 int len;
398
399 if (!(rxd->option & MCU_UNI_CMD_EVENT)) {
400 len = skb->len - sizeof(*rxd);
401 data = (char *)&rxd[1];
402 goto out;
403 }
404
405 if (le16_to_cpu(tlv->tag) != UNI_EVENT_FW_LOG_FORMAT)
406 return;
407
408 data += sizeof(*tlv) + 4;
409 len = le16_to_cpu(tlv->len) - sizeof(*tlv) - 4;
410
411 out:
412 switch (rxd->s2d_index) {
413 case 0:
414 if (mt7996_debugfs_rx_log(dev, data, len))
415 return;
416
417 type = "WM";
418 break;
419 case 2:
420 type = "WA";
421 break;
422 default:
423 type = "unknown";
424 break;
425 }
426
427 wiphy_info(mt76_hw(dev)->wiphy, "%s: %.*s", type, len, data);
428 }
429
430 static void
mt7996_mcu_cca_finish(void * priv,u8 * mac,struct ieee80211_vif * vif)431 mt7996_mcu_cca_finish(void *priv, u8 *mac, struct ieee80211_vif *vif)
432 {
433 if (!vif->bss_conf.color_change_active || vif->type == NL80211_IFTYPE_STATION)
434 return;
435
436 ieee80211_color_change_finish(vif, 0);
437 }
438
439 static void
mt7996_mcu_ie_countdown(struct mt7996_dev * dev,struct sk_buff * skb)440 mt7996_mcu_ie_countdown(struct mt7996_dev *dev, struct sk_buff *skb)
441 {
442 #define UNI_EVENT_IE_COUNTDOWN_CSA 0
443 #define UNI_EVENT_IE_COUNTDOWN_BCC 1
444 struct header {
445 u8 band;
446 u8 rsv[3];
447 };
448 struct mt76_phy *mphy = &dev->mt76.phy;
449 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data;
450 const char *data = (char *)&rxd[1], *tail;
451 struct header *hdr = (struct header *)data;
452 struct tlv *tlv = (struct tlv *)(data + 4);
453
454 if (hdr->band >= ARRAY_SIZE(dev->mt76.phys))
455 return;
456
457 if (hdr->band && dev->mt76.phys[hdr->band])
458 mphy = dev->mt76.phys[hdr->band];
459
460 tail = skb->data + skb->len;
461 data += sizeof(struct header);
462 while (data + sizeof(struct tlv) < tail && le16_to_cpu(tlv->len)) {
463 switch (le16_to_cpu(tlv->tag)) {
464 case UNI_EVENT_IE_COUNTDOWN_CSA:
465 ieee80211_iterate_active_interfaces_atomic(mphy->hw,
466 IEEE80211_IFACE_ITER_RESUME_ALL,
467 mt7996_mcu_csa_finish, mphy->hw);
468 break;
469 case UNI_EVENT_IE_COUNTDOWN_BCC:
470 ieee80211_iterate_active_interfaces_atomic(mphy->hw,
471 IEEE80211_IFACE_ITER_RESUME_ALL,
472 mt7996_mcu_cca_finish, mphy->hw);
473 break;
474 }
475
476 data += le16_to_cpu(tlv->len);
477 tlv = (struct tlv *)data;
478 }
479 }
480
481 static int
mt7996_mcu_update_tx_gi(struct rate_info * rate,struct all_sta_trx_rate * mcu_rate)482 mt7996_mcu_update_tx_gi(struct rate_info *rate, struct all_sta_trx_rate *mcu_rate)
483 {
484 switch (mcu_rate->tx_mode) {
485 case MT_PHY_TYPE_CCK:
486 case MT_PHY_TYPE_OFDM:
487 break;
488 case MT_PHY_TYPE_HT:
489 case MT_PHY_TYPE_HT_GF:
490 case MT_PHY_TYPE_VHT:
491 if (mcu_rate->tx_gi)
492 rate->flags |= RATE_INFO_FLAGS_SHORT_GI;
493 else
494 rate->flags &= ~RATE_INFO_FLAGS_SHORT_GI;
495 break;
496 case MT_PHY_TYPE_HE_SU:
497 case MT_PHY_TYPE_HE_EXT_SU:
498 case MT_PHY_TYPE_HE_TB:
499 case MT_PHY_TYPE_HE_MU:
500 if (mcu_rate->tx_gi > NL80211_RATE_INFO_HE_GI_3_2)
501 return -EINVAL;
502 rate->he_gi = mcu_rate->tx_gi;
503 break;
504 case MT_PHY_TYPE_EHT_SU:
505 case MT_PHY_TYPE_EHT_TRIG:
506 case MT_PHY_TYPE_EHT_MU:
507 if (mcu_rate->tx_gi > NL80211_RATE_INFO_EHT_GI_3_2)
508 return -EINVAL;
509 rate->eht_gi = mcu_rate->tx_gi;
510 break;
511 default:
512 return -EINVAL;
513 }
514
515 return 0;
516 }
517
518 static void
mt7996_mcu_rx_all_sta_info_event(struct mt7996_dev * dev,struct sk_buff * skb)519 mt7996_mcu_rx_all_sta_info_event(struct mt7996_dev *dev, struct sk_buff *skb)
520 {
521 struct mt7996_mcu_all_sta_info_event *res;
522 u16 i;
523
524 skb_pull(skb, sizeof(struct mt7996_mcu_rxd));
525
526 res = (struct mt7996_mcu_all_sta_info_event *)skb->data;
527
528 for (i = 0; i < le16_to_cpu(res->sta_num); i++) {
529 u8 ac;
530 u16 wlan_idx;
531 struct mt76_wcid *wcid;
532
533 switch (le16_to_cpu(res->tag)) {
534 case UNI_ALL_STA_TXRX_RATE:
535 wlan_idx = le16_to_cpu(res->rate[i].wlan_idx);
536 wcid = rcu_dereference(dev->mt76.wcid[wlan_idx]);
537
538 if (!wcid)
539 break;
540
541 if (mt7996_mcu_update_tx_gi(&wcid->rate, &res->rate[i]))
542 dev_err(dev->mt76.dev, "Failed to update TX GI\n");
543 break;
544 case UNI_ALL_STA_TXRX_ADM_STAT:
545 wlan_idx = le16_to_cpu(res->adm_stat[i].wlan_idx);
546 wcid = rcu_dereference(dev->mt76.wcid[wlan_idx]);
547
548 if (!wcid)
549 break;
550
551 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) {
552 wcid->stats.tx_bytes +=
553 le32_to_cpu(res->adm_stat[i].tx_bytes[ac]);
554 wcid->stats.rx_bytes +=
555 le32_to_cpu(res->adm_stat[i].rx_bytes[ac]);
556 }
557 break;
558 case UNI_ALL_STA_TXRX_MSDU_COUNT:
559 wlan_idx = le16_to_cpu(res->msdu_cnt[i].wlan_idx);
560 wcid = rcu_dereference(dev->mt76.wcid[wlan_idx]);
561
562 if (!wcid)
563 break;
564
565 wcid->stats.tx_packets +=
566 le32_to_cpu(res->msdu_cnt[i].tx_msdu_cnt);
567 wcid->stats.rx_packets +=
568 le32_to_cpu(res->msdu_cnt[i].rx_msdu_cnt);
569 break;
570 default:
571 break;
572 }
573 }
574 }
575
576 static void
mt7996_mcu_rx_thermal_notify(struct mt7996_dev * dev,struct sk_buff * skb)577 mt7996_mcu_rx_thermal_notify(struct mt7996_dev *dev, struct sk_buff *skb)
578 {
579 #define THERMAL_NOTIFY_TAG 0x4
580 #define THERMAL_NOTIFY 0x2
581 struct mt76_phy *mphy = &dev->mt76.phy;
582 struct mt7996_mcu_thermal_notify *n;
583 struct mt7996_phy *phy;
584
585 n = (struct mt7996_mcu_thermal_notify *)skb->data;
586
587 if (le16_to_cpu(n->tag) != THERMAL_NOTIFY_TAG)
588 return;
589
590 if (n->event_id != THERMAL_NOTIFY)
591 return;
592
593 if (n->band_idx > MT_BAND2)
594 return;
595
596 mphy = dev->mt76.phys[n->band_idx];
597 if (!mphy)
598 return;
599
600 phy = (struct mt7996_phy *)mphy->priv;
601 phy->throttle_state = n->duty_percent;
602 }
603
604 static void
mt7996_mcu_rx_ext_event(struct mt7996_dev * dev,struct sk_buff * skb)605 mt7996_mcu_rx_ext_event(struct mt7996_dev *dev, struct sk_buff *skb)
606 {
607 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data;
608
609 switch (rxd->ext_eid) {
610 case MCU_EXT_EVENT_FW_LOG_2_HOST:
611 mt7996_mcu_rx_log_message(dev, skb);
612 break;
613 default:
614 break;
615 }
616 }
617
618 static void
mt7996_mcu_rx_unsolicited_event(struct mt7996_dev * dev,struct sk_buff * skb)619 mt7996_mcu_rx_unsolicited_event(struct mt7996_dev *dev, struct sk_buff *skb)
620 {
621 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data;
622
623 switch (rxd->eid) {
624 case MCU_EVENT_EXT:
625 mt7996_mcu_rx_ext_event(dev, skb);
626 break;
627 case MCU_UNI_EVENT_THERMAL:
628 mt7996_mcu_rx_thermal_notify(dev, skb);
629 break;
630 default:
631 break;
632 }
633 dev_kfree_skb(skb);
634 }
635
636 static void
mt7996_mcu_wed_rro_event(struct mt7996_dev * dev,struct sk_buff * skb)637 mt7996_mcu_wed_rro_event(struct mt7996_dev *dev, struct sk_buff *skb)
638 {
639 struct mt7996_mcu_wed_rro_event *event = (void *)skb->data;
640
641 if (!dev->has_rro)
642 return;
643
644 skb_pull(skb, sizeof(struct mt7996_mcu_rxd) + 4);
645
646 switch (le16_to_cpu(event->tag)) {
647 case UNI_WED_RRO_BA_SESSION_STATUS: {
648 struct mt7996_mcu_wed_rro_ba_event *e;
649
650 while (skb->len >= sizeof(*e)) {
651 struct mt76_rx_tid *tid;
652 struct mt76_wcid *wcid;
653 u16 idx;
654
655 e = (void *)skb->data;
656 idx = le16_to_cpu(e->wlan_id);
657 if (idx >= ARRAY_SIZE(dev->mt76.wcid))
658 break;
659
660 wcid = rcu_dereference(dev->mt76.wcid[idx]);
661 if (!wcid || !wcid->sta)
662 break;
663
664 if (e->tid >= ARRAY_SIZE(wcid->aggr))
665 break;
666
667 tid = rcu_dereference(wcid->aggr[e->tid]);
668 if (!tid)
669 break;
670
671 tid->id = le16_to_cpu(e->id);
672 skb_pull(skb, sizeof(*e));
673 }
674 break;
675 }
676 case UNI_WED_RRO_BA_SESSION_DELETE: {
677 struct mt7996_mcu_wed_rro_ba_delete_event *e;
678
679 while (skb->len >= sizeof(*e)) {
680 struct mt7996_wed_rro_session_id *session;
681
682 e = (void *)skb->data;
683 session = kzalloc(sizeof(*session), GFP_ATOMIC);
684 if (!session)
685 break;
686
687 session->id = le16_to_cpu(e->session_id);
688
689 spin_lock_bh(&dev->wed_rro.lock);
690 list_add_tail(&session->list, &dev->wed_rro.poll_list);
691 spin_unlock_bh(&dev->wed_rro.lock);
692
693 ieee80211_queue_work(mt76_hw(dev), &dev->wed_rro.work);
694 skb_pull(skb, sizeof(*e));
695 }
696 break;
697 }
698 default:
699 break;
700 }
701 }
702
703 static void
mt7996_mcu_uni_rx_unsolicited_event(struct mt7996_dev * dev,struct sk_buff * skb)704 mt7996_mcu_uni_rx_unsolicited_event(struct mt7996_dev *dev, struct sk_buff *skb)
705 {
706 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data;
707
708 switch (rxd->eid) {
709 case MCU_UNI_EVENT_FW_LOG_2_HOST:
710 mt7996_mcu_rx_log_message(dev, skb);
711 break;
712 case MCU_UNI_EVENT_IE_COUNTDOWN:
713 mt7996_mcu_ie_countdown(dev, skb);
714 break;
715 case MCU_UNI_EVENT_RDD_REPORT:
716 mt7996_mcu_rx_radar_detected(dev, skb);
717 break;
718 case MCU_UNI_EVENT_ALL_STA_INFO:
719 mt7996_mcu_rx_all_sta_info_event(dev, skb);
720 break;
721 case MCU_UNI_EVENT_WED_RRO:
722 mt7996_mcu_wed_rro_event(dev, skb);
723 break;
724 default:
725 break;
726 }
727 dev_kfree_skb(skb);
728 }
729
mt7996_mcu_rx_event(struct mt7996_dev * dev,struct sk_buff * skb)730 void mt7996_mcu_rx_event(struct mt7996_dev *dev, struct sk_buff *skb)
731 {
732 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data;
733
734 if (rxd->option & MCU_UNI_CMD_UNSOLICITED_EVENT) {
735 mt7996_mcu_uni_rx_unsolicited_event(dev, skb);
736 return;
737 }
738
739 /* WA still uses legacy event*/
740 if (rxd->ext_eid == MCU_EXT_EVENT_FW_LOG_2_HOST ||
741 !rxd->seq)
742 mt7996_mcu_rx_unsolicited_event(dev, skb);
743 else
744 mt76_mcu_rx_event(&dev->mt76, skb);
745 }
746
747 static struct tlv *
mt7996_mcu_add_uni_tlv(struct sk_buff * skb,u16 tag,u16 len)748 mt7996_mcu_add_uni_tlv(struct sk_buff *skb, u16 tag, u16 len)
749 {
750 struct tlv *ptlv = skb_put_zero(skb, len);
751
752 ptlv->tag = cpu_to_le16(tag);
753 ptlv->len = cpu_to_le16(len);
754
755 return ptlv;
756 }
757
758 static void
mt7996_mcu_bss_rfch_tlv(struct sk_buff * skb,struct mt7996_phy * phy)759 mt7996_mcu_bss_rfch_tlv(struct sk_buff *skb, struct mt7996_phy *phy)
760 {
761 static const u8 rlm_ch_band[] = {
762 [NL80211_BAND_2GHZ] = 1,
763 [NL80211_BAND_5GHZ] = 2,
764 [NL80211_BAND_6GHZ] = 3,
765 };
766 struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
767 struct bss_rlm_tlv *ch;
768 struct tlv *tlv;
769 int freq1 = chandef->center_freq1;
770
771 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RLM, sizeof(*ch));
772
773 ch = (struct bss_rlm_tlv *)tlv;
774 ch->control_channel = chandef->chan->hw_value;
775 ch->center_chan = ieee80211_frequency_to_channel(freq1);
776 ch->bw = mt76_connac_chan_bw(chandef);
777 ch->tx_streams = hweight8(phy->mt76->antenna_mask);
778 ch->rx_streams = hweight8(phy->mt76->antenna_mask);
779 ch->band = rlm_ch_band[chandef->chan->band];
780
781 if (chandef->width == NL80211_CHAN_WIDTH_80P80) {
782 int freq2 = chandef->center_freq2;
783
784 ch->center_chan2 = ieee80211_frequency_to_channel(freq2);
785 }
786 }
787
788 static void
mt7996_mcu_bss_ra_tlv(struct sk_buff * skb,struct mt7996_phy * phy)789 mt7996_mcu_bss_ra_tlv(struct sk_buff *skb, struct mt7996_phy *phy)
790 {
791 struct bss_ra_tlv *ra;
792 struct tlv *tlv;
793
794 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RA, sizeof(*ra));
795
796 ra = (struct bss_ra_tlv *)tlv;
797 ra->short_preamble = true;
798 }
799
800 static void
mt7996_mcu_bss_he_tlv(struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_bss_conf * link_conf,struct mt7996_phy * phy)801 mt7996_mcu_bss_he_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,
802 struct ieee80211_bss_conf *link_conf,
803 struct mt7996_phy *phy)
804 {
805 #define DEFAULT_HE_PE_DURATION 4
806 #define DEFAULT_HE_DURATION_RTS_THRES 1023
807 const struct ieee80211_sta_he_cap *cap;
808 struct bss_info_uni_he *he;
809 struct tlv *tlv;
810
811 cap = mt76_connac_get_he_phy_cap(phy->mt76, vif);
812
813 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_HE_BASIC, sizeof(*he));
814
815 he = (struct bss_info_uni_he *)tlv;
816 he->he_pe_duration = link_conf->htc_trig_based_pkt_ext;
817 if (!he->he_pe_duration)
818 he->he_pe_duration = DEFAULT_HE_PE_DURATION;
819
820 he->he_rts_thres = cpu_to_le16(link_conf->frame_time_rts_th);
821 if (!he->he_rts_thres)
822 he->he_rts_thres = cpu_to_le16(DEFAULT_HE_DURATION_RTS_THRES);
823
824 he->max_nss_mcs[CMD_HE_MCS_BW80] = cap->he_mcs_nss_supp.tx_mcs_80;
825 he->max_nss_mcs[CMD_HE_MCS_BW160] = cap->he_mcs_nss_supp.tx_mcs_160;
826 he->max_nss_mcs[CMD_HE_MCS_BW8080] = cap->he_mcs_nss_supp.tx_mcs_80p80;
827 }
828
829 static void
mt7996_mcu_bss_mbssid_tlv(struct sk_buff * skb,struct ieee80211_bss_conf * link_conf,bool enable)830 mt7996_mcu_bss_mbssid_tlv(struct sk_buff *skb, struct ieee80211_bss_conf *link_conf,
831 bool enable)
832 {
833 struct bss_info_uni_mbssid *mbssid;
834 struct tlv *tlv;
835
836 if (!link_conf->bssid_indicator && enable)
837 return;
838
839 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_11V_MBSSID, sizeof(*mbssid));
840
841 mbssid = (struct bss_info_uni_mbssid *)tlv;
842
843 if (enable) {
844 mbssid->max_indicator = link_conf->bssid_indicator;
845 mbssid->mbss_idx = link_conf->bssid_index;
846 mbssid->tx_bss_omac_idx = 0;
847 }
848 }
849
850 static void
mt7996_mcu_bss_bmc_tlv(struct sk_buff * skb,struct mt76_vif_link * mlink,struct mt7996_phy * phy)851 mt7996_mcu_bss_bmc_tlv(struct sk_buff *skb, struct mt76_vif_link *mlink,
852 struct mt7996_phy *phy)
853 {
854 struct bss_rate_tlv *bmc;
855 struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
856 enum nl80211_band band = chandef->chan->band;
857 struct tlv *tlv;
858 u8 idx = mlink->mcast_rates_idx ?
859 mlink->mcast_rates_idx : mlink->basic_rates_idx;
860
861 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RATE, sizeof(*bmc));
862
863 bmc = (struct bss_rate_tlv *)tlv;
864
865 bmc->short_preamble = (band == NL80211_BAND_2GHZ);
866 bmc->bc_fixed_rate = idx;
867 bmc->mc_fixed_rate = idx;
868 }
869
870 static void
mt7996_mcu_bss_txcmd_tlv(struct sk_buff * skb,bool en)871 mt7996_mcu_bss_txcmd_tlv(struct sk_buff *skb, bool en)
872 {
873 struct bss_txcmd_tlv *txcmd;
874 struct tlv *tlv;
875
876 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_TXCMD, sizeof(*txcmd));
877
878 txcmd = (struct bss_txcmd_tlv *)tlv;
879 txcmd->txcmd_mode = en;
880 }
881
882 static void
mt7996_mcu_bss_mld_tlv(struct sk_buff * skb,struct mt76_vif_link * mlink)883 mt7996_mcu_bss_mld_tlv(struct sk_buff *skb, struct mt76_vif_link *mlink)
884 {
885 struct bss_mld_tlv *mld;
886 struct tlv *tlv;
887
888 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_MLD, sizeof(*mld));
889
890 mld = (struct bss_mld_tlv *)tlv;
891 mld->group_mld_id = 0xff;
892 mld->own_mld_id = mlink->idx;
893 mld->remap_idx = 0xff;
894 }
895
896 static void
mt7996_mcu_bss_sec_tlv(struct sk_buff * skb,struct mt76_vif_link * mlink)897 mt7996_mcu_bss_sec_tlv(struct sk_buff *skb, struct mt76_vif_link *mlink)
898 {
899 struct bss_sec_tlv *sec;
900 struct tlv *tlv;
901
902 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_SEC, sizeof(*sec));
903
904 sec = (struct bss_sec_tlv *)tlv;
905 sec->cipher = mlink->cipher;
906 }
907
908 static int
mt7996_mcu_muar_config(struct mt7996_dev * dev,struct mt76_vif_link * mlink,const u8 * addr,bool bssid,bool enable)909 mt7996_mcu_muar_config(struct mt7996_dev *dev, struct mt76_vif_link *mlink,
910 const u8 *addr, bool bssid, bool enable)
911 {
912 #define UNI_MUAR_ENTRY 2
913 u32 idx = mlink->omac_idx - REPEATER_BSSID_START;
914 struct {
915 struct {
916 u8 band;
917 u8 __rsv[3];
918 } hdr;
919
920 __le16 tag;
921 __le16 len;
922
923 bool smesh;
924 u8 bssid;
925 u8 index;
926 u8 entry_add;
927 u8 addr[ETH_ALEN];
928 u8 __rsv[2];
929 } __packed req = {
930 .hdr.band = mlink->band_idx,
931 .tag = cpu_to_le16(UNI_MUAR_ENTRY),
932 .len = cpu_to_le16(sizeof(req) - sizeof(req.hdr)),
933 .smesh = false,
934 .index = idx * 2 + bssid,
935 .entry_add = true,
936 };
937
938 if (enable)
939 memcpy(req.addr, addr, ETH_ALEN);
940
941 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(REPT_MUAR), &req,
942 sizeof(req), true);
943 }
944
945 static void
mt7996_mcu_bss_ifs_timing_tlv(struct sk_buff * skb,struct mt7996_phy * phy)946 mt7996_mcu_bss_ifs_timing_tlv(struct sk_buff *skb, struct mt7996_phy *phy)
947 {
948 struct bss_ifs_time_tlv *ifs_time;
949 struct tlv *tlv;
950 bool is_2ghz = phy->mt76->chandef.chan->band == NL80211_BAND_2GHZ;
951
952 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_IFS_TIME, sizeof(*ifs_time));
953
954 ifs_time = (struct bss_ifs_time_tlv *)tlv;
955 ifs_time->slot_valid = true;
956 ifs_time->sifs_valid = true;
957 ifs_time->rifs_valid = true;
958 ifs_time->eifs_valid = true;
959
960 ifs_time->slot_time = cpu_to_le16(phy->slottime);
961 ifs_time->sifs_time = cpu_to_le16(10);
962 ifs_time->rifs_time = cpu_to_le16(2);
963 ifs_time->eifs_time = cpu_to_le16(is_2ghz ? 78 : 84);
964
965 if (is_2ghz) {
966 ifs_time->eifs_cck_valid = true;
967 ifs_time->eifs_cck_time = cpu_to_le16(314);
968 }
969 }
970
971 static int
mt7996_mcu_bss_basic_tlv(struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_bss_conf * link_conf,struct mt76_vif_link * mvif,struct mt76_phy * phy,u16 wlan_idx,bool enable)972 mt7996_mcu_bss_basic_tlv(struct sk_buff *skb,
973 struct ieee80211_vif *vif,
974 struct ieee80211_bss_conf *link_conf,
975 struct mt76_vif_link *mvif,
976 struct mt76_phy *phy, u16 wlan_idx,
977 bool enable)
978 {
979 struct cfg80211_chan_def *chandef = &phy->chandef;
980 struct mt76_connac_bss_basic_tlv *bss;
981 u32 type = CONNECTION_INFRA_AP;
982 u16 sta_wlan_idx = wlan_idx;
983 struct ieee80211_sta *sta;
984 struct tlv *tlv;
985 int idx;
986
987 switch (vif->type) {
988 case NL80211_IFTYPE_MESH_POINT:
989 case NL80211_IFTYPE_AP:
990 case NL80211_IFTYPE_MONITOR:
991 break;
992 case NL80211_IFTYPE_STATION:
993 if (enable) {
994 rcu_read_lock();
995 sta = ieee80211_find_sta(vif, vif->bss_conf.bssid);
996 /* TODO: enable BSS_INFO_UAPSD & BSS_INFO_PM */
997 if (sta) {
998 struct mt76_wcid *wcid;
999
1000 wcid = (struct mt76_wcid *)sta->drv_priv;
1001 sta_wlan_idx = wcid->idx;
1002 }
1003 rcu_read_unlock();
1004 }
1005 type = CONNECTION_INFRA_STA;
1006 break;
1007 case NL80211_IFTYPE_ADHOC:
1008 type = CONNECTION_IBSS_ADHOC;
1009 break;
1010 default:
1011 WARN_ON(1);
1012 break;
1013 }
1014
1015 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_BASIC, sizeof(*bss));
1016
1017 bss = (struct mt76_connac_bss_basic_tlv *)tlv;
1018 bss->bcn_interval = cpu_to_le16(link_conf->beacon_int);
1019 bss->dtim_period = link_conf->dtim_period;
1020 bss->bmc_tx_wlan_idx = cpu_to_le16(wlan_idx);
1021 bss->sta_idx = cpu_to_le16(sta_wlan_idx);
1022 bss->conn_type = cpu_to_le32(type);
1023 bss->omac_idx = mvif->omac_idx;
1024 bss->band_idx = mvif->band_idx;
1025 bss->wmm_idx = mvif->wmm_idx;
1026 bss->conn_state = !enable;
1027 bss->active = enable;
1028
1029 idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx;
1030 bss->hw_bss_idx = idx;
1031
1032 if (vif->type == NL80211_IFTYPE_MONITOR) {
1033 memcpy(bss->bssid, phy->macaddr, ETH_ALEN);
1034 return 0;
1035 }
1036
1037 memcpy(bss->bssid, link_conf->bssid, ETH_ALEN);
1038 bss->bcn_interval = cpu_to_le16(link_conf->beacon_int);
1039 bss->dtim_period = vif->bss_conf.dtim_period;
1040 bss->phymode = mt76_connac_get_phy_mode(phy, vif,
1041 chandef->chan->band, NULL);
1042 bss->phymode_ext = mt76_connac_get_phy_mode_ext(phy, &vif->bss_conf,
1043 chandef->chan->band);
1044
1045 return 0;
1046 }
1047
1048 static struct sk_buff *
__mt7996_mcu_alloc_bss_req(struct mt76_dev * dev,struct mt76_vif_link * mvif,int len)1049 __mt7996_mcu_alloc_bss_req(struct mt76_dev *dev, struct mt76_vif_link *mvif, int len)
1050 {
1051 struct bss_req_hdr hdr = {
1052 .bss_idx = mvif->idx,
1053 };
1054 struct sk_buff *skb;
1055
1056 skb = mt76_mcu_msg_alloc(dev, NULL, len);
1057 if (!skb)
1058 return ERR_PTR(-ENOMEM);
1059
1060 skb_put_data(skb, &hdr, sizeof(hdr));
1061
1062 return skb;
1063 }
1064
mt7996_mcu_add_bss_info(struct mt7996_phy * phy,struct ieee80211_vif * vif,struct ieee80211_bss_conf * link_conf,struct mt76_vif_link * mlink,int enable)1065 int mt7996_mcu_add_bss_info(struct mt7996_phy *phy, struct ieee80211_vif *vif,
1066 struct ieee80211_bss_conf *link_conf,
1067 struct mt76_vif_link *mlink, int enable)
1068 {
1069 struct mt7996_dev *dev = phy->dev;
1070 struct sk_buff *skb;
1071
1072 if (mlink->omac_idx >= REPEATER_BSSID_START) {
1073 mt7996_mcu_muar_config(dev, mlink, link_conf->addr, false, enable);
1074 mt7996_mcu_muar_config(dev, mlink, link_conf->bssid, true, enable);
1075 }
1076
1077 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, mlink,
1078 MT7996_BSS_UPDATE_MAX_SIZE);
1079 if (IS_ERR(skb))
1080 return PTR_ERR(skb);
1081
1082 /* bss_basic must be first */
1083 mt7996_mcu_bss_basic_tlv(skb, vif, link_conf, mlink, phy->mt76,
1084 mlink->wcid->idx, enable);
1085 mt7996_mcu_bss_sec_tlv(skb, mlink);
1086
1087 if (vif->type == NL80211_IFTYPE_MONITOR)
1088 goto out;
1089
1090 if (enable) {
1091 mt7996_mcu_bss_rfch_tlv(skb, phy);
1092 mt7996_mcu_bss_bmc_tlv(skb, mlink, phy);
1093 mt7996_mcu_bss_ra_tlv(skb, phy);
1094 mt7996_mcu_bss_txcmd_tlv(skb, true);
1095 mt7996_mcu_bss_ifs_timing_tlv(skb, phy);
1096
1097 if (vif->bss_conf.he_support)
1098 mt7996_mcu_bss_he_tlv(skb, vif, link_conf, phy);
1099
1100 /* this tag is necessary no matter if the vif is MLD */
1101 mt7996_mcu_bss_mld_tlv(skb, mlink);
1102 }
1103
1104 mt7996_mcu_bss_mbssid_tlv(skb, link_conf, enable);
1105
1106 out:
1107 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
1108 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true);
1109 }
1110
mt7996_mcu_set_timing(struct mt7996_phy * phy,struct ieee80211_vif * vif,struct ieee80211_bss_conf * link_conf)1111 int mt7996_mcu_set_timing(struct mt7996_phy *phy, struct ieee80211_vif *vif,
1112 struct ieee80211_bss_conf *link_conf)
1113 {
1114 struct mt7996_dev *dev = phy->dev;
1115 struct mt76_vif_link *mlink = mt76_vif_conf_link(&dev->mt76, vif, link_conf);
1116 struct sk_buff *skb;
1117
1118 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, mlink,
1119 MT7996_BSS_UPDATE_MAX_SIZE);
1120 if (IS_ERR(skb))
1121 return PTR_ERR(skb);
1122
1123 mt7996_mcu_bss_ifs_timing_tlv(skb, phy);
1124
1125 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
1126 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true);
1127 }
1128
1129 static int
mt7996_mcu_sta_ba(struct mt7996_dev * dev,struct mt76_vif_link * mvif,struct ieee80211_ampdu_params * params,bool enable,bool tx)1130 mt7996_mcu_sta_ba(struct mt7996_dev *dev, struct mt76_vif_link *mvif,
1131 struct ieee80211_ampdu_params *params,
1132 bool enable, bool tx)
1133 {
1134 struct mt76_wcid *wcid = (struct mt76_wcid *)params->sta->drv_priv;
1135 struct sta_rec_ba_uni *ba;
1136 struct sk_buff *skb;
1137 struct tlv *tlv;
1138
1139 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, mvif, wcid,
1140 MT7996_STA_UPDATE_MAX_SIZE);
1141 if (IS_ERR(skb))
1142 return PTR_ERR(skb);
1143
1144 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BA, sizeof(*ba));
1145
1146 ba = (struct sta_rec_ba_uni *)tlv;
1147 ba->ba_type = tx ? MT_BA_TYPE_ORIGINATOR : MT_BA_TYPE_RECIPIENT;
1148 ba->winsize = cpu_to_le16(params->buf_size);
1149 ba->ssn = cpu_to_le16(params->ssn);
1150 ba->ba_en = enable << params->tid;
1151 ba->amsdu = params->amsdu;
1152 ba->tid = params->tid;
1153 ba->ba_rdd_rro = !tx && enable && dev->has_rro;
1154
1155 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
1156 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true);
1157 }
1158
1159 /** starec & wtbl **/
mt7996_mcu_add_tx_ba(struct mt7996_dev * dev,struct ieee80211_ampdu_params * params,bool enable)1160 int mt7996_mcu_add_tx_ba(struct mt7996_dev *dev,
1161 struct ieee80211_ampdu_params *params,
1162 bool enable)
1163 {
1164 struct mt7996_sta *msta = (struct mt7996_sta *)params->sta->drv_priv;
1165 struct mt7996_vif *mvif = msta->vif;
1166
1167 if (enable && !params->amsdu)
1168 msta->wcid.amsdu = false;
1169
1170 return mt7996_mcu_sta_ba(dev, &mvif->deflink.mt76, params, enable, true);
1171 }
1172
mt7996_mcu_add_rx_ba(struct mt7996_dev * dev,struct ieee80211_ampdu_params * params,bool enable)1173 int mt7996_mcu_add_rx_ba(struct mt7996_dev *dev,
1174 struct ieee80211_ampdu_params *params,
1175 bool enable)
1176 {
1177 struct mt7996_sta *msta = (struct mt7996_sta *)params->sta->drv_priv;
1178 struct mt7996_vif *mvif = msta->vif;
1179
1180 return mt7996_mcu_sta_ba(dev, &mvif->deflink.mt76, params, enable, false);
1181 }
1182
1183 static void
mt7996_mcu_sta_he_tlv(struct sk_buff * skb,struct ieee80211_sta * sta)1184 mt7996_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
1185 {
1186 struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem;
1187 struct ieee80211_he_mcs_nss_supp mcs_map;
1188 struct sta_rec_he_v2 *he;
1189 struct tlv *tlv;
1190 int i = 0;
1191
1192 if (!sta->deflink.he_cap.has_he)
1193 return;
1194
1195 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_V2, sizeof(*he));
1196
1197 he = (struct sta_rec_he_v2 *)tlv;
1198 for (i = 0; i < 11; i++) {
1199 if (i < 6)
1200 he->he_mac_cap[i] = elem->mac_cap_info[i];
1201 he->he_phy_cap[i] = elem->phy_cap_info[i];
1202 }
1203
1204 mcs_map = sta->deflink.he_cap.he_mcs_nss_supp;
1205 switch (sta->deflink.bandwidth) {
1206 case IEEE80211_STA_RX_BW_160:
1207 if (elem->phy_cap_info[0] &
1208 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G)
1209 mt7996_mcu_set_sta_he_mcs(sta,
1210 &he->max_nss_mcs[CMD_HE_MCS_BW8080],
1211 le16_to_cpu(mcs_map.rx_mcs_80p80));
1212
1213 mt7996_mcu_set_sta_he_mcs(sta,
1214 &he->max_nss_mcs[CMD_HE_MCS_BW160],
1215 le16_to_cpu(mcs_map.rx_mcs_160));
1216 fallthrough;
1217 default:
1218 mt7996_mcu_set_sta_he_mcs(sta,
1219 &he->max_nss_mcs[CMD_HE_MCS_BW80],
1220 le16_to_cpu(mcs_map.rx_mcs_80));
1221 break;
1222 }
1223
1224 he->pkt_ext = 2;
1225 }
1226
1227 static void
mt7996_mcu_sta_he_6g_tlv(struct sk_buff * skb,struct ieee80211_sta * sta)1228 mt7996_mcu_sta_he_6g_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
1229 {
1230 struct sta_rec_he_6g_capa *he_6g;
1231 struct tlv *tlv;
1232
1233 if (!sta->deflink.he_6ghz_capa.capa)
1234 return;
1235
1236 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_6G, sizeof(*he_6g));
1237
1238 he_6g = (struct sta_rec_he_6g_capa *)tlv;
1239 he_6g->capa = sta->deflink.he_6ghz_capa.capa;
1240 }
1241
1242 static void
mt7996_mcu_sta_eht_tlv(struct sk_buff * skb,struct ieee80211_sta * sta)1243 mt7996_mcu_sta_eht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
1244 {
1245 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv;
1246 struct ieee80211_vif *vif = container_of((void *)msta->vif,
1247 struct ieee80211_vif, drv_priv);
1248 struct ieee80211_eht_mcs_nss_supp *mcs_map;
1249 struct ieee80211_eht_cap_elem_fixed *elem;
1250 struct sta_rec_eht *eht;
1251 struct tlv *tlv;
1252
1253 if (!sta->deflink.eht_cap.has_eht)
1254 return;
1255
1256 mcs_map = &sta->deflink.eht_cap.eht_mcs_nss_supp;
1257 elem = &sta->deflink.eht_cap.eht_cap_elem;
1258
1259 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_EHT, sizeof(*eht));
1260
1261 eht = (struct sta_rec_eht *)tlv;
1262 eht->tid_bitmap = 0xff;
1263 eht->mac_cap = cpu_to_le16(*(u16 *)elem->mac_cap_info);
1264 eht->phy_cap = cpu_to_le64(*(u64 *)elem->phy_cap_info);
1265 eht->phy_cap_ext = cpu_to_le64(elem->phy_cap_info[8]);
1266
1267 if (vif->type != NL80211_IFTYPE_STATION &&
1268 (sta->deflink.he_cap.he_cap_elem.phy_cap_info[0] &
1269 (IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G |
1270 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G |
1271 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G |
1272 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G)) == 0) {
1273 memcpy(eht->mcs_map_bw20, &mcs_map->only_20mhz,
1274 sizeof(eht->mcs_map_bw20));
1275 return;
1276 }
1277
1278 memcpy(eht->mcs_map_bw80, &mcs_map->bw._80, sizeof(eht->mcs_map_bw80));
1279 memcpy(eht->mcs_map_bw160, &mcs_map->bw._160, sizeof(eht->mcs_map_bw160));
1280 memcpy(eht->mcs_map_bw320, &mcs_map->bw._320, sizeof(eht->mcs_map_bw320));
1281 }
1282
1283 static void
mt7996_mcu_sta_ht_tlv(struct sk_buff * skb,struct ieee80211_sta * sta)1284 mt7996_mcu_sta_ht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
1285 {
1286 struct sta_rec_ht_uni *ht;
1287 struct tlv *tlv;
1288
1289 if (!sta->deflink.ht_cap.ht_supported)
1290 return;
1291
1292 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht));
1293
1294 ht = (struct sta_rec_ht_uni *)tlv;
1295 ht->ht_cap = cpu_to_le16(sta->deflink.ht_cap.cap);
1296 ht->ampdu_param = u8_encode_bits(sta->deflink.ht_cap.ampdu_factor,
1297 IEEE80211_HT_AMPDU_PARM_FACTOR) |
1298 u8_encode_bits(sta->deflink.ht_cap.ampdu_density,
1299 IEEE80211_HT_AMPDU_PARM_DENSITY);
1300 }
1301
1302 static void
mt7996_mcu_sta_vht_tlv(struct sk_buff * skb,struct ieee80211_sta * sta)1303 mt7996_mcu_sta_vht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
1304 {
1305 struct sta_rec_vht *vht;
1306 struct tlv *tlv;
1307
1308 /* For 6G band, this tlv is necessary to let hw work normally */
1309 if (!sta->deflink.he_6ghz_capa.capa && !sta->deflink.vht_cap.vht_supported)
1310 return;
1311
1312 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_VHT, sizeof(*vht));
1313
1314 vht = (struct sta_rec_vht *)tlv;
1315 vht->vht_cap = cpu_to_le32(sta->deflink.vht_cap.cap);
1316 vht->vht_rx_mcs_map = sta->deflink.vht_cap.vht_mcs.rx_mcs_map;
1317 vht->vht_tx_mcs_map = sta->deflink.vht_cap.vht_mcs.tx_mcs_map;
1318 }
1319
1320 static void
mt7996_mcu_sta_amsdu_tlv(struct mt7996_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1321 mt7996_mcu_sta_amsdu_tlv(struct mt7996_dev *dev, struct sk_buff *skb,
1322 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1323 {
1324 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv;
1325 struct sta_rec_amsdu *amsdu;
1326 struct tlv *tlv;
1327
1328 if (vif->type != NL80211_IFTYPE_STATION &&
1329 vif->type != NL80211_IFTYPE_MESH_POINT &&
1330 vif->type != NL80211_IFTYPE_AP)
1331 return;
1332
1333 if (!sta->deflink.agg.max_amsdu_len)
1334 return;
1335
1336 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu));
1337 amsdu = (struct sta_rec_amsdu *)tlv;
1338 amsdu->max_amsdu_num = 8;
1339 amsdu->amsdu_en = true;
1340 msta->wcid.amsdu = true;
1341
1342 switch (sta->deflink.agg.max_amsdu_len) {
1343 case IEEE80211_MAX_MPDU_LEN_VHT_11454:
1344 amsdu->max_mpdu_size =
1345 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
1346 return;
1347 case IEEE80211_MAX_MPDU_LEN_HT_7935:
1348 case IEEE80211_MAX_MPDU_LEN_VHT_7991:
1349 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991;
1350 return;
1351 default:
1352 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895;
1353 return;
1354 }
1355 }
1356
1357 static void
mt7996_mcu_sta_muru_tlv(struct mt7996_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1358 mt7996_mcu_sta_muru_tlv(struct mt7996_dev *dev, struct sk_buff *skb,
1359 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1360 {
1361 struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem;
1362 struct sta_rec_muru *muru;
1363 struct tlv *tlv;
1364
1365 if (vif->type != NL80211_IFTYPE_STATION &&
1366 vif->type != NL80211_IFTYPE_AP)
1367 return;
1368
1369 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_MURU, sizeof(*muru));
1370
1371 muru = (struct sta_rec_muru *)tlv;
1372 muru->cfg.mimo_dl_en = vif->bss_conf.eht_mu_beamformer ||
1373 vif->bss_conf.he_mu_beamformer ||
1374 vif->bss_conf.vht_mu_beamformer ||
1375 vif->bss_conf.vht_mu_beamformee;
1376 muru->cfg.ofdma_dl_en = true;
1377
1378 if (sta->deflink.vht_cap.vht_supported)
1379 muru->mimo_dl.vht_mu_bfee =
1380 !!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE);
1381
1382 if (!sta->deflink.he_cap.has_he)
1383 return;
1384
1385 muru->mimo_dl.partial_bw_dl_mimo =
1386 HE_PHY(CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO, elem->phy_cap_info[6]);
1387
1388 muru->mimo_ul.full_ul_mimo =
1389 HE_PHY(CAP2_UL_MU_FULL_MU_MIMO, elem->phy_cap_info[2]);
1390 muru->mimo_ul.partial_ul_mimo =
1391 HE_PHY(CAP2_UL_MU_PARTIAL_MU_MIMO, elem->phy_cap_info[2]);
1392
1393 muru->ofdma_dl.punc_pream_rx =
1394 HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]);
1395 muru->ofdma_dl.he_20m_in_40m_2g =
1396 HE_PHY(CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G, elem->phy_cap_info[8]);
1397 muru->ofdma_dl.he_20m_in_160m =
1398 HE_PHY(CAP8_20MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]);
1399 muru->ofdma_dl.he_80m_in_160m =
1400 HE_PHY(CAP8_80MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]);
1401
1402 muru->ofdma_ul.t_frame_dur =
1403 HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]);
1404 muru->ofdma_ul.mu_cascading =
1405 HE_MAC(CAP2_MU_CASCADING, elem->mac_cap_info[2]);
1406 muru->ofdma_ul.uo_ra =
1407 HE_MAC(CAP3_OFDMA_RA, elem->mac_cap_info[3]);
1408 muru->ofdma_ul.rx_ctrl_frame_to_mbss =
1409 HE_MAC(CAP3_RX_CTRL_FRAME_TO_MULTIBSS, elem->mac_cap_info[3]);
1410 }
1411
1412 static inline bool
mt7996_is_ebf_supported(struct mt7996_phy * phy,struct ieee80211_vif * vif,struct ieee80211_sta * sta,bool bfee)1413 mt7996_is_ebf_supported(struct mt7996_phy *phy, struct ieee80211_vif *vif,
1414 struct ieee80211_sta *sta, bool bfee)
1415 {
1416 int sts = hweight16(phy->mt76->chainmask);
1417
1418 if (vif->type != NL80211_IFTYPE_STATION &&
1419 vif->type != NL80211_IFTYPE_AP)
1420 return false;
1421
1422 if (!bfee && sts < 2)
1423 return false;
1424
1425 if (sta->deflink.eht_cap.has_eht) {
1426 struct ieee80211_sta_eht_cap *pc = &sta->deflink.eht_cap;
1427 struct ieee80211_eht_cap_elem_fixed *pe = &pc->eht_cap_elem;
1428
1429 if (bfee)
1430 return vif->bss_conf.eht_su_beamformee &&
1431 EHT_PHY(CAP0_SU_BEAMFORMER, pe->phy_cap_info[0]);
1432 else
1433 return vif->bss_conf.eht_su_beamformer &&
1434 EHT_PHY(CAP0_SU_BEAMFORMEE, pe->phy_cap_info[0]);
1435 }
1436
1437 if (sta->deflink.he_cap.has_he) {
1438 struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem;
1439
1440 if (bfee)
1441 return vif->bss_conf.he_su_beamformee &&
1442 HE_PHY(CAP3_SU_BEAMFORMER, pe->phy_cap_info[3]);
1443 else
1444 return vif->bss_conf.he_su_beamformer &&
1445 HE_PHY(CAP4_SU_BEAMFORMEE, pe->phy_cap_info[4]);
1446 }
1447
1448 if (sta->deflink.vht_cap.vht_supported) {
1449 u32 cap = sta->deflink.vht_cap.cap;
1450
1451 if (bfee)
1452 return vif->bss_conf.vht_su_beamformee &&
1453 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE);
1454 else
1455 return vif->bss_conf.vht_su_beamformer &&
1456 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE);
1457 }
1458
1459 return false;
1460 }
1461
1462 static void
mt7996_mcu_sta_sounding_rate(struct sta_rec_bf * bf,struct mt7996_phy * phy)1463 mt7996_mcu_sta_sounding_rate(struct sta_rec_bf *bf, struct mt7996_phy *phy)
1464 {
1465 bf->sounding_phy = MT_PHY_TYPE_OFDM;
1466 bf->ndp_rate = 0; /* mcs0 */
1467 if (is_mt7996(phy->mt76->dev))
1468 bf->ndpa_rate = MT7996_CFEND_RATE_DEFAULT; /* ofdm 24m */
1469 else
1470 bf->ndpa_rate = MT7992_CFEND_RATE_DEFAULT; /* ofdm 6m */
1471
1472 bf->rept_poll_rate = MT7996_CFEND_RATE_DEFAULT; /* ofdm 24m */
1473 }
1474
1475 static void
mt7996_mcu_sta_bfer_ht(struct ieee80211_sta * sta,struct mt7996_phy * phy,struct sta_rec_bf * bf,bool explicit)1476 mt7996_mcu_sta_bfer_ht(struct ieee80211_sta *sta, struct mt7996_phy *phy,
1477 struct sta_rec_bf *bf, bool explicit)
1478 {
1479 struct ieee80211_mcs_info *mcs = &sta->deflink.ht_cap.mcs;
1480 u8 n = 0;
1481
1482 bf->tx_mode = MT_PHY_TYPE_HT;
1483
1484 if ((mcs->tx_params & IEEE80211_HT_MCS_TX_RX_DIFF) &&
1485 (mcs->tx_params & IEEE80211_HT_MCS_TX_DEFINED))
1486 n = FIELD_GET(IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK,
1487 mcs->tx_params);
1488 else if (mcs->rx_mask[3])
1489 n = 3;
1490 else if (mcs->rx_mask[2])
1491 n = 2;
1492 else if (mcs->rx_mask[1])
1493 n = 1;
1494
1495 bf->nrow = hweight8(phy->mt76->antenna_mask) - 1;
1496 bf->ncol = min_t(u8, bf->nrow, n);
1497 bf->ibf_ncol = explicit ? min_t(u8, MT7996_IBF_MAX_NC, bf->ncol) :
1498 min_t(u8, MT7996_IBF_MAX_NC, n);
1499 }
1500
1501 static void
mt7996_mcu_sta_bfer_vht(struct ieee80211_sta * sta,struct mt7996_phy * phy,struct sta_rec_bf * bf,bool explicit)1502 mt7996_mcu_sta_bfer_vht(struct ieee80211_sta *sta, struct mt7996_phy *phy,
1503 struct sta_rec_bf *bf, bool explicit)
1504 {
1505 struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap;
1506 struct ieee80211_sta_vht_cap *vc = &phy->mt76->sband_5g.sband.vht_cap;
1507 u16 mcs_map = le16_to_cpu(pc->vht_mcs.rx_mcs_map);
1508 u8 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map);
1509 u8 tx_ant = hweight8(phy->mt76->antenna_mask) - 1;
1510
1511 bf->tx_mode = MT_PHY_TYPE_VHT;
1512
1513 if (explicit) {
1514 u8 sts, snd_dim;
1515
1516 mt7996_mcu_sta_sounding_rate(bf, phy);
1517
1518 sts = FIELD_GET(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK,
1519 pc->cap);
1520 snd_dim = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK,
1521 vc->cap);
1522 bf->nrow = min_t(u8, min_t(u8, snd_dim, sts), tx_ant);
1523 bf->ncol = min_t(u8, nss_mcs, bf->nrow);
1524 bf->ibf_ncol = min_t(u8, MT7996_IBF_MAX_NC, bf->ncol);
1525
1526 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160)
1527 bf->nrow = 1;
1528 } else {
1529 bf->nrow = tx_ant;
1530 bf->ncol = min_t(u8, nss_mcs, bf->nrow);
1531 bf->ibf_ncol = min_t(u8, MT7996_IBF_MAX_NC, nss_mcs);
1532
1533 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160)
1534 bf->ibf_nrow = 1;
1535 }
1536 }
1537
1538 static void
mt7996_mcu_sta_bfer_he(struct ieee80211_sta * sta,struct ieee80211_vif * vif,struct mt7996_phy * phy,struct sta_rec_bf * bf,bool explicit)1539 mt7996_mcu_sta_bfer_he(struct ieee80211_sta *sta, struct ieee80211_vif *vif,
1540 struct mt7996_phy *phy, struct sta_rec_bf *bf,
1541 bool explicit)
1542 {
1543 struct ieee80211_sta_he_cap *pc = &sta->deflink.he_cap;
1544 struct ieee80211_he_cap_elem *pe = &pc->he_cap_elem;
1545 const struct ieee80211_sta_he_cap *vc =
1546 mt76_connac_get_he_phy_cap(phy->mt76, vif);
1547 const struct ieee80211_he_cap_elem *ve = &vc->he_cap_elem;
1548 u16 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80);
1549 u8 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map);
1550 u8 snd_dim, sts;
1551
1552 if (!vc)
1553 return;
1554
1555 bf->tx_mode = MT_PHY_TYPE_HE_SU;
1556
1557 mt7996_mcu_sta_sounding_rate(bf, phy);
1558
1559 bf->trigger_su = HE_PHY(CAP6_TRIG_SU_BEAMFORMING_FB,
1560 pe->phy_cap_info[6]);
1561 bf->trigger_mu = HE_PHY(CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB,
1562 pe->phy_cap_info[6]);
1563 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK,
1564 ve->phy_cap_info[5]);
1565 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_MASK,
1566 pe->phy_cap_info[4]);
1567 bf->nrow = min_t(u8, snd_dim, sts);
1568 bf->ncol = min_t(u8, nss_mcs, bf->nrow);
1569 bf->ibf_ncol = explicit ? min_t(u8, MT7996_IBF_MAX_NC, bf->ncol) :
1570 min_t(u8, MT7996_IBF_MAX_NC, nss_mcs);
1571
1572 if (sta->deflink.bandwidth != IEEE80211_STA_RX_BW_160)
1573 return;
1574
1575 /* go over for 160MHz and 80p80 */
1576 if (pe->phy_cap_info[0] &
1577 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G) {
1578 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_160);
1579 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map);
1580
1581 bf->ncol_gt_bw80 = nss_mcs;
1582 }
1583
1584 if (pe->phy_cap_info[0] &
1585 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) {
1586 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80p80);
1587 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map);
1588
1589 if (bf->ncol_gt_bw80)
1590 bf->ncol_gt_bw80 = min_t(u8, bf->ncol_gt_bw80, nss_mcs);
1591 else
1592 bf->ncol_gt_bw80 = nss_mcs;
1593 }
1594
1595 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK,
1596 ve->phy_cap_info[5]);
1597 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_MASK,
1598 pe->phy_cap_info[4]);
1599
1600 bf->nrow_gt_bw80 = min_t(int, snd_dim, sts);
1601 }
1602
1603 static void
mt7996_mcu_sta_bfer_eht(struct ieee80211_sta * sta,struct ieee80211_vif * vif,struct mt7996_phy * phy,struct sta_rec_bf * bf,bool explicit)1604 mt7996_mcu_sta_bfer_eht(struct ieee80211_sta *sta, struct ieee80211_vif *vif,
1605 struct mt7996_phy *phy, struct sta_rec_bf *bf,
1606 bool explicit)
1607 {
1608 struct ieee80211_sta_eht_cap *pc = &sta->deflink.eht_cap;
1609 struct ieee80211_eht_cap_elem_fixed *pe = &pc->eht_cap_elem;
1610 struct ieee80211_eht_mcs_nss_supp *eht_nss = &pc->eht_mcs_nss_supp;
1611 const struct ieee80211_sta_eht_cap *vc =
1612 mt76_connac_get_eht_phy_cap(phy->mt76, vif);
1613 const struct ieee80211_eht_cap_elem_fixed *ve = &vc->eht_cap_elem;
1614 u8 nss_mcs = u8_get_bits(eht_nss->bw._80.rx_tx_mcs9_max_nss,
1615 IEEE80211_EHT_MCS_NSS_RX) - 1;
1616 u8 snd_dim, sts;
1617
1618 bf->tx_mode = MT_PHY_TYPE_EHT_MU;
1619
1620 mt7996_mcu_sta_sounding_rate(bf, phy);
1621
1622 bf->trigger_su = EHT_PHY(CAP3_TRIG_SU_BF_FDBK, pe->phy_cap_info[3]);
1623 bf->trigger_mu = EHT_PHY(CAP3_TRIG_MU_BF_PART_BW_FDBK, pe->phy_cap_info[3]);
1624 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_80MHZ_MASK, ve->phy_cap_info[2]);
1625 sts = EHT_PHY(CAP0_BEAMFORMEE_SS_80MHZ_MASK, pe->phy_cap_info[0]) +
1626 (EHT_PHY(CAP1_BEAMFORMEE_SS_80MHZ_MASK, pe->phy_cap_info[1]) << 1);
1627 bf->nrow = min_t(u8, snd_dim, sts);
1628 bf->ncol = min_t(u8, nss_mcs, bf->nrow);
1629 bf->ibf_ncol = explicit ? min_t(u8, MT7996_IBF_MAX_NC, bf->ncol) :
1630 min_t(u8, MT7996_IBF_MAX_NC, nss_mcs);
1631
1632 if (sta->deflink.bandwidth < IEEE80211_STA_RX_BW_160)
1633 return;
1634
1635 switch (sta->deflink.bandwidth) {
1636 case IEEE80211_STA_RX_BW_160:
1637 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_160MHZ_MASK, ve->phy_cap_info[2]);
1638 sts = EHT_PHY(CAP1_BEAMFORMEE_SS_160MHZ_MASK, pe->phy_cap_info[1]);
1639 nss_mcs = u8_get_bits(eht_nss->bw._160.rx_tx_mcs9_max_nss,
1640 IEEE80211_EHT_MCS_NSS_RX) - 1;
1641
1642 bf->nrow_gt_bw80 = min_t(u8, snd_dim, sts);
1643 bf->ncol_gt_bw80 = nss_mcs;
1644 break;
1645 case IEEE80211_STA_RX_BW_320:
1646 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_320MHZ_MASK, ve->phy_cap_info[2]) +
1647 (EHT_PHY(CAP3_SOUNDING_DIM_320MHZ_MASK,
1648 ve->phy_cap_info[3]) << 1);
1649 sts = EHT_PHY(CAP1_BEAMFORMEE_SS_320MHZ_MASK, pe->phy_cap_info[1]);
1650 nss_mcs = u8_get_bits(eht_nss->bw._320.rx_tx_mcs9_max_nss,
1651 IEEE80211_EHT_MCS_NSS_RX) - 1;
1652
1653 bf->nrow_gt_bw80 = min_t(u8, snd_dim, sts) << 4;
1654 bf->ncol_gt_bw80 = nss_mcs << 4;
1655 break;
1656 default:
1657 break;
1658 }
1659 }
1660
1661 static void
mt7996_mcu_sta_bfer_tlv(struct mt7996_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1662 mt7996_mcu_sta_bfer_tlv(struct mt7996_dev *dev, struct sk_buff *skb,
1663 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1664 {
1665 #define EBF_MODE BIT(0)
1666 #define IBF_MODE BIT(1)
1667 #define BF_MAT_ORDER 4
1668 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
1669 struct mt7996_phy *phy = mvif->deflink.phy;
1670 int tx_ant = hweight16(phy->mt76->chainmask) - 1;
1671 struct sta_rec_bf *bf;
1672 struct tlv *tlv;
1673 static const u8 matrix[BF_MAT_ORDER][BF_MAT_ORDER] = {
1674 {0, 0, 0, 0},
1675 {1, 1, 0, 0}, /* 2x1, 2x2, 2x3, 2x4 */
1676 {2, 4, 4, 0}, /* 3x1, 3x2, 3x3, 3x4 */
1677 {3, 5, 6, 0} /* 4x1, 4x2, 4x3, 4x4 */
1678 };
1679 bool ebf;
1680
1681 if (!(sta->deflink.ht_cap.ht_supported || sta->deflink.he_cap.has_he))
1682 return;
1683
1684 ebf = mt7996_is_ebf_supported(phy, vif, sta, false);
1685 if (!ebf && !dev->ibf)
1686 return;
1687
1688 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BF, sizeof(*bf));
1689 bf = (struct sta_rec_bf *)tlv;
1690
1691 /* he/eht: eBF only, except mt7992 that has 5T on 5GHz also supports iBF
1692 * vht: support eBF and iBF
1693 * ht: iBF only, since mac80211 lacks of eBF support
1694 */
1695 if (sta->deflink.eht_cap.has_eht)
1696 mt7996_mcu_sta_bfer_eht(sta, vif, phy, bf, ebf);
1697 else if (sta->deflink.he_cap.has_he)
1698 mt7996_mcu_sta_bfer_he(sta, vif, phy, bf, ebf);
1699 else if (sta->deflink.vht_cap.vht_supported)
1700 mt7996_mcu_sta_bfer_vht(sta, phy, bf, ebf);
1701 else if (sta->deflink.ht_cap.ht_supported)
1702 mt7996_mcu_sta_bfer_ht(sta, phy, bf, ebf);
1703 else
1704 return;
1705
1706 bf->bf_cap = ebf ? EBF_MODE : (dev->ibf ? IBF_MODE : 0);
1707 if (is_mt7992(&dev->mt76) && tx_ant == 4)
1708 bf->bf_cap |= IBF_MODE;
1709 bf->bw = sta->deflink.bandwidth;
1710 bf->ibf_dbw = sta->deflink.bandwidth;
1711 bf->ibf_nrow = tx_ant;
1712
1713 if (sta->deflink.eht_cap.has_eht || sta->deflink.he_cap.has_he)
1714 bf->ibf_timeout = is_mt7996(&dev->mt76) ? MT7996_IBF_TIMEOUT :
1715 MT7992_IBF_TIMEOUT;
1716 else if (!ebf && sta->deflink.bandwidth <= IEEE80211_STA_RX_BW_40 && !bf->ncol)
1717 bf->ibf_timeout = MT7996_IBF_TIMEOUT_LEGACY;
1718 else
1719 bf->ibf_timeout = MT7996_IBF_TIMEOUT;
1720
1721 if (bf->ncol < BF_MAT_ORDER) {
1722 if (ebf)
1723 bf->mem_20m = tx_ant < BF_MAT_ORDER ?
1724 matrix[tx_ant][bf->ncol] : 0;
1725 else
1726 bf->mem_20m = bf->nrow < BF_MAT_ORDER ?
1727 matrix[bf->nrow][bf->ncol] : 0;
1728 }
1729
1730 switch (sta->deflink.bandwidth) {
1731 case IEEE80211_STA_RX_BW_160:
1732 case IEEE80211_STA_RX_BW_80:
1733 bf->mem_total = bf->mem_20m * 2;
1734 break;
1735 case IEEE80211_STA_RX_BW_40:
1736 bf->mem_total = bf->mem_20m;
1737 break;
1738 case IEEE80211_STA_RX_BW_20:
1739 default:
1740 break;
1741 }
1742 }
1743
1744 static void
mt7996_mcu_sta_bfee_tlv(struct mt7996_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1745 mt7996_mcu_sta_bfee_tlv(struct mt7996_dev *dev, struct sk_buff *skb,
1746 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1747 {
1748 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
1749 struct mt7996_phy *phy = mvif->deflink.phy;
1750 int tx_ant = hweight8(phy->mt76->antenna_mask) - 1;
1751 struct sta_rec_bfee *bfee;
1752 struct tlv *tlv;
1753 u8 nrow = 0;
1754
1755 if (!(sta->deflink.vht_cap.vht_supported || sta->deflink.he_cap.has_he))
1756 return;
1757
1758 if (!mt7996_is_ebf_supported(phy, vif, sta, true))
1759 return;
1760
1761 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BFEE, sizeof(*bfee));
1762 bfee = (struct sta_rec_bfee *)tlv;
1763
1764 if (sta->deflink.he_cap.has_he) {
1765 struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem;
1766
1767 nrow = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK,
1768 pe->phy_cap_info[5]);
1769 } else if (sta->deflink.vht_cap.vht_supported) {
1770 struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap;
1771
1772 nrow = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK,
1773 pc->cap);
1774 }
1775
1776 /* reply with identity matrix to avoid 2x2 BF negative gain */
1777 bfee->fb_identity_matrix = (nrow == 1 && tx_ant == 2);
1778 }
1779
1780 static void
mt7996_mcu_sta_tx_proc_tlv(struct sk_buff * skb)1781 mt7996_mcu_sta_tx_proc_tlv(struct sk_buff *skb)
1782 {
1783 struct sta_rec_tx_proc *tx_proc;
1784 struct tlv *tlv;
1785
1786 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_TX_PROC, sizeof(*tx_proc));
1787
1788 tx_proc = (struct sta_rec_tx_proc *)tlv;
1789 tx_proc->flag = cpu_to_le32(0);
1790 }
1791
1792 static void
mt7996_mcu_sta_hdrt_tlv(struct mt7996_dev * dev,struct sk_buff * skb)1793 mt7996_mcu_sta_hdrt_tlv(struct mt7996_dev *dev, struct sk_buff *skb)
1794 {
1795 struct sta_rec_hdrt *hdrt;
1796 struct tlv *tlv;
1797
1798 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HDRT, sizeof(*hdrt));
1799
1800 hdrt = (struct sta_rec_hdrt *)tlv;
1801 hdrt->hdrt_mode = 1;
1802 }
1803
1804 static void
mt7996_mcu_sta_hdr_trans_tlv(struct mt7996_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct mt76_wcid * wcid)1805 mt7996_mcu_sta_hdr_trans_tlv(struct mt7996_dev *dev, struct sk_buff *skb,
1806 struct ieee80211_vif *vif, struct mt76_wcid *wcid)
1807 {
1808 struct sta_rec_hdr_trans *hdr_trans;
1809 struct tlv *tlv;
1810
1811 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HDR_TRANS, sizeof(*hdr_trans));
1812 hdr_trans = (struct sta_rec_hdr_trans *)tlv;
1813 hdr_trans->dis_rx_hdr_tran = true;
1814
1815 if (vif->type == NL80211_IFTYPE_STATION)
1816 hdr_trans->to_ds = true;
1817 else
1818 hdr_trans->from_ds = true;
1819
1820 if (!wcid)
1821 return;
1822
1823 hdr_trans->dis_rx_hdr_tran = !test_bit(MT_WCID_FLAG_HDR_TRANS, &wcid->flags);
1824 if (test_bit(MT_WCID_FLAG_4ADDR, &wcid->flags)) {
1825 hdr_trans->to_ds = true;
1826 hdr_trans->from_ds = true;
1827 }
1828
1829 if (vif->type == NL80211_IFTYPE_MESH_POINT) {
1830 hdr_trans->to_ds = true;
1831 hdr_trans->from_ds = true;
1832 hdr_trans->mesh = true;
1833 }
1834 }
1835
1836 static enum mcu_mmps_mode
mt7996_mcu_get_mmps_mode(enum ieee80211_smps_mode smps)1837 mt7996_mcu_get_mmps_mode(enum ieee80211_smps_mode smps)
1838 {
1839 switch (smps) {
1840 case IEEE80211_SMPS_OFF:
1841 return MCU_MMPS_DISABLE;
1842 case IEEE80211_SMPS_STATIC:
1843 return MCU_MMPS_STATIC;
1844 case IEEE80211_SMPS_DYNAMIC:
1845 return MCU_MMPS_DYNAMIC;
1846 default:
1847 return MCU_MMPS_DISABLE;
1848 }
1849 }
1850
mt7996_mcu_set_fixed_rate_ctrl(struct mt7996_dev * dev,void * data,u16 version)1851 int mt7996_mcu_set_fixed_rate_ctrl(struct mt7996_dev *dev,
1852 void *data, u16 version)
1853 {
1854 struct ra_fixed_rate *req;
1855 struct uni_header hdr;
1856 struct sk_buff *skb;
1857 struct tlv *tlv;
1858 int len;
1859
1860 len = sizeof(hdr) + sizeof(*req);
1861
1862 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len);
1863 if (!skb)
1864 return -ENOMEM;
1865
1866 skb_put_data(skb, &hdr, sizeof(hdr));
1867
1868 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_RA_FIXED_RATE, sizeof(*req));
1869 req = (struct ra_fixed_rate *)tlv;
1870 req->version = cpu_to_le16(version);
1871 memcpy(&req->rate, data, sizeof(req->rate));
1872
1873 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
1874 MCU_WM_UNI_CMD(RA), true);
1875 }
1876
mt7996_mcu_set_fixed_field(struct mt7996_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta,void * data,u32 field)1877 int mt7996_mcu_set_fixed_field(struct mt7996_dev *dev, struct ieee80211_vif *vif,
1878 struct ieee80211_sta *sta, void *data, u32 field)
1879 {
1880 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
1881 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv;
1882 struct sta_phy_uni *phy = data;
1883 struct sta_rec_ra_fixed_uni *ra;
1884 struct sk_buff *skb;
1885 struct tlv *tlv;
1886
1887 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->deflink.mt76,
1888 &msta->wcid,
1889 MT7996_STA_UPDATE_MAX_SIZE);
1890 if (IS_ERR(skb))
1891 return PTR_ERR(skb);
1892
1893 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA_UPDATE, sizeof(*ra));
1894 ra = (struct sta_rec_ra_fixed_uni *)tlv;
1895
1896 switch (field) {
1897 case RATE_PARAM_AUTO:
1898 break;
1899 case RATE_PARAM_FIXED:
1900 case RATE_PARAM_FIXED_MCS:
1901 case RATE_PARAM_FIXED_GI:
1902 case RATE_PARAM_FIXED_HE_LTF:
1903 if (phy)
1904 ra->phy = *phy;
1905 break;
1906 case RATE_PARAM_MMPS_UPDATE:
1907 ra->mmps_mode = mt7996_mcu_get_mmps_mode(sta->deflink.smps_mode);
1908 break;
1909 default:
1910 break;
1911 }
1912 ra->field = cpu_to_le32(field);
1913
1914 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
1915 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true);
1916 }
1917
1918 static int
mt7996_mcu_add_rate_ctrl_fixed(struct mt7996_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1919 mt7996_mcu_add_rate_ctrl_fixed(struct mt7996_dev *dev, struct ieee80211_vif *vif,
1920 struct ieee80211_sta *sta)
1921 {
1922 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
1923 struct cfg80211_chan_def *chandef = &mvif->deflink.phy->mt76->chandef;
1924 struct cfg80211_bitrate_mask *mask = &mvif->deflink.bitrate_mask;
1925 enum nl80211_band band = chandef->chan->band;
1926 struct sta_phy_uni phy = {};
1927 int ret, nrates = 0;
1928
1929 #define __sta_phy_bitrate_mask_check(_mcs, _gi, _ht, _he) \
1930 do { \
1931 u8 i, gi = mask->control[band]._gi; \
1932 gi = (_he) ? gi : gi == NL80211_TXRATE_FORCE_SGI; \
1933 phy.sgi = gi; \
1934 phy.he_ltf = mask->control[band].he_ltf; \
1935 for (i = 0; i < ARRAY_SIZE(mask->control[band]._mcs); i++) { \
1936 if (!mask->control[band]._mcs[i]) \
1937 continue; \
1938 nrates += hweight16(mask->control[band]._mcs[i]); \
1939 phy.mcs = ffs(mask->control[band]._mcs[i]) - 1; \
1940 if (_ht) \
1941 phy.mcs += 8 * i; \
1942 } \
1943 } while (0)
1944
1945 if (sta->deflink.he_cap.has_he) {
1946 __sta_phy_bitrate_mask_check(he_mcs, he_gi, 0, 1);
1947 } else if (sta->deflink.vht_cap.vht_supported) {
1948 __sta_phy_bitrate_mask_check(vht_mcs, gi, 0, 0);
1949 } else if (sta->deflink.ht_cap.ht_supported) {
1950 __sta_phy_bitrate_mask_check(ht_mcs, gi, 1, 0);
1951 } else {
1952 nrates = hweight32(mask->control[band].legacy);
1953 phy.mcs = ffs(mask->control[band].legacy) - 1;
1954 }
1955 #undef __sta_phy_bitrate_mask_check
1956
1957 /* fall back to auto rate control */
1958 if (mask->control[band].gi == NL80211_TXRATE_DEFAULT_GI &&
1959 mask->control[band].he_gi == GENMASK(7, 0) &&
1960 mask->control[band].he_ltf == GENMASK(7, 0) &&
1961 nrates != 1)
1962 return 0;
1963
1964 /* fixed single rate */
1965 if (nrates == 1) {
1966 ret = mt7996_mcu_set_fixed_field(dev, vif, sta, &phy,
1967 RATE_PARAM_FIXED_MCS);
1968 if (ret)
1969 return ret;
1970 }
1971
1972 /* fixed GI */
1973 if (mask->control[band].gi != NL80211_TXRATE_DEFAULT_GI ||
1974 mask->control[band].he_gi != GENMASK(7, 0)) {
1975 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv;
1976 u32 addr;
1977
1978 /* firmware updates only TXCMD but doesn't take WTBL into
1979 * account, so driver should update here to reflect the
1980 * actual txrate hardware sends out.
1981 */
1982 addr = mt7996_mac_wtbl_lmac_addr(dev, msta->wcid.idx, 7);
1983 if (sta->deflink.he_cap.has_he)
1984 mt76_rmw_field(dev, addr, GENMASK(31, 24), phy.sgi);
1985 else
1986 mt76_rmw_field(dev, addr, GENMASK(15, 12), phy.sgi);
1987
1988 ret = mt7996_mcu_set_fixed_field(dev, vif, sta, &phy,
1989 RATE_PARAM_FIXED_GI);
1990 if (ret)
1991 return ret;
1992 }
1993
1994 /* fixed HE_LTF */
1995 if (mask->control[band].he_ltf != GENMASK(7, 0)) {
1996 ret = mt7996_mcu_set_fixed_field(dev, vif, sta, &phy,
1997 RATE_PARAM_FIXED_HE_LTF);
1998 if (ret)
1999 return ret;
2000 }
2001
2002 return 0;
2003 }
2004
2005 static void
mt7996_mcu_sta_rate_ctrl_tlv(struct sk_buff * skb,struct mt7996_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)2006 mt7996_mcu_sta_rate_ctrl_tlv(struct sk_buff *skb, struct mt7996_dev *dev,
2007 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
2008 {
2009 #define INIT_RCPI 180
2010 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
2011 struct mt76_phy *mphy = mvif->deflink.phy->mt76;
2012 struct cfg80211_chan_def *chandef = &mphy->chandef;
2013 struct cfg80211_bitrate_mask *mask = &mvif->deflink.bitrate_mask;
2014 enum nl80211_band band = chandef->chan->band;
2015 struct sta_rec_ra_uni *ra;
2016 struct tlv *tlv;
2017 u32 supp_rate = sta->deflink.supp_rates[band];
2018 u32 cap = sta->wme ? STA_CAP_WMM : 0;
2019
2020 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra));
2021 ra = (struct sta_rec_ra_uni *)tlv;
2022
2023 ra->valid = true;
2024 ra->auto_rate = true;
2025 ra->phy_mode = mt76_connac_get_phy_mode(mphy, vif, band, &sta->deflink);
2026 ra->channel = chandef->chan->hw_value;
2027 ra->bw = (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_320) ?
2028 CMD_CBW_320MHZ : sta->deflink.bandwidth;
2029 ra->phy.bw = ra->bw;
2030 ra->mmps_mode = mt7996_mcu_get_mmps_mode(sta->deflink.smps_mode);
2031
2032 if (supp_rate) {
2033 supp_rate &= mask->control[band].legacy;
2034 ra->rate_len = hweight32(supp_rate);
2035
2036 if (band == NL80211_BAND_2GHZ) {
2037 ra->supp_mode = MODE_CCK;
2038 ra->supp_cck_rate = supp_rate & GENMASK(3, 0);
2039
2040 if (ra->rate_len > 4) {
2041 ra->supp_mode |= MODE_OFDM;
2042 ra->supp_ofdm_rate = supp_rate >> 4;
2043 }
2044 } else {
2045 ra->supp_mode = MODE_OFDM;
2046 ra->supp_ofdm_rate = supp_rate;
2047 }
2048 }
2049
2050 if (sta->deflink.ht_cap.ht_supported) {
2051 ra->supp_mode |= MODE_HT;
2052 ra->af = sta->deflink.ht_cap.ampdu_factor;
2053 ra->ht_gf = !!(sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_GRN_FLD);
2054
2055 cap |= STA_CAP_HT;
2056 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20)
2057 cap |= STA_CAP_SGI_20;
2058 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40)
2059 cap |= STA_CAP_SGI_40;
2060 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_TX_STBC)
2061 cap |= STA_CAP_TX_STBC;
2062 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC)
2063 cap |= STA_CAP_RX_STBC;
2064 if (vif->bss_conf.ht_ldpc &&
2065 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING))
2066 cap |= STA_CAP_LDPC;
2067
2068 mt7996_mcu_set_sta_ht_mcs(sta, ra->ht_mcs,
2069 mask->control[band].ht_mcs);
2070 ra->supp_ht_mcs = *(__le32 *)ra->ht_mcs;
2071 }
2072
2073 if (sta->deflink.vht_cap.vht_supported) {
2074 u8 af;
2075
2076 ra->supp_mode |= MODE_VHT;
2077 af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK,
2078 sta->deflink.vht_cap.cap);
2079 ra->af = max_t(u8, ra->af, af);
2080
2081 cap |= STA_CAP_VHT;
2082 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80)
2083 cap |= STA_CAP_VHT_SGI_80;
2084 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160)
2085 cap |= STA_CAP_VHT_SGI_160;
2086 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_TXSTBC)
2087 cap |= STA_CAP_VHT_TX_STBC;
2088 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_1)
2089 cap |= STA_CAP_VHT_RX_STBC;
2090 if ((vif->type != NL80211_IFTYPE_AP || vif->bss_conf.vht_ldpc) &&
2091 (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC))
2092 cap |= STA_CAP_VHT_LDPC;
2093
2094 mt7996_mcu_set_sta_vht_mcs(sta, ra->supp_vht_mcs,
2095 mask->control[band].vht_mcs);
2096 }
2097
2098 if (sta->deflink.he_cap.has_he) {
2099 ra->supp_mode |= MODE_HE;
2100 cap |= STA_CAP_HE;
2101
2102 if (sta->deflink.he_6ghz_capa.capa)
2103 ra->af = le16_get_bits(sta->deflink.he_6ghz_capa.capa,
2104 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP);
2105 }
2106 ra->sta_cap = cpu_to_le32(cap);
2107
2108 memset(ra->rx_rcpi, INIT_RCPI, sizeof(ra->rx_rcpi));
2109 }
2110
mt7996_mcu_add_rate_ctrl(struct mt7996_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta,bool changed)2111 int mt7996_mcu_add_rate_ctrl(struct mt7996_dev *dev, struct ieee80211_vif *vif,
2112 struct ieee80211_sta *sta, bool changed)
2113 {
2114 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
2115 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv;
2116 struct sk_buff *skb;
2117 int ret;
2118
2119 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->deflink.mt76,
2120 &msta->wcid,
2121 MT7996_STA_UPDATE_MAX_SIZE);
2122 if (IS_ERR(skb))
2123 return PTR_ERR(skb);
2124
2125 /* firmware rc algorithm refers to sta_rec_he for HE control.
2126 * once dev->rc_work changes the settings driver should also
2127 * update sta_rec_he here.
2128 */
2129 if (changed)
2130 mt7996_mcu_sta_he_tlv(skb, sta);
2131
2132 /* sta_rec_ra accommodates BW, NSS and only MCS range format
2133 * i.e 0-{7,8,9} for VHT.
2134 */
2135 mt7996_mcu_sta_rate_ctrl_tlv(skb, dev, vif, sta);
2136
2137 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,
2138 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true);
2139 if (ret)
2140 return ret;
2141
2142 return mt7996_mcu_add_rate_ctrl_fixed(dev, vif, sta);
2143 }
2144
2145 static int
mt7996_mcu_add_group(struct mt7996_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)2146 mt7996_mcu_add_group(struct mt7996_dev *dev, struct ieee80211_vif *vif,
2147 struct ieee80211_sta *sta)
2148 {
2149 #define MT_STA_BSS_GROUP 1
2150 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
2151 struct mt7996_sta *msta;
2152 struct {
2153 u8 __rsv1[4];
2154
2155 __le16 tag;
2156 __le16 len;
2157 __le16 wlan_idx;
2158 u8 __rsv2[2];
2159 __le32 action;
2160 __le32 val;
2161 u8 __rsv3[8];
2162 } __packed req = {
2163 .tag = cpu_to_le16(UNI_VOW_DRR_CTRL),
2164 .len = cpu_to_le16(sizeof(req) - 4),
2165 .action = cpu_to_le32(MT_STA_BSS_GROUP),
2166 .val = cpu_to_le32(mvif->deflink.mt76.idx % 16),
2167 };
2168
2169 msta = sta ? (struct mt7996_sta *)sta->drv_priv : &mvif->deflink.sta;
2170 req.wlan_idx = cpu_to_le16(msta->wcid.idx);
2171
2172 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(VOW), &req,
2173 sizeof(req), true);
2174 }
2175
mt7996_mcu_add_sta(struct mt7996_dev * dev,struct ieee80211_vif * vif,struct mt76_vif_link * mlink,struct ieee80211_sta * sta,int conn_state,bool newly)2176 int mt7996_mcu_add_sta(struct mt7996_dev *dev, struct ieee80211_vif *vif,
2177 struct mt76_vif_link *mlink,
2178 struct ieee80211_sta *sta, int conn_state, bool newly)
2179 {
2180 struct ieee80211_link_sta *link_sta = NULL;
2181 struct mt76_wcid *wcid = mlink->wcid;
2182 struct sk_buff *skb;
2183 int ret;
2184
2185 if (sta) {
2186 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv;
2187
2188 wcid = &msta->wcid;
2189 link_sta = &sta->deflink;
2190 }
2191
2192 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, mlink, wcid,
2193 MT7996_STA_UPDATE_MAX_SIZE);
2194 if (IS_ERR(skb))
2195 return PTR_ERR(skb);
2196
2197 /* starec basic */
2198 mt76_connac_mcu_sta_basic_tlv(&dev->mt76, skb, &vif->bss_conf, link_sta,
2199 conn_state, newly);
2200
2201 if (conn_state == CONN_STATE_DISCONNECT)
2202 goto out;
2203
2204 /* starec hdr trans */
2205 mt7996_mcu_sta_hdr_trans_tlv(dev, skb, vif, wcid);
2206 /* starec tx proc */
2207 mt7996_mcu_sta_tx_proc_tlv(skb);
2208
2209 /* tag order is in accordance with firmware dependency. */
2210 if (sta) {
2211 /* starec hdrt mode */
2212 mt7996_mcu_sta_hdrt_tlv(dev, skb);
2213 /* starec bfer */
2214 mt7996_mcu_sta_bfer_tlv(dev, skb, vif, sta);
2215 /* starec ht */
2216 mt7996_mcu_sta_ht_tlv(skb, sta);
2217 /* starec vht */
2218 mt7996_mcu_sta_vht_tlv(skb, sta);
2219 /* starec uapsd */
2220 mt76_connac_mcu_sta_uapsd(skb, vif, sta);
2221 /* starec amsdu */
2222 mt7996_mcu_sta_amsdu_tlv(dev, skb, vif, sta);
2223 /* starec he */
2224 mt7996_mcu_sta_he_tlv(skb, sta);
2225 /* starec he 6g*/
2226 mt7996_mcu_sta_he_6g_tlv(skb, sta);
2227 /* starec eht */
2228 mt7996_mcu_sta_eht_tlv(skb, sta);
2229 /* starec muru */
2230 mt7996_mcu_sta_muru_tlv(dev, skb, vif, sta);
2231 /* starec bfee */
2232 mt7996_mcu_sta_bfee_tlv(dev, skb, vif, sta);
2233 }
2234
2235 ret = mt7996_mcu_add_group(dev, vif, sta);
2236 if (ret) {
2237 dev_kfree_skb(skb);
2238 return ret;
2239 }
2240 out:
2241 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
2242 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true);
2243 }
2244
2245 static int
mt7996_mcu_sta_key_tlv(struct mt76_wcid * wcid,struct sk_buff * skb,struct ieee80211_key_conf * key,enum set_key_cmd cmd)2246 mt7996_mcu_sta_key_tlv(struct mt76_wcid *wcid,
2247 struct sk_buff *skb,
2248 struct ieee80211_key_conf *key,
2249 enum set_key_cmd cmd)
2250 {
2251 struct sta_rec_sec_uni *sec;
2252 struct tlv *tlv;
2253
2254 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_KEY_V2, sizeof(*sec));
2255 sec = (struct sta_rec_sec_uni *)tlv;
2256 sec->add = cmd;
2257
2258 if (cmd == SET_KEY) {
2259 struct sec_key_uni *sec_key;
2260 u8 cipher;
2261
2262 cipher = mt76_connac_mcu_get_cipher(key->cipher);
2263 if (cipher == MCU_CIPHER_NONE)
2264 return -EOPNOTSUPP;
2265
2266 sec_key = &sec->key[0];
2267 sec_key->wlan_idx = cpu_to_le16(wcid->idx);
2268 sec_key->mgmt_prot = 0;
2269 sec_key->cipher_id = cipher;
2270 sec_key->cipher_len = sizeof(*sec_key);
2271 sec_key->key_id = key->keyidx;
2272 sec_key->key_len = key->keylen;
2273 sec_key->need_resp = 0;
2274 memcpy(sec_key->key, key->key, key->keylen);
2275
2276 if (cipher == MCU_CIPHER_TKIP) {
2277 /* Rx/Tx MIC keys are swapped */
2278 memcpy(sec_key->key + 16, key->key + 24, 8);
2279 memcpy(sec_key->key + 24, key->key + 16, 8);
2280 }
2281
2282 sec->n_cipher = 1;
2283 } else {
2284 sec->n_cipher = 0;
2285 }
2286
2287 return 0;
2288 }
2289
mt7996_mcu_add_key(struct mt76_dev * dev,struct ieee80211_vif * vif,struct ieee80211_key_conf * key,int mcu_cmd,struct mt76_wcid * wcid,enum set_key_cmd cmd)2290 int mt7996_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif,
2291 struct ieee80211_key_conf *key, int mcu_cmd,
2292 struct mt76_wcid *wcid, enum set_key_cmd cmd)
2293 {
2294 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv;
2295 struct sk_buff *skb;
2296 int ret;
2297
2298 skb = __mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid,
2299 MT7996_STA_UPDATE_MAX_SIZE);
2300 if (IS_ERR(skb))
2301 return PTR_ERR(skb);
2302
2303 ret = mt7996_mcu_sta_key_tlv(wcid, skb, key, cmd);
2304 if (ret)
2305 return ret;
2306
2307 return mt76_mcu_skb_send_msg(dev, skb, mcu_cmd, true);
2308 }
2309
mt7996_mcu_get_pn(struct mt7996_dev * dev,struct ieee80211_vif * vif,u8 * pn)2310 static int mt7996_mcu_get_pn(struct mt7996_dev *dev, struct ieee80211_vif *vif,
2311 u8 *pn)
2312 {
2313 #define TSC_TYPE_BIGTK_PN 2
2314 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
2315 struct sta_rec_pn_info *pn_info;
2316 struct sk_buff *skb, *rskb;
2317 struct tlv *tlv;
2318 int ret;
2319
2320 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->deflink.mt76, &mvif->deflink.sta.wcid);
2321 if (IS_ERR(skb))
2322 return PTR_ERR(skb);
2323
2324 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_PN_INFO, sizeof(*pn_info));
2325 pn_info = (struct sta_rec_pn_info *)tlv;
2326
2327 pn_info->tsc_type = TSC_TYPE_BIGTK_PN;
2328 ret = mt76_mcu_skb_send_and_get_msg(&dev->mt76, skb,
2329 MCU_WM_UNI_CMD_QUERY(STA_REC_UPDATE),
2330 true, &rskb);
2331 if (ret)
2332 return ret;
2333
2334 skb_pull(rskb, 4);
2335
2336 pn_info = (struct sta_rec_pn_info *)rskb->data;
2337 if (le16_to_cpu(pn_info->tag) == STA_REC_PN_INFO)
2338 memcpy(pn, pn_info->pn, 6);
2339
2340 dev_kfree_skb(rskb);
2341 return 0;
2342 }
2343
mt7996_mcu_bcn_prot_enable(struct mt7996_dev * dev,struct ieee80211_vif * vif,struct ieee80211_key_conf * key)2344 int mt7996_mcu_bcn_prot_enable(struct mt7996_dev *dev, struct ieee80211_vif *vif,
2345 struct ieee80211_key_conf *key)
2346 {
2347 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
2348 struct mt7996_mcu_bcn_prot_tlv *bcn_prot;
2349 struct sk_buff *skb;
2350 struct tlv *tlv;
2351 u8 pn[6] = {};
2352 int len = sizeof(struct bss_req_hdr) +
2353 sizeof(struct mt7996_mcu_bcn_prot_tlv);
2354 int ret;
2355
2356 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->deflink.mt76, len);
2357 if (IS_ERR(skb))
2358 return PTR_ERR(skb);
2359
2360 tlv = mt76_connac_mcu_add_tlv(skb, UNI_BSS_INFO_BCN_PROT, sizeof(*bcn_prot));
2361
2362 bcn_prot = (struct mt7996_mcu_bcn_prot_tlv *)tlv;
2363
2364 ret = mt7996_mcu_get_pn(dev, vif, pn);
2365 if (ret) {
2366 dev_kfree_skb(skb);
2367 return ret;
2368 }
2369
2370 switch (key->cipher) {
2371 case WLAN_CIPHER_SUITE_AES_CMAC:
2372 bcn_prot->cipher_id = MCU_CIPHER_BCN_PROT_CMAC_128;
2373 break;
2374 case WLAN_CIPHER_SUITE_BIP_GMAC_128:
2375 bcn_prot->cipher_id = MCU_CIPHER_BCN_PROT_GMAC_128;
2376 break;
2377 case WLAN_CIPHER_SUITE_BIP_GMAC_256:
2378 bcn_prot->cipher_id = MCU_CIPHER_BCN_PROT_GMAC_256;
2379 break;
2380 case WLAN_CIPHER_SUITE_BIP_CMAC_256:
2381 default:
2382 dev_err(dev->mt76.dev, "Not supported Bigtk Cipher\n");
2383 dev_kfree_skb(skb);
2384 return -EOPNOTSUPP;
2385 }
2386
2387 pn[0]++;
2388 memcpy(bcn_prot->pn, pn, 6);
2389 bcn_prot->enable = BP_SW_MODE;
2390 memcpy(bcn_prot->key, key->key, WLAN_MAX_KEY_LEN);
2391 bcn_prot->key_id = key->keyidx;
2392
2393 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
2394 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true);
2395 }
2396
mt7996_mcu_add_dev_info(struct mt7996_phy * phy,struct ieee80211_vif * vif,struct ieee80211_bss_conf * link_conf,struct mt76_vif_link * mlink,bool enable)2397 int mt7996_mcu_add_dev_info(struct mt7996_phy *phy, struct ieee80211_vif *vif,
2398 struct ieee80211_bss_conf *link_conf,
2399 struct mt76_vif_link *mlink, bool enable)
2400 {
2401 struct mt7996_dev *dev = phy->dev;
2402 struct {
2403 struct req_hdr {
2404 u8 omac_idx;
2405 u8 band_idx;
2406 u8 __rsv[2];
2407 } __packed hdr;
2408 struct req_tlv {
2409 __le16 tag;
2410 __le16 len;
2411 u8 active;
2412 u8 __rsv;
2413 u8 omac_addr[ETH_ALEN];
2414 } __packed tlv;
2415 } data = {
2416 .hdr = {
2417 .omac_idx = mlink->omac_idx,
2418 .band_idx = mlink->band_idx,
2419 },
2420 .tlv = {
2421 .tag = cpu_to_le16(DEV_INFO_ACTIVE),
2422 .len = cpu_to_le16(sizeof(struct req_tlv)),
2423 .active = enable,
2424 },
2425 };
2426
2427 if (mlink->omac_idx >= REPEATER_BSSID_START)
2428 return mt7996_mcu_muar_config(dev, mlink, link_conf->addr, false, enable);
2429
2430 memcpy(data.tlv.omac_addr, link_conf->addr, ETH_ALEN);
2431 return mt76_mcu_send_msg(&dev->mt76, MCU_WMWA_UNI_CMD(DEV_INFO_UPDATE),
2432 &data, sizeof(data), true);
2433 }
2434
2435 static void
mt7996_mcu_beacon_cntdwn(struct sk_buff * rskb,struct sk_buff * skb,struct ieee80211_mutable_offsets * offs,bool csa)2436 mt7996_mcu_beacon_cntdwn(struct sk_buff *rskb, struct sk_buff *skb,
2437 struct ieee80211_mutable_offsets *offs,
2438 bool csa)
2439 {
2440 struct bss_bcn_cntdwn_tlv *info;
2441 struct tlv *tlv;
2442 u16 tag;
2443
2444 if (!offs->cntdwn_counter_offs[0])
2445 return;
2446
2447 tag = csa ? UNI_BSS_INFO_BCN_CSA : UNI_BSS_INFO_BCN_BCC;
2448
2449 tlv = mt7996_mcu_add_uni_tlv(rskb, tag, sizeof(*info));
2450
2451 info = (struct bss_bcn_cntdwn_tlv *)tlv;
2452 info->cnt = skb->data[offs->cntdwn_counter_offs[0]];
2453 }
2454
2455 static void
mt7996_mcu_beacon_mbss(struct sk_buff * rskb,struct sk_buff * skb,struct bss_bcn_content_tlv * bcn,struct ieee80211_mutable_offsets * offs)2456 mt7996_mcu_beacon_mbss(struct sk_buff *rskb, struct sk_buff *skb,
2457 struct bss_bcn_content_tlv *bcn,
2458 struct ieee80211_mutable_offsets *offs)
2459 {
2460 struct bss_bcn_mbss_tlv *mbss;
2461 const struct element *elem;
2462 struct tlv *tlv;
2463
2464 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_BCN_MBSSID, sizeof(*mbss));
2465
2466 mbss = (struct bss_bcn_mbss_tlv *)tlv;
2467 mbss->offset[0] = cpu_to_le16(offs->tim_offset);
2468 mbss->bitmap = cpu_to_le32(1);
2469
2470 for_each_element_id(elem, WLAN_EID_MULTIPLE_BSSID,
2471 &skb->data[offs->mbssid_off],
2472 skb->len - offs->mbssid_off) {
2473 const struct element *sub_elem;
2474
2475 if (elem->datalen < 2)
2476 continue;
2477
2478 for_each_element(sub_elem, elem->data + 1, elem->datalen - 1) {
2479 const struct ieee80211_bssid_index *idx;
2480 const u8 *idx_ie;
2481
2482 /* not a valid BSS profile */
2483 if (sub_elem->id || sub_elem->datalen < 4)
2484 continue;
2485
2486 /* Find WLAN_EID_MULTI_BSSID_IDX
2487 * in the merged nontransmitted profile
2488 */
2489 idx_ie = cfg80211_find_ie(WLAN_EID_MULTI_BSSID_IDX,
2490 sub_elem->data, sub_elem->datalen);
2491 if (!idx_ie || idx_ie[1] < sizeof(*idx))
2492 continue;
2493
2494 idx = (void *)(idx_ie + 2);
2495 if (!idx->bssid_index || idx->bssid_index > 31)
2496 continue;
2497
2498 mbss->offset[idx->bssid_index] = cpu_to_le16(idx_ie -
2499 skb->data);
2500 mbss->bitmap |= cpu_to_le32(BIT(idx->bssid_index));
2501 }
2502 }
2503 }
2504
2505 static void
mt7996_mcu_beacon_cont(struct mt7996_dev * dev,struct ieee80211_bss_conf * link_conf,struct sk_buff * rskb,struct sk_buff * skb,struct bss_bcn_content_tlv * bcn,struct ieee80211_mutable_offsets * offs)2506 mt7996_mcu_beacon_cont(struct mt7996_dev *dev,
2507 struct ieee80211_bss_conf *link_conf,
2508 struct sk_buff *rskb, struct sk_buff *skb,
2509 struct bss_bcn_content_tlv *bcn,
2510 struct ieee80211_mutable_offsets *offs)
2511 {
2512 struct mt76_wcid *wcid = &dev->mt76.global_wcid;
2513 u8 *buf;
2514
2515 bcn->pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len);
2516 bcn->tim_ie_pos = cpu_to_le16(offs->tim_offset);
2517
2518 if (offs->cntdwn_counter_offs[0]) {
2519 u16 offset = offs->cntdwn_counter_offs[0];
2520
2521 if (link_conf->csa_active)
2522 bcn->csa_ie_pos = cpu_to_le16(offset - 4);
2523 if (link_conf->color_change_active)
2524 bcn->bcc_ie_pos = cpu_to_le16(offset - 3);
2525 }
2526
2527 buf = (u8 *)bcn + sizeof(*bcn);
2528 mt7996_mac_write_txwi(dev, (__le32 *)buf, skb, wcid, NULL, 0, 0,
2529 BSS_CHANGED_BEACON);
2530
2531 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len);
2532 }
2533
mt7996_mcu_add_beacon(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_bss_conf * link_conf)2534 int mt7996_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2535 struct ieee80211_bss_conf *link_conf)
2536 {
2537 struct mt7996_dev *dev = mt7996_hw_dev(hw);
2538 struct mt76_vif_link *mlink = mt76_vif_conf_link(&dev->mt76, vif, link_conf);
2539 struct ieee80211_mutable_offsets offs;
2540 struct ieee80211_tx_info *info;
2541 struct sk_buff *skb, *rskb;
2542 struct tlv *tlv;
2543 struct bss_bcn_content_tlv *bcn;
2544 int len, extra_len = 0;
2545
2546 if (link_conf->nontransmitted)
2547 return 0;
2548
2549 if (!mlink)
2550 return -EINVAL;
2551
2552 rskb = __mt7996_mcu_alloc_bss_req(&dev->mt76, mlink,
2553 MT7996_MAX_BSS_OFFLOAD_SIZE);
2554 if (IS_ERR(rskb))
2555 return PTR_ERR(rskb);
2556
2557 skb = ieee80211_beacon_get_template(hw, vif, &offs, link_conf->link_id);
2558 if (link_conf->enable_beacon && !skb) {
2559 dev_kfree_skb(rskb);
2560 return -EINVAL;
2561 }
2562
2563 if (skb) {
2564 if (skb->len > MT7996_MAX_BEACON_SIZE) {
2565 dev_err(dev->mt76.dev, "Bcn size limit exceed\n");
2566 dev_kfree_skb(rskb);
2567 dev_kfree_skb(skb);
2568 return -EINVAL;
2569 }
2570
2571 extra_len = skb->len;
2572 }
2573
2574 len = ALIGN(sizeof(*bcn) + MT_TXD_SIZE + extra_len, 4);
2575 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_BCN_CONTENT, len);
2576 bcn = (struct bss_bcn_content_tlv *)tlv;
2577 bcn->enable = link_conf->enable_beacon;
2578 if (!bcn->enable)
2579 goto out;
2580
2581 info = IEEE80211_SKB_CB(skb);
2582 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, mlink->band_idx);
2583
2584 mt7996_mcu_beacon_cont(dev, link_conf, rskb, skb, bcn, &offs);
2585 if (link_conf->bssid_indicator)
2586 mt7996_mcu_beacon_mbss(rskb, skb, bcn, &offs);
2587 mt7996_mcu_beacon_cntdwn(rskb, skb, &offs, link_conf->csa_active);
2588 out:
2589 dev_kfree_skb(skb);
2590 return mt76_mcu_skb_send_msg(&dev->mt76, rskb,
2591 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true);
2592 }
2593
mt7996_mcu_beacon_inband_discov(struct mt7996_dev * dev,struct ieee80211_vif * vif,u32 changed)2594 int mt7996_mcu_beacon_inband_discov(struct mt7996_dev *dev,
2595 struct ieee80211_vif *vif, u32 changed)
2596 {
2597 #define OFFLOAD_TX_MODE_SU BIT(0)
2598 #define OFFLOAD_TX_MODE_MU BIT(1)
2599 struct ieee80211_hw *hw = mt76_hw(dev);
2600 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
2601 struct mt7996_phy *phy = mt7996_vif_link_phy(&mvif->deflink);
2602 struct mt76_wcid *wcid = &dev->mt76.global_wcid;
2603 struct bss_inband_discovery_tlv *discov;
2604 struct ieee80211_tx_info *info;
2605 struct sk_buff *rskb, *skb = NULL;
2606 struct cfg80211_chan_def *chandef;
2607 enum nl80211_band band;
2608 struct tlv *tlv;
2609 u8 *buf, interval;
2610 int len;
2611
2612 if (!phy)
2613 return -EINVAL;
2614
2615 chandef = &phy->mt76->chandef;
2616 band = chandef->chan->band;
2617
2618 if (vif->bss_conf.nontransmitted)
2619 return 0;
2620
2621 rskb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->deflink.mt76,
2622 MT7996_MAX_BSS_OFFLOAD_SIZE);
2623 if (IS_ERR(rskb))
2624 return PTR_ERR(rskb);
2625
2626 if (changed & BSS_CHANGED_FILS_DISCOVERY &&
2627 vif->bss_conf.fils_discovery.max_interval) {
2628 interval = vif->bss_conf.fils_discovery.max_interval;
2629 skb = ieee80211_get_fils_discovery_tmpl(hw, vif);
2630 } else if (changed & BSS_CHANGED_UNSOL_BCAST_PROBE_RESP &&
2631 vif->bss_conf.unsol_bcast_probe_resp_interval) {
2632 interval = vif->bss_conf.unsol_bcast_probe_resp_interval;
2633 skb = ieee80211_get_unsol_bcast_probe_resp_tmpl(hw, vif);
2634 }
2635
2636 if (!skb) {
2637 dev_kfree_skb(rskb);
2638 return -EINVAL;
2639 }
2640
2641 if (skb->len > MT7996_MAX_BEACON_SIZE) {
2642 dev_err(dev->mt76.dev, "inband discovery size limit exceed\n");
2643 dev_kfree_skb(rskb);
2644 dev_kfree_skb(skb);
2645 return -EINVAL;
2646 }
2647
2648 info = IEEE80211_SKB_CB(skb);
2649 info->control.vif = vif;
2650 info->band = band;
2651 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->mt76->band_idx);
2652
2653 len = ALIGN(sizeof(*discov) + MT_TXD_SIZE + skb->len, 4);
2654 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_OFFLOAD, len);
2655
2656 discov = (struct bss_inband_discovery_tlv *)tlv;
2657 discov->tx_mode = OFFLOAD_TX_MODE_SU;
2658 /* 0: UNSOL PROBE RESP, 1: FILS DISCOV */
2659 discov->tx_type = !!(changed & BSS_CHANGED_FILS_DISCOVERY);
2660 discov->tx_interval = interval;
2661 discov->prob_rsp_len = cpu_to_le16(MT_TXD_SIZE + skb->len);
2662 discov->enable = true;
2663 discov->wcid = cpu_to_le16(MT7996_WTBL_RESERVED);
2664
2665 buf = (u8 *)tlv + sizeof(*discov);
2666
2667 mt7996_mac_write_txwi(dev, (__le32 *)buf, skb, wcid, NULL, 0, 0, changed);
2668
2669 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len);
2670
2671 dev_kfree_skb(skb);
2672
2673 return mt76_mcu_skb_send_msg(&dev->mt76, rskb,
2674 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true);
2675 }
2676
mt7996_driver_own(struct mt7996_dev * dev,u8 band)2677 static int mt7996_driver_own(struct mt7996_dev *dev, u8 band)
2678 {
2679 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(band), MT_TOP_LPCR_HOST_DRV_OWN);
2680 if (!mt76_poll_msec(dev, MT_TOP_LPCR_HOST_BAND(band),
2681 MT_TOP_LPCR_HOST_FW_OWN_STAT, 0, 500)) {
2682 dev_err(dev->mt76.dev, "Timeout for driver own\n");
2683 return -EIO;
2684 }
2685
2686 /* clear irq when the driver own success */
2687 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND_IRQ_STAT(band),
2688 MT_TOP_LPCR_HOST_BAND_STAT);
2689
2690 return 0;
2691 }
2692
mt7996_patch_sec_mode(u32 key_info)2693 static u32 mt7996_patch_sec_mode(u32 key_info)
2694 {
2695 u32 sec = u32_get_bits(key_info, MT7996_PATCH_SEC), key = 0;
2696
2697 if (key_info == GENMASK(31, 0) || sec == MT7996_SEC_MODE_PLAIN)
2698 return 0;
2699
2700 if (sec == MT7996_SEC_MODE_AES)
2701 key = u32_get_bits(key_info, MT7996_PATCH_AES_KEY);
2702 else
2703 key = u32_get_bits(key_info, MT7996_PATCH_SCRAMBLE_KEY);
2704
2705 return MT7996_SEC_ENCRYPT | MT7996_SEC_IV |
2706 u32_encode_bits(key, MT7996_SEC_KEY_IDX);
2707 }
2708
mt7996_load_patch(struct mt7996_dev * dev)2709 static int mt7996_load_patch(struct mt7996_dev *dev)
2710 {
2711 const struct mt7996_patch_hdr *hdr;
2712 const struct firmware *fw = NULL;
2713 int i, ret, sem;
2714
2715 sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, 1);
2716 switch (sem) {
2717 case PATCH_IS_DL:
2718 return 0;
2719 case PATCH_NOT_DL_SEM_SUCCESS:
2720 break;
2721 default:
2722 dev_err(dev->mt76.dev, "Failed to get patch semaphore\n");
2723 return -EAGAIN;
2724 }
2725
2726 ret = request_firmware(&fw, fw_name(dev, ROM_PATCH), dev->mt76.dev);
2727 if (ret)
2728 goto out;
2729
2730 if (!fw || !fw->data || fw->size < sizeof(*hdr)) {
2731 dev_err(dev->mt76.dev, "Invalid firmware\n");
2732 ret = -EINVAL;
2733 goto out;
2734 }
2735
2736 hdr = (const struct mt7996_patch_hdr *)(fw->data);
2737
2738 dev_info(dev->mt76.dev, "HW/SW Version: 0x%x, Build Time: %.16s\n",
2739 be32_to_cpu(hdr->hw_sw_ver), hdr->build_date);
2740
2741 for (i = 0; i < be32_to_cpu(hdr->desc.n_region); i++) {
2742 struct mt7996_patch_sec *sec;
2743 const u8 *dl;
2744 u32 len, addr, sec_key_idx, mode = DL_MODE_NEED_RSP;
2745
2746 sec = (struct mt7996_patch_sec *)(fw->data + sizeof(*hdr) +
2747 i * sizeof(*sec));
2748 if ((be32_to_cpu(sec->type) & PATCH_SEC_TYPE_MASK) !=
2749 PATCH_SEC_TYPE_INFO) {
2750 ret = -EINVAL;
2751 goto out;
2752 }
2753
2754 addr = be32_to_cpu(sec->info.addr);
2755 len = be32_to_cpu(sec->info.len);
2756 sec_key_idx = be32_to_cpu(sec->info.sec_key_idx);
2757 dl = fw->data + be32_to_cpu(sec->offs);
2758
2759 mode |= mt7996_patch_sec_mode(sec_key_idx);
2760
2761 ret = mt76_connac_mcu_init_download(&dev->mt76, addr, len,
2762 mode);
2763 if (ret) {
2764 dev_err(dev->mt76.dev, "Download request failed\n");
2765 goto out;
2766 }
2767
2768 ret = __mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER),
2769 dl, len, 4096);
2770 if (ret) {
2771 dev_err(dev->mt76.dev, "Failed to send patch\n");
2772 goto out;
2773 }
2774 }
2775
2776 ret = mt76_connac_mcu_start_patch(&dev->mt76);
2777 if (ret)
2778 dev_err(dev->mt76.dev, "Failed to start patch\n");
2779
2780 out:
2781 sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, 0);
2782 switch (sem) {
2783 case PATCH_REL_SEM_SUCCESS:
2784 break;
2785 default:
2786 ret = -EAGAIN;
2787 dev_err(dev->mt76.dev, "Failed to release patch semaphore\n");
2788 break;
2789 }
2790 release_firmware(fw);
2791
2792 return ret;
2793 }
2794
2795 static int
mt7996_mcu_send_ram_firmware(struct mt7996_dev * dev,const struct mt7996_fw_trailer * hdr,const u8 * data,enum mt7996_ram_type type)2796 mt7996_mcu_send_ram_firmware(struct mt7996_dev *dev,
2797 const struct mt7996_fw_trailer *hdr,
2798 const u8 *data, enum mt7996_ram_type type)
2799 {
2800 int i, offset = 0;
2801 u32 override = 0, option = 0;
2802
2803 for (i = 0; i < hdr->n_region; i++) {
2804 const struct mt7996_fw_region *region;
2805 int err;
2806 u32 len, addr, mode;
2807
2808 region = (const struct mt7996_fw_region *)((const u8 *)hdr -
2809 (hdr->n_region - i) * sizeof(*region));
2810 /* DSP and WA use same mode */
2811 mode = mt76_connac_mcu_gen_dl_mode(&dev->mt76,
2812 region->feature_set,
2813 type != MT7996_RAM_TYPE_WM);
2814 len = le32_to_cpu(region->len);
2815 addr = le32_to_cpu(region->addr);
2816
2817 if (region->feature_set & FW_FEATURE_OVERRIDE_ADDR)
2818 override = addr;
2819
2820 err = mt76_connac_mcu_init_download(&dev->mt76, addr, len,
2821 mode);
2822 if (err) {
2823 dev_err(dev->mt76.dev, "Download request failed\n");
2824 return err;
2825 }
2826
2827 err = __mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER),
2828 data + offset, len, 4096);
2829 if (err) {
2830 dev_err(dev->mt76.dev, "Failed to send firmware.\n");
2831 return err;
2832 }
2833
2834 offset += len;
2835 }
2836
2837 if (override)
2838 option |= FW_START_OVERRIDE;
2839
2840 if (type == MT7996_RAM_TYPE_WA)
2841 option |= FW_START_WORKING_PDA_CR4;
2842 else if (type == MT7996_RAM_TYPE_DSP)
2843 option |= FW_START_WORKING_PDA_DSP;
2844
2845 return mt76_connac_mcu_start_firmware(&dev->mt76, override, option);
2846 }
2847
__mt7996_load_ram(struct mt7996_dev * dev,const char * fw_type,const char * fw_file,enum mt7996_ram_type ram_type)2848 static int __mt7996_load_ram(struct mt7996_dev *dev, const char *fw_type,
2849 const char *fw_file, enum mt7996_ram_type ram_type)
2850 {
2851 const struct mt7996_fw_trailer *hdr;
2852 const struct firmware *fw;
2853 int ret;
2854
2855 ret = request_firmware(&fw, fw_file, dev->mt76.dev);
2856 if (ret)
2857 return ret;
2858
2859 if (!fw || !fw->data || fw->size < sizeof(*hdr)) {
2860 dev_err(dev->mt76.dev, "Invalid firmware\n");
2861 ret = -EINVAL;
2862 goto out;
2863 }
2864
2865 hdr = (const void *)(fw->data + fw->size - sizeof(*hdr));
2866 dev_info(dev->mt76.dev, "%s Firmware Version: %.10s, Build Time: %.15s\n",
2867 fw_type, hdr->fw_ver, hdr->build_date);
2868
2869 ret = mt7996_mcu_send_ram_firmware(dev, hdr, fw->data, ram_type);
2870 if (ret) {
2871 dev_err(dev->mt76.dev, "Failed to start %s firmware\n", fw_type);
2872 goto out;
2873 }
2874
2875 snprintf(dev->mt76.hw->wiphy->fw_version,
2876 sizeof(dev->mt76.hw->wiphy->fw_version),
2877 "%.10s-%.15s", hdr->fw_ver, hdr->build_date);
2878
2879 out:
2880 release_firmware(fw);
2881
2882 return ret;
2883 }
2884
mt7996_load_ram(struct mt7996_dev * dev)2885 static int mt7996_load_ram(struct mt7996_dev *dev)
2886 {
2887 int ret;
2888
2889 ret = __mt7996_load_ram(dev, "WM", fw_name(dev, FIRMWARE_WM),
2890 MT7996_RAM_TYPE_WM);
2891 if (ret)
2892 return ret;
2893
2894 ret = __mt7996_load_ram(dev, "DSP", fw_name(dev, FIRMWARE_DSP),
2895 MT7996_RAM_TYPE_DSP);
2896 if (ret)
2897 return ret;
2898
2899 return __mt7996_load_ram(dev, "WA", fw_name(dev, FIRMWARE_WA),
2900 MT7996_RAM_TYPE_WA);
2901 }
2902
2903 static int
mt7996_firmware_state(struct mt7996_dev * dev,bool wa)2904 mt7996_firmware_state(struct mt7996_dev *dev, bool wa)
2905 {
2906 u32 state = FIELD_PREP(MT_TOP_MISC_FW_STATE,
2907 wa ? FW_STATE_RDY : FW_STATE_FW_DOWNLOAD);
2908
2909 if (!mt76_poll_msec(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE,
2910 state, 1000)) {
2911 dev_err(dev->mt76.dev, "Timeout for initializing firmware\n");
2912 return -EIO;
2913 }
2914 return 0;
2915 }
2916
2917 static int
mt7996_mcu_restart(struct mt76_dev * dev)2918 mt7996_mcu_restart(struct mt76_dev *dev)
2919 {
2920 struct {
2921 u8 __rsv1[4];
2922
2923 __le16 tag;
2924 __le16 len;
2925 u8 power_mode;
2926 u8 __rsv2[3];
2927 } __packed req = {
2928 .tag = cpu_to_le16(UNI_POWER_OFF),
2929 .len = cpu_to_le16(sizeof(req) - 4),
2930 .power_mode = 1,
2931 };
2932
2933 return mt76_mcu_send_msg(dev, MCU_WM_UNI_CMD(POWER_CTRL), &req,
2934 sizeof(req), false);
2935 }
2936
mt7996_load_firmware(struct mt7996_dev * dev)2937 static int mt7996_load_firmware(struct mt7996_dev *dev)
2938 {
2939 int ret;
2940
2941 /* make sure fw is download state */
2942 if (mt7996_firmware_state(dev, false)) {
2943 /* restart firmware once */
2944 mt7996_mcu_restart(&dev->mt76);
2945 ret = mt7996_firmware_state(dev, false);
2946 if (ret) {
2947 dev_err(dev->mt76.dev,
2948 "Firmware is not ready for download\n");
2949 return ret;
2950 }
2951 }
2952
2953 ret = mt7996_load_patch(dev);
2954 if (ret)
2955 return ret;
2956
2957 ret = mt7996_load_ram(dev);
2958 if (ret)
2959 return ret;
2960
2961 ret = mt7996_firmware_state(dev, true);
2962 if (ret)
2963 return ret;
2964
2965 mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_FWDL], false);
2966
2967 dev_dbg(dev->mt76.dev, "Firmware init done\n");
2968
2969 return 0;
2970 }
2971
mt7996_mcu_fw_log_2_host(struct mt7996_dev * dev,u8 type,u8 ctrl)2972 int mt7996_mcu_fw_log_2_host(struct mt7996_dev *dev, u8 type, u8 ctrl)
2973 {
2974 struct {
2975 u8 _rsv[4];
2976
2977 __le16 tag;
2978 __le16 len;
2979 u8 ctrl;
2980 u8 interval;
2981 u8 _rsv2[2];
2982 } __packed data = {
2983 .tag = cpu_to_le16(UNI_WSYS_CONFIG_FW_LOG_CTRL),
2984 .len = cpu_to_le16(sizeof(data) - 4),
2985 .ctrl = ctrl,
2986 };
2987
2988 if (type == MCU_FW_LOG_WA)
2989 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_UNI_CMD(WSYS_CONFIG),
2990 &data, sizeof(data), true);
2991
2992 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(WSYS_CONFIG), &data,
2993 sizeof(data), true);
2994 }
2995
mt7996_mcu_fw_dbg_ctrl(struct mt7996_dev * dev,u32 module,u8 level)2996 int mt7996_mcu_fw_dbg_ctrl(struct mt7996_dev *dev, u32 module, u8 level)
2997 {
2998 struct {
2999 u8 _rsv[4];
3000
3001 __le16 tag;
3002 __le16 len;
3003 __le32 module_idx;
3004 u8 level;
3005 u8 _rsv2[3];
3006 } data = {
3007 .tag = cpu_to_le16(UNI_WSYS_CONFIG_FW_DBG_CTRL),
3008 .len = cpu_to_le16(sizeof(data) - 4),
3009 .module_idx = cpu_to_le32(module),
3010 .level = level,
3011 };
3012
3013 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(WSYS_CONFIG), &data,
3014 sizeof(data), false);
3015 }
3016
mt7996_mcu_set_mwds(struct mt7996_dev * dev,bool enabled)3017 static int mt7996_mcu_set_mwds(struct mt7996_dev *dev, bool enabled)
3018 {
3019 struct {
3020 u8 enable;
3021 u8 _rsv[3];
3022 } __packed req = {
3023 .enable = enabled
3024 };
3025
3026 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(MWDS_SUPPORT), &req,
3027 sizeof(req), false);
3028 }
3029
mt7996_add_rx_airtime_tlv(struct sk_buff * skb,u8 band_idx)3030 static void mt7996_add_rx_airtime_tlv(struct sk_buff *skb, u8 band_idx)
3031 {
3032 struct vow_rx_airtime *req;
3033 struct tlv *tlv;
3034
3035 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_VOW_RX_AT_AIRTIME_CLR_EN, sizeof(*req));
3036 req = (struct vow_rx_airtime *)tlv;
3037 req->enable = true;
3038 req->band = band_idx;
3039
3040 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_VOW_RX_AT_AIRTIME_EN, sizeof(*req));
3041 req = (struct vow_rx_airtime *)tlv;
3042 req->enable = true;
3043 req->band = band_idx;
3044 }
3045
3046 static int
mt7996_mcu_init_rx_airtime(struct mt7996_dev * dev)3047 mt7996_mcu_init_rx_airtime(struct mt7996_dev *dev)
3048 {
3049 struct uni_header hdr = {};
3050 struct sk_buff *skb;
3051 int len, num, i;
3052
3053 num = 2 + 2 * (mt7996_band_valid(dev, MT_BAND1) +
3054 mt7996_band_valid(dev, MT_BAND2));
3055 len = sizeof(hdr) + num * sizeof(struct vow_rx_airtime);
3056 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len);
3057 if (!skb)
3058 return -ENOMEM;
3059
3060 skb_put_data(skb, &hdr, sizeof(hdr));
3061
3062 for (i = 0; i < __MT_MAX_BAND; i++) {
3063 if (mt7996_band_valid(dev, i))
3064 mt7996_add_rx_airtime_tlv(skb, i);
3065 }
3066
3067 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
3068 MCU_WM_UNI_CMD(VOW), true);
3069 }
3070
mt7996_mcu_init_firmware(struct mt7996_dev * dev)3071 int mt7996_mcu_init_firmware(struct mt7996_dev *dev)
3072 {
3073 int ret;
3074
3075 /* force firmware operation mode into normal state,
3076 * which should be set before firmware download stage.
3077 */
3078 mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE);
3079
3080 ret = mt7996_driver_own(dev, 0);
3081 if (ret)
3082 return ret;
3083 /* set driver own for band1 when two hif exist */
3084 if (dev->hif2) {
3085 ret = mt7996_driver_own(dev, 1);
3086 if (ret)
3087 return ret;
3088 }
3089
3090 ret = mt7996_load_firmware(dev);
3091 if (ret)
3092 return ret;
3093
3094 set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state);
3095 ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0);
3096 if (ret)
3097 return ret;
3098
3099 ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, 0);
3100 if (ret)
3101 return ret;
3102
3103 ret = mt7996_mcu_set_mwds(dev, 1);
3104 if (ret)
3105 return ret;
3106
3107 ret = mt7996_mcu_init_rx_airtime(dev);
3108 if (ret)
3109 return ret;
3110
3111 return mt7996_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET),
3112 MCU_WA_PARAM_RED, 0, 0);
3113 }
3114
mt7996_mcu_init(struct mt7996_dev * dev)3115 int mt7996_mcu_init(struct mt7996_dev *dev)
3116 {
3117 static const struct mt76_mcu_ops mt7996_mcu_ops = {
3118 .headroom = sizeof(struct mt76_connac2_mcu_txd), /* reuse */
3119 .mcu_skb_send_msg = mt7996_mcu_send_message,
3120 .mcu_parse_response = mt7996_mcu_parse_response,
3121 };
3122
3123 dev->mt76.mcu_ops = &mt7996_mcu_ops;
3124
3125 return mt7996_mcu_init_firmware(dev);
3126 }
3127
mt7996_mcu_exit(struct mt7996_dev * dev)3128 void mt7996_mcu_exit(struct mt7996_dev *dev)
3129 {
3130 mt7996_mcu_restart(&dev->mt76);
3131 if (mt7996_firmware_state(dev, false)) {
3132 dev_err(dev->mt76.dev, "Failed to exit mcu\n");
3133 goto out;
3134 }
3135
3136 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(0), MT_TOP_LPCR_HOST_FW_OWN);
3137 if (dev->hif2)
3138 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(1),
3139 MT_TOP_LPCR_HOST_FW_OWN);
3140 out:
3141 skb_queue_purge(&dev->mt76.mcu.res_q);
3142 }
3143
mt7996_mcu_set_hdr_trans(struct mt7996_dev * dev,bool hdr_trans)3144 int mt7996_mcu_set_hdr_trans(struct mt7996_dev *dev, bool hdr_trans)
3145 {
3146 struct {
3147 u8 __rsv[4];
3148 } __packed hdr;
3149 struct hdr_trans_blacklist *req_blacklist;
3150 struct hdr_trans_en *req_en;
3151 struct sk_buff *skb;
3152 struct tlv *tlv;
3153 int len = MT7996_HDR_TRANS_MAX_SIZE + sizeof(hdr);
3154
3155 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len);
3156 if (!skb)
3157 return -ENOMEM;
3158
3159 skb_put_data(skb, &hdr, sizeof(hdr));
3160
3161 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_EN, sizeof(*req_en));
3162 req_en = (struct hdr_trans_en *)tlv;
3163 req_en->enable = hdr_trans;
3164
3165 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_VLAN,
3166 sizeof(struct hdr_trans_vlan));
3167
3168 if (hdr_trans) {
3169 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_BLACKLIST,
3170 sizeof(*req_blacklist));
3171 req_blacklist = (struct hdr_trans_blacklist *)tlv;
3172 req_blacklist->enable = 1;
3173 req_blacklist->type = cpu_to_le16(ETH_P_PAE);
3174 }
3175
3176 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
3177 MCU_WM_UNI_CMD(RX_HDR_TRANS), true);
3178 }
3179
mt7996_mcu_set_tx(struct mt7996_dev * dev,struct ieee80211_vif * vif,struct ieee80211_bss_conf * link_conf)3180 int mt7996_mcu_set_tx(struct mt7996_dev *dev, struct ieee80211_vif *vif,
3181 struct ieee80211_bss_conf *link_conf)
3182 {
3183 #define MCU_EDCA_AC_PARAM 0
3184 #define WMM_AIFS_SET BIT(0)
3185 #define WMM_CW_MIN_SET BIT(1)
3186 #define WMM_CW_MAX_SET BIT(2)
3187 #define WMM_TXOP_SET BIT(3)
3188 #define WMM_PARAM_SET (WMM_AIFS_SET | WMM_CW_MIN_SET | \
3189 WMM_CW_MAX_SET | WMM_TXOP_SET)
3190 struct mt7996_vif_link *link = mt7996_vif_conf_link(dev, vif, link_conf);
3191 struct {
3192 u8 bss_idx;
3193 u8 __rsv[3];
3194 } __packed hdr = {
3195 .bss_idx = link->mt76.idx,
3196 };
3197 struct sk_buff *skb;
3198 int len = sizeof(hdr) + IEEE80211_NUM_ACS * sizeof(struct edca);
3199 int ac;
3200
3201 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len);
3202 if (!skb)
3203 return -ENOMEM;
3204
3205 skb_put_data(skb, &hdr, sizeof(hdr));
3206
3207 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) {
3208 struct ieee80211_tx_queue_params *q = &link->queue_params[ac];
3209 struct edca *e;
3210 struct tlv *tlv;
3211
3212 tlv = mt7996_mcu_add_uni_tlv(skb, MCU_EDCA_AC_PARAM, sizeof(*e));
3213
3214 e = (struct edca *)tlv;
3215 e->set = WMM_PARAM_SET;
3216 e->queue = ac;
3217 e->aifs = q->aifs;
3218 e->txop = cpu_to_le16(q->txop);
3219
3220 if (q->cw_min)
3221 e->cw_min = fls(q->cw_min);
3222 else
3223 e->cw_min = 5;
3224
3225 if (q->cw_max)
3226 e->cw_max = fls(q->cw_max);
3227 else
3228 e->cw_max = 10;
3229 }
3230
3231 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
3232 MCU_WM_UNI_CMD(EDCA_UPDATE), true);
3233 }
3234
mt7996_mcu_set_fcc5_lpn(struct mt7996_dev * dev,int val)3235 int mt7996_mcu_set_fcc5_lpn(struct mt7996_dev *dev, int val)
3236 {
3237 struct {
3238 u8 _rsv[4];
3239
3240 __le16 tag;
3241 __le16 len;
3242
3243 __le32 ctrl;
3244 __le16 min_lpn;
3245 u8 rsv[2];
3246 } __packed req = {
3247 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH),
3248 .len = cpu_to_le16(sizeof(req) - 4),
3249
3250 .ctrl = cpu_to_le32(0x1),
3251 .min_lpn = cpu_to_le16(val),
3252 };
3253
3254 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL),
3255 &req, sizeof(req), true);
3256 }
3257
mt7996_mcu_set_pulse_th(struct mt7996_dev * dev,const struct mt7996_dfs_pulse * pulse)3258 int mt7996_mcu_set_pulse_th(struct mt7996_dev *dev,
3259 const struct mt7996_dfs_pulse *pulse)
3260 {
3261 struct {
3262 u8 _rsv[4];
3263
3264 __le16 tag;
3265 __le16 len;
3266
3267 __le32 ctrl;
3268
3269 __le32 max_width; /* us */
3270 __le32 max_pwr; /* dbm */
3271 __le32 min_pwr; /* dbm */
3272 __le32 min_stgr_pri; /* us */
3273 __le32 max_stgr_pri; /* us */
3274 __le32 min_cr_pri; /* us */
3275 __le32 max_cr_pri; /* us */
3276 } __packed req = {
3277 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH),
3278 .len = cpu_to_le16(sizeof(req) - 4),
3279
3280 .ctrl = cpu_to_le32(0x3),
3281
3282 #define __req_field(field) .field = cpu_to_le32(pulse->field)
3283 __req_field(max_width),
3284 __req_field(max_pwr),
3285 __req_field(min_pwr),
3286 __req_field(min_stgr_pri),
3287 __req_field(max_stgr_pri),
3288 __req_field(min_cr_pri),
3289 __req_field(max_cr_pri),
3290 #undef __req_field
3291 };
3292
3293 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL),
3294 &req, sizeof(req), true);
3295 }
3296
mt7996_mcu_set_radar_th(struct mt7996_dev * dev,int index,const struct mt7996_dfs_pattern * pattern)3297 int mt7996_mcu_set_radar_th(struct mt7996_dev *dev, int index,
3298 const struct mt7996_dfs_pattern *pattern)
3299 {
3300 struct {
3301 u8 _rsv[4];
3302
3303 __le16 tag;
3304 __le16 len;
3305
3306 __le32 ctrl;
3307 __le16 radar_type;
3308
3309 u8 enb;
3310 u8 stgr;
3311 u8 min_crpn;
3312 u8 max_crpn;
3313 u8 min_crpr;
3314 u8 min_pw;
3315 __le32 min_pri;
3316 __le32 max_pri;
3317 u8 max_pw;
3318 u8 min_crbn;
3319 u8 max_crbn;
3320 u8 min_stgpn;
3321 u8 max_stgpn;
3322 u8 min_stgpr;
3323 u8 rsv[2];
3324 __le32 min_stgpr_diff;
3325 } __packed req = {
3326 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH),
3327 .len = cpu_to_le16(sizeof(req) - 4),
3328
3329 .ctrl = cpu_to_le32(0x2),
3330 .radar_type = cpu_to_le16(index),
3331
3332 #define __req_field_u8(field) .field = pattern->field
3333 #define __req_field_u32(field) .field = cpu_to_le32(pattern->field)
3334 __req_field_u8(enb),
3335 __req_field_u8(stgr),
3336 __req_field_u8(min_crpn),
3337 __req_field_u8(max_crpn),
3338 __req_field_u8(min_crpr),
3339 __req_field_u8(min_pw),
3340 __req_field_u32(min_pri),
3341 __req_field_u32(max_pri),
3342 __req_field_u8(max_pw),
3343 __req_field_u8(min_crbn),
3344 __req_field_u8(max_crbn),
3345 __req_field_u8(min_stgpn),
3346 __req_field_u8(max_stgpn),
3347 __req_field_u8(min_stgpr),
3348 __req_field_u32(min_stgpr_diff),
3349 #undef __req_field_u8
3350 #undef __req_field_u32
3351 };
3352
3353 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL),
3354 &req, sizeof(req), true);
3355 }
3356
3357 static int
mt7996_mcu_background_chain_ctrl(struct mt7996_phy * phy,struct cfg80211_chan_def * chandef,int cmd)3358 mt7996_mcu_background_chain_ctrl(struct mt7996_phy *phy,
3359 struct cfg80211_chan_def *chandef,
3360 int cmd)
3361 {
3362 struct mt7996_dev *dev = phy->dev;
3363 struct mt76_phy *mphy = phy->mt76;
3364 struct ieee80211_channel *chan = mphy->chandef.chan;
3365 int freq = mphy->chandef.center_freq1;
3366 struct mt7996_mcu_background_chain_ctrl req = {
3367 .tag = cpu_to_le16(0),
3368 .len = cpu_to_le16(sizeof(req) - 4),
3369 .monitor_scan_type = 2, /* simple rx */
3370 };
3371
3372 if (!chandef && cmd != CH_SWITCH_BACKGROUND_SCAN_STOP)
3373 return -EINVAL;
3374
3375 if (!cfg80211_chandef_valid(&mphy->chandef))
3376 return -EINVAL;
3377
3378 switch (cmd) {
3379 case CH_SWITCH_BACKGROUND_SCAN_START: {
3380 req.chan = chan->hw_value;
3381 req.central_chan = ieee80211_frequency_to_channel(freq);
3382 req.bw = mt76_connac_chan_bw(&mphy->chandef);
3383 req.monitor_chan = chandef->chan->hw_value;
3384 req.monitor_central_chan =
3385 ieee80211_frequency_to_channel(chandef->center_freq1);
3386 req.monitor_bw = mt76_connac_chan_bw(chandef);
3387 req.band_idx = phy->mt76->band_idx;
3388 req.scan_mode = 1;
3389 break;
3390 }
3391 case CH_SWITCH_BACKGROUND_SCAN_RUNNING:
3392 req.monitor_chan = chandef->chan->hw_value;
3393 req.monitor_central_chan =
3394 ieee80211_frequency_to_channel(chandef->center_freq1);
3395 req.band_idx = phy->mt76->band_idx;
3396 req.scan_mode = 2;
3397 break;
3398 case CH_SWITCH_BACKGROUND_SCAN_STOP:
3399 req.chan = chan->hw_value;
3400 req.central_chan = ieee80211_frequency_to_channel(freq);
3401 req.bw = mt76_connac_chan_bw(&mphy->chandef);
3402 req.tx_stream = hweight8(mphy->antenna_mask);
3403 req.rx_stream = mphy->antenna_mask;
3404 break;
3405 default:
3406 return -EINVAL;
3407 }
3408 req.band = chandef ? chandef->chan->band == NL80211_BAND_5GHZ : 1;
3409
3410 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(OFFCH_SCAN_CTRL),
3411 &req, sizeof(req), false);
3412 }
3413
mt7996_mcu_rdd_background_enable(struct mt7996_phy * phy,struct cfg80211_chan_def * chandef)3414 int mt7996_mcu_rdd_background_enable(struct mt7996_phy *phy,
3415 struct cfg80211_chan_def *chandef)
3416 {
3417 struct mt7996_dev *dev = phy->dev;
3418 int err, region;
3419
3420 if (!chandef) { /* disable offchain */
3421 err = mt7996_mcu_rdd_cmd(dev, RDD_STOP, MT_RX_SEL2,
3422 0, 0);
3423 if (err)
3424 return err;
3425
3426 return mt7996_mcu_background_chain_ctrl(phy, NULL,
3427 CH_SWITCH_BACKGROUND_SCAN_STOP);
3428 }
3429
3430 err = mt7996_mcu_background_chain_ctrl(phy, chandef,
3431 CH_SWITCH_BACKGROUND_SCAN_START);
3432 if (err)
3433 return err;
3434
3435 switch (dev->mt76.region) {
3436 case NL80211_DFS_ETSI:
3437 region = 0;
3438 break;
3439 case NL80211_DFS_JP:
3440 region = 2;
3441 break;
3442 case NL80211_DFS_FCC:
3443 default:
3444 region = 1;
3445 break;
3446 }
3447
3448 return mt7996_mcu_rdd_cmd(dev, RDD_START, MT_RX_SEL2,
3449 0, region);
3450 }
3451
mt7996_mcu_set_chan_info(struct mt7996_phy * phy,u16 tag)3452 int mt7996_mcu_set_chan_info(struct mt7996_phy *phy, u16 tag)
3453 {
3454 static const u8 ch_band[] = {
3455 [NL80211_BAND_2GHZ] = 0,
3456 [NL80211_BAND_5GHZ] = 1,
3457 [NL80211_BAND_6GHZ] = 2,
3458 };
3459 struct mt7996_dev *dev = phy->dev;
3460 struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
3461 int freq1 = chandef->center_freq1;
3462 u8 band_idx = phy->mt76->band_idx;
3463 struct {
3464 /* fixed field */
3465 u8 __rsv[4];
3466
3467 __le16 tag;
3468 __le16 len;
3469 u8 control_ch;
3470 u8 center_ch;
3471 u8 bw;
3472 u8 tx_path_num;
3473 u8 rx_path; /* mask or num */
3474 u8 switch_reason;
3475 u8 band_idx;
3476 u8 center_ch2; /* for 80+80 only */
3477 __le16 cac_case;
3478 u8 channel_band;
3479 u8 rsv0;
3480 __le32 outband_freq;
3481 u8 txpower_drop;
3482 u8 ap_bw;
3483 u8 ap_center_ch;
3484 u8 rsv1[53];
3485 } __packed req = {
3486 .tag = cpu_to_le16(tag),
3487 .len = cpu_to_le16(sizeof(req) - 4),
3488 .control_ch = chandef->chan->hw_value,
3489 .center_ch = ieee80211_frequency_to_channel(freq1),
3490 .bw = mt76_connac_chan_bw(chandef),
3491 .tx_path_num = hweight16(phy->mt76->chainmask),
3492 .rx_path = mt7996_rx_chainmask(phy) >> dev->chainshift[band_idx],
3493 .band_idx = band_idx,
3494 .channel_band = ch_band[chandef->chan->band],
3495 };
3496
3497 if (phy->mt76->hw->conf.flags & IEEE80211_CONF_MONITOR)
3498 req.switch_reason = CH_SWITCH_NORMAL;
3499 else if (phy->mt76->offchannel ||
3500 phy->mt76->hw->conf.flags & IEEE80211_CONF_IDLE)
3501 req.switch_reason = CH_SWITCH_SCAN_BYPASS_DPD;
3502 else if (!cfg80211_reg_can_beacon(phy->mt76->hw->wiphy, chandef,
3503 NL80211_IFTYPE_AP))
3504 req.switch_reason = CH_SWITCH_DFS;
3505 else
3506 req.switch_reason = CH_SWITCH_NORMAL;
3507
3508 if (tag == UNI_CHANNEL_SWITCH)
3509 req.rx_path = hweight8(req.rx_path);
3510
3511 if (chandef->width == NL80211_CHAN_WIDTH_80P80) {
3512 int freq2 = chandef->center_freq2;
3513
3514 req.center_ch2 = ieee80211_frequency_to_channel(freq2);
3515 }
3516
3517 return mt76_mcu_send_msg(&dev->mt76, MCU_WMWA_UNI_CMD(CHANNEL_SWITCH),
3518 &req, sizeof(req), true);
3519 }
3520
mt7996_mcu_set_eeprom_flash(struct mt7996_dev * dev)3521 static int mt7996_mcu_set_eeprom_flash(struct mt7996_dev *dev)
3522 {
3523 #define MAX_PAGE_IDX_MASK GENMASK(7, 5)
3524 #define PAGE_IDX_MASK GENMASK(4, 2)
3525 #define PER_PAGE_SIZE 0x400
3526 struct mt7996_mcu_eeprom req = {
3527 .tag = cpu_to_le16(UNI_EFUSE_BUFFER_MODE),
3528 .buffer_mode = EE_MODE_BUFFER
3529 };
3530 u16 eeprom_size = MT7996_EEPROM_SIZE;
3531 u8 total = DIV_ROUND_UP(eeprom_size, PER_PAGE_SIZE);
3532 u8 *eep = (u8 *)dev->mt76.eeprom.data;
3533 int eep_len, i;
3534
3535 for (i = 0; i < total; i++, eep += eep_len) {
3536 struct sk_buff *skb;
3537 int ret, msg_len;
3538
3539 if (i == total - 1 && !!(eeprom_size % PER_PAGE_SIZE))
3540 eep_len = eeprom_size % PER_PAGE_SIZE;
3541 else
3542 eep_len = PER_PAGE_SIZE;
3543
3544 msg_len = sizeof(req) + eep_len;
3545 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, msg_len);
3546 if (!skb)
3547 return -ENOMEM;
3548
3549 req.len = cpu_to_le16(msg_len - 4);
3550 req.format = FIELD_PREP(MAX_PAGE_IDX_MASK, total - 1) |
3551 FIELD_PREP(PAGE_IDX_MASK, i) | EE_FORMAT_WHOLE;
3552 req.buf_len = cpu_to_le16(eep_len);
3553
3554 skb_put_data(skb, &req, sizeof(req));
3555 skb_put_data(skb, eep, eep_len);
3556
3557 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,
3558 MCU_WM_UNI_CMD(EFUSE_CTRL), true);
3559 if (ret)
3560 return ret;
3561 }
3562
3563 return 0;
3564 }
3565
mt7996_mcu_set_eeprom(struct mt7996_dev * dev)3566 int mt7996_mcu_set_eeprom(struct mt7996_dev *dev)
3567 {
3568 struct mt7996_mcu_eeprom req = {
3569 .tag = cpu_to_le16(UNI_EFUSE_BUFFER_MODE),
3570 .len = cpu_to_le16(sizeof(req) - 4),
3571 .buffer_mode = EE_MODE_EFUSE,
3572 .format = EE_FORMAT_WHOLE
3573 };
3574
3575 if (dev->flash_mode)
3576 return mt7996_mcu_set_eeprom_flash(dev);
3577
3578 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(EFUSE_CTRL),
3579 &req, sizeof(req), true);
3580 }
3581
mt7996_mcu_get_eeprom(struct mt7996_dev * dev,u32 offset,u8 * buf,u32 buf_len)3582 int mt7996_mcu_get_eeprom(struct mt7996_dev *dev, u32 offset, u8 *buf, u32 buf_len)
3583 {
3584 struct {
3585 u8 _rsv[4];
3586
3587 __le16 tag;
3588 __le16 len;
3589 __le32 addr;
3590 __le32 valid;
3591 u8 data[16];
3592 } __packed req = {
3593 .tag = cpu_to_le16(UNI_EFUSE_ACCESS),
3594 .len = cpu_to_le16(sizeof(req) - 4),
3595 .addr = cpu_to_le32(round_down(offset,
3596 MT7996_EEPROM_BLOCK_SIZE)),
3597 };
3598 struct sk_buff *skb;
3599 bool valid;
3600 int ret;
3601
3602 ret = mt76_mcu_send_and_get_msg(&dev->mt76,
3603 MCU_WM_UNI_CMD_QUERY(EFUSE_CTRL),
3604 &req, sizeof(req), true, &skb);
3605 if (ret)
3606 return ret;
3607
3608 valid = le32_to_cpu(*(__le32 *)(skb->data + 16));
3609 if (valid) {
3610 u32 addr = le32_to_cpu(*(__le32 *)(skb->data + 12));
3611
3612 if (!buf)
3613 buf = (u8 *)dev->mt76.eeprom.data + addr;
3614 if (!buf_len || buf_len > MT7996_EEPROM_BLOCK_SIZE)
3615 buf_len = MT7996_EEPROM_BLOCK_SIZE;
3616
3617 skb_pull(skb, 48);
3618 memcpy(buf, skb->data, buf_len);
3619 } else {
3620 ret = -EINVAL;
3621 }
3622
3623 dev_kfree_skb(skb);
3624
3625 return ret;
3626 }
3627
mt7996_mcu_get_eeprom_free_block(struct mt7996_dev * dev,u8 * block_num)3628 int mt7996_mcu_get_eeprom_free_block(struct mt7996_dev *dev, u8 *block_num)
3629 {
3630 struct {
3631 u8 _rsv[4];
3632
3633 __le16 tag;
3634 __le16 len;
3635 u8 num;
3636 u8 version;
3637 u8 die_idx;
3638 u8 _rsv2;
3639 } __packed req = {
3640 .tag = cpu_to_le16(UNI_EFUSE_FREE_BLOCK),
3641 .len = cpu_to_le16(sizeof(req) - 4),
3642 .version = 2,
3643 };
3644 struct sk_buff *skb;
3645 int ret;
3646
3647 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WM_UNI_CMD_QUERY(EFUSE_CTRL), &req,
3648 sizeof(req), true, &skb);
3649 if (ret)
3650 return ret;
3651
3652 *block_num = *(u8 *)(skb->data + 8);
3653 dev_kfree_skb(skb);
3654
3655 return 0;
3656 }
3657
mt7996_mcu_get_chip_config(struct mt7996_dev * dev,u32 * cap)3658 int mt7996_mcu_get_chip_config(struct mt7996_dev *dev, u32 *cap)
3659 {
3660 #define NIC_CAP 3
3661 #define UNI_EVENT_CHIP_CONFIG_EFUSE_VERSION 0x21
3662 struct {
3663 u8 _rsv[4];
3664
3665 __le16 tag;
3666 __le16 len;
3667 } __packed req = {
3668 .tag = cpu_to_le16(NIC_CAP),
3669 .len = cpu_to_le16(sizeof(req) - 4),
3670 };
3671 struct sk_buff *skb;
3672 u8 *buf;
3673 int ret;
3674
3675 ret = mt76_mcu_send_and_get_msg(&dev->mt76,
3676 MCU_WM_UNI_CMD_QUERY(CHIP_CONFIG), &req,
3677 sizeof(req), true, &skb);
3678 if (ret)
3679 return ret;
3680
3681 /* fixed field */
3682 skb_pull(skb, 4);
3683
3684 buf = skb->data;
3685 while (buf - skb->data < skb->len) {
3686 struct tlv *tlv = (struct tlv *)buf;
3687
3688 switch (le16_to_cpu(tlv->tag)) {
3689 case UNI_EVENT_CHIP_CONFIG_EFUSE_VERSION:
3690 *cap = le32_to_cpu(*(__le32 *)(buf + sizeof(*tlv)));
3691 break;
3692 default:
3693 break;
3694 }
3695
3696 buf += le16_to_cpu(tlv->len);
3697 }
3698
3699 dev_kfree_skb(skb);
3700
3701 return 0;
3702 }
3703
mt7996_mcu_get_chan_mib_info(struct mt7996_phy * phy,bool chan_switch)3704 int mt7996_mcu_get_chan_mib_info(struct mt7996_phy *phy, bool chan_switch)
3705 {
3706 enum {
3707 IDX_TX_TIME,
3708 IDX_RX_TIME,
3709 IDX_OBSS_AIRTIME,
3710 IDX_NON_WIFI_TIME,
3711 IDX_NUM
3712 };
3713 struct {
3714 struct {
3715 u8 band;
3716 u8 __rsv[3];
3717 } hdr;
3718 struct {
3719 __le16 tag;
3720 __le16 len;
3721 __le32 offs;
3722 } data[IDX_NUM];
3723 } __packed req = {
3724 .hdr.band = phy->mt76->band_idx,
3725 };
3726 static const u32 offs[] = {
3727 [IDX_TX_TIME] = UNI_MIB_TX_TIME,
3728 [IDX_RX_TIME] = UNI_MIB_RX_TIME,
3729 [IDX_OBSS_AIRTIME] = UNI_MIB_OBSS_AIRTIME,
3730 [IDX_NON_WIFI_TIME] = UNI_MIB_NON_WIFI_TIME,
3731 };
3732 struct mt76_channel_state *state = phy->mt76->chan_state;
3733 struct mt76_channel_state *state_ts = &phy->state_ts;
3734 struct mt7996_dev *dev = phy->dev;
3735 struct mt7996_mcu_mib *res;
3736 struct sk_buff *skb;
3737 int i, ret;
3738
3739 for (i = 0; i < IDX_NUM; i++) {
3740 req.data[i].tag = cpu_to_le16(UNI_CMD_MIB_DATA);
3741 req.data[i].len = cpu_to_le16(sizeof(req.data[i]));
3742 req.data[i].offs = cpu_to_le32(offs[i]);
3743 }
3744
3745 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WM_UNI_CMD_QUERY(GET_MIB_INFO),
3746 &req, sizeof(req), true, &skb);
3747 if (ret)
3748 return ret;
3749
3750 skb_pull(skb, sizeof(req.hdr));
3751
3752 res = (struct mt7996_mcu_mib *)(skb->data);
3753
3754 if (chan_switch)
3755 goto out;
3756
3757 #define __res_u64(s) le64_to_cpu(res[s].data)
3758 state->cc_tx += __res_u64(IDX_TX_TIME) - state_ts->cc_tx;
3759 state->cc_bss_rx += __res_u64(IDX_RX_TIME) - state_ts->cc_bss_rx;
3760 state->cc_rx += __res_u64(IDX_RX_TIME) +
3761 __res_u64(IDX_OBSS_AIRTIME) -
3762 state_ts->cc_rx;
3763 state->cc_busy += __res_u64(IDX_TX_TIME) +
3764 __res_u64(IDX_RX_TIME) +
3765 __res_u64(IDX_OBSS_AIRTIME) +
3766 __res_u64(IDX_NON_WIFI_TIME) -
3767 state_ts->cc_busy;
3768 out:
3769 state_ts->cc_tx = __res_u64(IDX_TX_TIME);
3770 state_ts->cc_bss_rx = __res_u64(IDX_RX_TIME);
3771 state_ts->cc_rx = __res_u64(IDX_RX_TIME) + __res_u64(IDX_OBSS_AIRTIME);
3772 state_ts->cc_busy = __res_u64(IDX_TX_TIME) +
3773 __res_u64(IDX_RX_TIME) +
3774 __res_u64(IDX_OBSS_AIRTIME) +
3775 __res_u64(IDX_NON_WIFI_TIME);
3776 #undef __res_u64
3777
3778 dev_kfree_skb(skb);
3779
3780 return 0;
3781 }
3782
mt7996_mcu_get_temperature(struct mt7996_phy * phy)3783 int mt7996_mcu_get_temperature(struct mt7996_phy *phy)
3784 {
3785 #define TEMPERATURE_QUERY 0
3786 #define GET_TEMPERATURE 0
3787 struct {
3788 u8 _rsv[4];
3789
3790 __le16 tag;
3791 __le16 len;
3792
3793 u8 rsv1;
3794 u8 action;
3795 u8 band_idx;
3796 u8 rsv2;
3797 } req = {
3798 .tag = cpu_to_le16(TEMPERATURE_QUERY),
3799 .len = cpu_to_le16(sizeof(req) - 4),
3800 .action = GET_TEMPERATURE,
3801 .band_idx = phy->mt76->band_idx,
3802 };
3803 struct mt7996_mcu_thermal {
3804 u8 _rsv[4];
3805
3806 __le16 tag;
3807 __le16 len;
3808
3809 __le32 rsv;
3810 __le32 temperature;
3811 } __packed * res;
3812 struct sk_buff *skb;
3813 int ret;
3814 u32 temp;
3815
3816 ret = mt76_mcu_send_and_get_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL),
3817 &req, sizeof(req), true, &skb);
3818 if (ret)
3819 return ret;
3820
3821 res = (void *)skb->data;
3822 temp = le32_to_cpu(res->temperature);
3823 dev_kfree_skb(skb);
3824
3825 return temp;
3826 }
3827
mt7996_mcu_set_thermal_throttling(struct mt7996_phy * phy,u8 state)3828 int mt7996_mcu_set_thermal_throttling(struct mt7996_phy *phy, u8 state)
3829 {
3830 struct {
3831 u8 _rsv[4];
3832
3833 __le16 tag;
3834 __le16 len;
3835
3836 struct mt7996_mcu_thermal_ctrl ctrl;
3837 } __packed req = {
3838 .tag = cpu_to_le16(UNI_CMD_THERMAL_PROTECT_DUTY_CONFIG),
3839 .len = cpu_to_le16(sizeof(req) - 4),
3840 .ctrl = {
3841 .band_idx = phy->mt76->band_idx,
3842 },
3843 };
3844 int level, ret;
3845
3846 /* set duty cycle and level */
3847 for (level = 0; level < 4; level++) {
3848 req.ctrl.duty.duty_level = level;
3849 req.ctrl.duty.duty_cycle = state;
3850 state /= 2;
3851
3852 ret = mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL),
3853 &req, sizeof(req), false);
3854 if (ret)
3855 return ret;
3856 }
3857
3858 return 0;
3859 }
3860
mt7996_mcu_set_thermal_protect(struct mt7996_phy * phy,bool enable)3861 int mt7996_mcu_set_thermal_protect(struct mt7996_phy *phy, bool enable)
3862 {
3863 #define SUSTAIN_PERIOD 10
3864 struct {
3865 u8 _rsv[4];
3866
3867 __le16 tag;
3868 __le16 len;
3869
3870 struct mt7996_mcu_thermal_ctrl ctrl;
3871 struct mt7996_mcu_thermal_enable enable;
3872 } __packed req = {
3873 .len = cpu_to_le16(sizeof(req) - 4 - sizeof(req.enable)),
3874 .ctrl = {
3875 .band_idx = phy->mt76->band_idx,
3876 .type.protect_type = 1,
3877 .type.trigger_type = 1,
3878 },
3879 };
3880 int ret;
3881
3882 req.tag = cpu_to_le16(UNI_CMD_THERMAL_PROTECT_DISABLE);
3883
3884 ret = mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL),
3885 &req, sizeof(req) - sizeof(req.enable), false);
3886 if (ret || !enable)
3887 return ret;
3888
3889 /* set high-temperature trigger threshold */
3890 req.tag = cpu_to_le16(UNI_CMD_THERMAL_PROTECT_ENABLE);
3891 req.enable.restore_temp = cpu_to_le32(phy->throttle_temp[0]);
3892 req.enable.trigger_temp = cpu_to_le32(phy->throttle_temp[1]);
3893 req.enable.sustain_time = cpu_to_le16(SUSTAIN_PERIOD);
3894
3895 req.len = cpu_to_le16(sizeof(req) - 4);
3896
3897 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL),
3898 &req, sizeof(req), false);
3899 }
3900
mt7996_mcu_set_ser(struct mt7996_dev * dev,u8 action,u8 val,u8 band)3901 int mt7996_mcu_set_ser(struct mt7996_dev *dev, u8 action, u8 val, u8 band)
3902 {
3903 struct {
3904 u8 rsv[4];
3905
3906 __le16 tag;
3907 __le16 len;
3908
3909 union {
3910 struct {
3911 __le32 mask;
3912 } __packed set;
3913
3914 struct {
3915 u8 method;
3916 u8 band;
3917 u8 rsv2[2];
3918 } __packed trigger;
3919 };
3920 } __packed req = {
3921 .tag = cpu_to_le16(action),
3922 .len = cpu_to_le16(sizeof(req) - 4),
3923 };
3924
3925 switch (action) {
3926 case UNI_CMD_SER_SET:
3927 req.set.mask = cpu_to_le32(val);
3928 break;
3929 case UNI_CMD_SER_TRIGGER:
3930 req.trigger.method = val;
3931 req.trigger.band = band;
3932 break;
3933 default:
3934 return -EINVAL;
3935 }
3936
3937 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SER),
3938 &req, sizeof(req), false);
3939 }
3940
mt7996_mcu_set_txbf(struct mt7996_dev * dev,u8 action)3941 int mt7996_mcu_set_txbf(struct mt7996_dev *dev, u8 action)
3942 {
3943 #define MT7996_BF_MAX_SIZE sizeof(union bf_tag_tlv)
3944 #define BF_PROCESSING 4
3945 struct uni_header hdr;
3946 struct sk_buff *skb;
3947 struct tlv *tlv;
3948 int len = sizeof(hdr) + MT7996_BF_MAX_SIZE;
3949
3950 memset(&hdr, 0, sizeof(hdr));
3951
3952 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len);
3953 if (!skb)
3954 return -ENOMEM;
3955
3956 skb_put_data(skb, &hdr, sizeof(hdr));
3957
3958 switch (action) {
3959 case BF_SOUNDING_ON: {
3960 struct bf_sounding_on *req_snd_on;
3961
3962 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_snd_on));
3963 req_snd_on = (struct bf_sounding_on *)tlv;
3964 req_snd_on->snd_mode = BF_PROCESSING;
3965 break;
3966 }
3967 case BF_HW_EN_UPDATE: {
3968 struct bf_hw_en_status_update *req_hw_en;
3969
3970 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_hw_en));
3971 req_hw_en = (struct bf_hw_en_status_update *)tlv;
3972 req_hw_en->ebf = true;
3973 req_hw_en->ibf = dev->ibf;
3974 break;
3975 }
3976 case BF_MOD_EN_CTRL: {
3977 struct bf_mod_en_ctrl *req_mod_en;
3978
3979 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_mod_en));
3980 req_mod_en = (struct bf_mod_en_ctrl *)tlv;
3981 req_mod_en->bf_num = mt7996_band_valid(dev, MT_BAND2) ? 3 : 2;
3982 req_mod_en->bf_bitmap = mt7996_band_valid(dev, MT_BAND2) ?
3983 GENMASK(2, 0) : GENMASK(1, 0);
3984 break;
3985 }
3986 default:
3987 return -EINVAL;
3988 }
3989
3990 return mt76_mcu_skb_send_msg(&dev->mt76, skb, MCU_WM_UNI_CMD(BF), true);
3991 }
3992
3993 static int
mt7996_mcu_enable_obss_spr(struct mt7996_phy * phy,u16 action,u8 val)3994 mt7996_mcu_enable_obss_spr(struct mt7996_phy *phy, u16 action, u8 val)
3995 {
3996 struct mt7996_dev *dev = phy->dev;
3997 struct {
3998 u8 band_idx;
3999 u8 __rsv[3];
4000
4001 __le16 tag;
4002 __le16 len;
4003
4004 __le32 val;
4005 } __packed req = {
4006 .band_idx = phy->mt76->band_idx,
4007 .tag = cpu_to_le16(action),
4008 .len = cpu_to_le16(sizeof(req) - 4),
4009 .val = cpu_to_le32(val),
4010 };
4011
4012 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR),
4013 &req, sizeof(req), true);
4014 }
4015
4016 static int
mt7996_mcu_set_obss_spr_pd(struct mt7996_phy * phy,struct ieee80211_he_obss_pd * he_obss_pd)4017 mt7996_mcu_set_obss_spr_pd(struct mt7996_phy *phy,
4018 struct ieee80211_he_obss_pd *he_obss_pd)
4019 {
4020 struct mt7996_dev *dev = phy->dev;
4021 u8 max_th = 82, non_srg_max_th = 62;
4022 struct {
4023 u8 band_idx;
4024 u8 __rsv[3];
4025
4026 __le16 tag;
4027 __le16 len;
4028
4029 u8 pd_th_non_srg;
4030 u8 pd_th_srg;
4031 u8 period_offs;
4032 u8 rcpi_src;
4033 __le16 obss_pd_min;
4034 __le16 obss_pd_min_srg;
4035 u8 resp_txpwr_mode;
4036 u8 txpwr_restrict_mode;
4037 u8 txpwr_ref;
4038 u8 __rsv2[3];
4039 } __packed req = {
4040 .band_idx = phy->mt76->band_idx,
4041 .tag = cpu_to_le16(UNI_CMD_SR_SET_PARAM),
4042 .len = cpu_to_le16(sizeof(req) - 4),
4043 .obss_pd_min = cpu_to_le16(max_th),
4044 .obss_pd_min_srg = cpu_to_le16(max_th),
4045 .txpwr_restrict_mode = 2,
4046 .txpwr_ref = 21
4047 };
4048 int ret;
4049
4050 /* disable firmware dynamical PD asjustment */
4051 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_DPD, false);
4052 if (ret)
4053 return ret;
4054
4055 if (he_obss_pd->sr_ctrl &
4056 IEEE80211_HE_SPR_NON_SRG_OBSS_PD_SR_DISALLOWED)
4057 req.pd_th_non_srg = max_th;
4058 else if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_NON_SRG_OFFSET_PRESENT)
4059 req.pd_th_non_srg = max_th - he_obss_pd->non_srg_max_offset;
4060 else
4061 req.pd_th_non_srg = non_srg_max_th;
4062
4063 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_SRG_INFORMATION_PRESENT)
4064 req.pd_th_srg = max_th - he_obss_pd->max_offset;
4065
4066 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR),
4067 &req, sizeof(req), true);
4068 }
4069
4070 static int
mt7996_mcu_set_obss_spr_siga(struct mt7996_phy * phy,struct ieee80211_vif * vif,struct ieee80211_he_obss_pd * he_obss_pd)4071 mt7996_mcu_set_obss_spr_siga(struct mt7996_phy *phy, struct ieee80211_vif *vif,
4072 struct ieee80211_he_obss_pd *he_obss_pd)
4073 {
4074 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
4075 struct mt7996_dev *dev = phy->dev;
4076 u8 omac = mvif->deflink.mt76.omac_idx;
4077 struct {
4078 u8 band_idx;
4079 u8 __rsv[3];
4080
4081 __le16 tag;
4082 __le16 len;
4083
4084 u8 omac;
4085 u8 __rsv2[3];
4086 u8 flag[20];
4087 } __packed req = {
4088 .band_idx = phy->mt76->band_idx,
4089 .tag = cpu_to_le16(UNI_CMD_SR_SET_SIGA),
4090 .len = cpu_to_le16(sizeof(req) - 4),
4091 .omac = omac > HW_BSSID_MAX ? omac - 12 : omac,
4092 };
4093 int ret;
4094
4095 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_HESIGA_SR_VAL15_ALLOWED)
4096 req.flag[req.omac] = 0xf;
4097 else
4098 return 0;
4099
4100 /* switch to normal AP mode */
4101 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_MODE, 0);
4102 if (ret)
4103 return ret;
4104
4105 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR),
4106 &req, sizeof(req), true);
4107 }
4108
4109 static int
mt7996_mcu_set_obss_spr_bitmap(struct mt7996_phy * phy,struct ieee80211_he_obss_pd * he_obss_pd)4110 mt7996_mcu_set_obss_spr_bitmap(struct mt7996_phy *phy,
4111 struct ieee80211_he_obss_pd *he_obss_pd)
4112 {
4113 struct mt7996_dev *dev = phy->dev;
4114 struct {
4115 u8 band_idx;
4116 u8 __rsv[3];
4117
4118 __le16 tag;
4119 __le16 len;
4120
4121 __le32 color_l[2];
4122 __le32 color_h[2];
4123 __le32 bssid_l[2];
4124 __le32 bssid_h[2];
4125 } __packed req = {
4126 .band_idx = phy->mt76->band_idx,
4127 .tag = cpu_to_le16(UNI_CMD_SR_SET_SRG_BITMAP),
4128 .len = cpu_to_le16(sizeof(req) - 4),
4129 };
4130 u32 bitmap;
4131
4132 memcpy(&bitmap, he_obss_pd->bss_color_bitmap, sizeof(bitmap));
4133 req.color_l[req.band_idx] = cpu_to_le32(bitmap);
4134
4135 memcpy(&bitmap, he_obss_pd->bss_color_bitmap + 4, sizeof(bitmap));
4136 req.color_h[req.band_idx] = cpu_to_le32(bitmap);
4137
4138 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap, sizeof(bitmap));
4139 req.bssid_l[req.band_idx] = cpu_to_le32(bitmap);
4140
4141 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap + 4, sizeof(bitmap));
4142 req.bssid_h[req.band_idx] = cpu_to_le32(bitmap);
4143
4144 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), &req,
4145 sizeof(req), true);
4146 }
4147
mt7996_mcu_add_obss_spr(struct mt7996_phy * phy,struct ieee80211_vif * vif,struct ieee80211_he_obss_pd * he_obss_pd)4148 int mt7996_mcu_add_obss_spr(struct mt7996_phy *phy, struct ieee80211_vif *vif,
4149 struct ieee80211_he_obss_pd *he_obss_pd)
4150 {
4151 int ret;
4152
4153 /* enable firmware scene detection algorithms */
4154 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_SD,
4155 sr_scene_detect);
4156 if (ret)
4157 return ret;
4158
4159 /* firmware dynamically adjusts PD threshold so skip manual control */
4160 if (sr_scene_detect && !he_obss_pd->enable)
4161 return 0;
4162
4163 /* enable spatial reuse */
4164 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE,
4165 he_obss_pd->enable);
4166 if (ret)
4167 return ret;
4168
4169 if (sr_scene_detect || !he_obss_pd->enable)
4170 return 0;
4171
4172 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_TX, true);
4173 if (ret)
4174 return ret;
4175
4176 /* set SRG/non-SRG OBSS PD threshold */
4177 ret = mt7996_mcu_set_obss_spr_pd(phy, he_obss_pd);
4178 if (ret)
4179 return ret;
4180
4181 /* Set SR prohibit */
4182 ret = mt7996_mcu_set_obss_spr_siga(phy, vif, he_obss_pd);
4183 if (ret)
4184 return ret;
4185
4186 /* set SRG BSS color/BSSID bitmap */
4187 return mt7996_mcu_set_obss_spr_bitmap(phy, he_obss_pd);
4188 }
4189
mt7996_mcu_update_bss_color(struct mt7996_dev * dev,struct mt76_vif_link * mlink,struct cfg80211_he_bss_color * he_bss_color)4190 int mt7996_mcu_update_bss_color(struct mt7996_dev *dev,
4191 struct mt76_vif_link *mlink,
4192 struct cfg80211_he_bss_color *he_bss_color)
4193 {
4194 int len = sizeof(struct bss_req_hdr) + sizeof(struct bss_color_tlv);
4195 struct bss_color_tlv *bss_color;
4196 struct sk_buff *skb;
4197 struct tlv *tlv;
4198
4199 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, mlink, len);
4200 if (IS_ERR(skb))
4201 return PTR_ERR(skb);
4202
4203 tlv = mt76_connac_mcu_add_tlv(skb, UNI_BSS_INFO_BSS_COLOR,
4204 sizeof(*bss_color));
4205 bss_color = (struct bss_color_tlv *)tlv;
4206 bss_color->enable = he_bss_color->enabled;
4207 bss_color->color = he_bss_color->color;
4208
4209 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
4210 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true);
4211 }
4212
4213 #define TWT_AGRT_TRIGGER BIT(0)
4214 #define TWT_AGRT_ANNOUNCE BIT(1)
4215 #define TWT_AGRT_PROTECT BIT(2)
4216
mt7996_mcu_twt_agrt_update(struct mt7996_dev * dev,struct mt7996_vif * mvif,struct mt7996_twt_flow * flow,int cmd)4217 int mt7996_mcu_twt_agrt_update(struct mt7996_dev *dev,
4218 struct mt7996_vif *mvif,
4219 struct mt7996_twt_flow *flow,
4220 int cmd)
4221 {
4222 struct {
4223 /* fixed field */
4224 u8 bss;
4225 u8 _rsv[3];
4226
4227 __le16 tag;
4228 __le16 len;
4229 u8 tbl_idx;
4230 u8 cmd;
4231 u8 own_mac_idx;
4232 u8 flowid; /* 0xff for group id */
4233 __le16 peer_id; /* specify the peer_id (msb=0)
4234 * or group_id (msb=1)
4235 */
4236 u8 duration; /* 256 us */
4237 u8 bss_idx;
4238 __le64 start_tsf;
4239 __le16 mantissa;
4240 u8 exponent;
4241 u8 is_ap;
4242 u8 agrt_params;
4243 u8 __rsv2[23];
4244 } __packed req = {
4245 .tag = cpu_to_le16(UNI_CMD_TWT_ARGT_UPDATE),
4246 .len = cpu_to_le16(sizeof(req) - 4),
4247 .tbl_idx = flow->table_id,
4248 .cmd = cmd,
4249 .own_mac_idx = mvif->deflink.mt76.omac_idx,
4250 .flowid = flow->id,
4251 .peer_id = cpu_to_le16(flow->wcid),
4252 .duration = flow->duration,
4253 .bss = mvif->deflink.mt76.idx,
4254 .bss_idx = mvif->deflink.mt76.idx,
4255 .start_tsf = cpu_to_le64(flow->tsf),
4256 .mantissa = flow->mantissa,
4257 .exponent = flow->exp,
4258 .is_ap = true,
4259 };
4260
4261 if (flow->protection)
4262 req.agrt_params |= TWT_AGRT_PROTECT;
4263 if (!flow->flowtype)
4264 req.agrt_params |= TWT_AGRT_ANNOUNCE;
4265 if (flow->trigger)
4266 req.agrt_params |= TWT_AGRT_TRIGGER;
4267
4268 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(TWT),
4269 &req, sizeof(req), true);
4270 }
4271
mt7996_mcu_set_rts_thresh(struct mt7996_phy * phy,u32 val)4272 int mt7996_mcu_set_rts_thresh(struct mt7996_phy *phy, u32 val)
4273 {
4274 struct {
4275 u8 band_idx;
4276 u8 _rsv[3];
4277
4278 __le16 tag;
4279 __le16 len;
4280 __le32 len_thresh;
4281 __le32 pkt_thresh;
4282 } __packed req = {
4283 .band_idx = phy->mt76->band_idx,
4284 .tag = cpu_to_le16(UNI_BAND_CONFIG_RTS_THRESHOLD),
4285 .len = cpu_to_le16(sizeof(req) - 4),
4286 .len_thresh = cpu_to_le32(val),
4287 .pkt_thresh = cpu_to_le32(0x2),
4288 };
4289
4290 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG),
4291 &req, sizeof(req), true);
4292 }
4293
mt7996_mcu_set_radio_en(struct mt7996_phy * phy,bool enable)4294 int mt7996_mcu_set_radio_en(struct mt7996_phy *phy, bool enable)
4295 {
4296 struct {
4297 u8 band_idx;
4298 u8 _rsv[3];
4299
4300 __le16 tag;
4301 __le16 len;
4302 u8 enable;
4303 u8 _rsv2[3];
4304 } __packed req = {
4305 .band_idx = phy->mt76->band_idx,
4306 .tag = cpu_to_le16(UNI_BAND_CONFIG_RADIO_ENABLE),
4307 .len = cpu_to_le16(sizeof(req) - 4),
4308 .enable = enable,
4309 };
4310
4311 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG),
4312 &req, sizeof(req), true);
4313 }
4314
mt7996_mcu_rdd_cmd(struct mt7996_dev * dev,int cmd,u8 index,u8 rx_sel,u8 val)4315 int mt7996_mcu_rdd_cmd(struct mt7996_dev *dev, int cmd, u8 index,
4316 u8 rx_sel, u8 val)
4317 {
4318 struct {
4319 u8 _rsv[4];
4320
4321 __le16 tag;
4322 __le16 len;
4323
4324 u8 ctrl;
4325 u8 rdd_idx;
4326 u8 rdd_rx_sel;
4327 u8 val;
4328 u8 rsv[4];
4329 } __packed req = {
4330 .tag = cpu_to_le16(UNI_RDD_CTRL_PARM),
4331 .len = cpu_to_le16(sizeof(req) - 4),
4332 .ctrl = cmd,
4333 .rdd_idx = index,
4334 .rdd_rx_sel = rx_sel,
4335 .val = val,
4336 };
4337
4338 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL),
4339 &req, sizeof(req), true);
4340 }
4341
mt7996_mcu_wtbl_update_hdr_trans(struct mt7996_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)4342 int mt7996_mcu_wtbl_update_hdr_trans(struct mt7996_dev *dev,
4343 struct ieee80211_vif *vif,
4344 struct ieee80211_sta *sta)
4345 {
4346 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
4347 struct mt7996_sta *msta;
4348 struct sk_buff *skb;
4349
4350 msta = sta ? (struct mt7996_sta *)sta->drv_priv : &mvif->deflink.sta;
4351
4352 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->deflink.mt76,
4353 &msta->wcid,
4354 MT7996_STA_UPDATE_MAX_SIZE);
4355 if (IS_ERR(skb))
4356 return PTR_ERR(skb);
4357
4358 /* starec hdr trans */
4359 mt7996_mcu_sta_hdr_trans_tlv(dev, skb, vif, &msta->wcid);
4360 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
4361 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true);
4362 }
4363
mt7996_mcu_set_fixed_rate_table(struct mt7996_phy * phy,u8 table_idx,u16 rate_idx,bool beacon)4364 int mt7996_mcu_set_fixed_rate_table(struct mt7996_phy *phy, u8 table_idx,
4365 u16 rate_idx, bool beacon)
4366 {
4367 #define UNI_FIXED_RATE_TABLE_SET 0
4368 #define SPE_IXD_SELECT_TXD 0
4369 #define SPE_IXD_SELECT_BMC_WTBL 1
4370 struct mt7996_dev *dev = phy->dev;
4371 struct fixed_rate_table_ctrl req = {
4372 .tag = cpu_to_le16(UNI_FIXED_RATE_TABLE_SET),
4373 .len = cpu_to_le16(sizeof(req) - 4),
4374 .table_idx = table_idx,
4375 .rate_idx = cpu_to_le16(rate_idx),
4376 .gi = 1,
4377 .he_ltf = 1,
4378 };
4379 u8 band_idx = phy->mt76->band_idx;
4380
4381 if (beacon) {
4382 req.spe_idx_sel = SPE_IXD_SELECT_TXD;
4383 req.spe_idx = 24 + band_idx;
4384 phy->beacon_rate = rate_idx;
4385 } else {
4386 req.spe_idx_sel = SPE_IXD_SELECT_BMC_WTBL;
4387 }
4388
4389 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(FIXED_RATE_TABLE),
4390 &req, sizeof(req), false);
4391 }
4392
mt7996_mcu_rf_regval(struct mt7996_dev * dev,u32 regidx,u32 * val,bool set)4393 int mt7996_mcu_rf_regval(struct mt7996_dev *dev, u32 regidx, u32 *val, bool set)
4394 {
4395 struct {
4396 u8 __rsv1[4];
4397
4398 __le16 tag;
4399 __le16 len;
4400 __le16 idx;
4401 u8 __rsv2[2];
4402 __le32 ofs;
4403 __le32 data;
4404 } __packed *res, req = {
4405 .tag = cpu_to_le16(UNI_CMD_ACCESS_RF_REG_BASIC),
4406 .len = cpu_to_le16(sizeof(req) - 4),
4407
4408 .idx = cpu_to_le16(u32_get_bits(regidx, GENMASK(31, 24))),
4409 .ofs = cpu_to_le32(u32_get_bits(regidx, GENMASK(23, 0))),
4410 .data = set ? cpu_to_le32(*val) : 0,
4411 };
4412 struct sk_buff *skb;
4413 int ret;
4414
4415 if (set)
4416 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(REG_ACCESS),
4417 &req, sizeof(req), true);
4418
4419 ret = mt76_mcu_send_and_get_msg(&dev->mt76,
4420 MCU_WM_UNI_CMD_QUERY(REG_ACCESS),
4421 &req, sizeof(req), true, &skb);
4422 if (ret)
4423 return ret;
4424
4425 res = (void *)skb->data;
4426 *val = le32_to_cpu(res->data);
4427 dev_kfree_skb(skb);
4428
4429 return 0;
4430 }
4431
mt7996_mcu_trigger_assert(struct mt7996_dev * dev)4432 int mt7996_mcu_trigger_assert(struct mt7996_dev *dev)
4433 {
4434 struct {
4435 __le16 tag;
4436 __le16 len;
4437 u8 enable;
4438 u8 rsv[3];
4439 } __packed req = {
4440 .len = cpu_to_le16(sizeof(req) - 4),
4441 .enable = true,
4442 };
4443
4444 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(ASSERT_DUMP),
4445 &req, sizeof(req), false);
4446 }
4447
mt7996_mcu_set_rro(struct mt7996_dev * dev,u16 tag,u16 val)4448 int mt7996_mcu_set_rro(struct mt7996_dev *dev, u16 tag, u16 val)
4449 {
4450 struct {
4451 u8 __rsv1[4];
4452 __le16 tag;
4453 __le16 len;
4454 union {
4455 struct {
4456 u8 type;
4457 u8 __rsv2[3];
4458 } __packed platform_type;
4459 struct {
4460 u8 type;
4461 u8 dest;
4462 u8 __rsv2[2];
4463 } __packed bypass_mode;
4464 struct {
4465 u8 path;
4466 u8 __rsv2[3];
4467 } __packed txfree_path;
4468 struct {
4469 __le16 flush_one;
4470 __le16 flush_all;
4471 u8 __rsv2[4];
4472 } __packed timeout;
4473 };
4474 } __packed req = {
4475 .tag = cpu_to_le16(tag),
4476 .len = cpu_to_le16(sizeof(req) - 4),
4477 };
4478
4479 switch (tag) {
4480 case UNI_RRO_SET_PLATFORM_TYPE:
4481 req.platform_type.type = val;
4482 break;
4483 case UNI_RRO_SET_BYPASS_MODE:
4484 req.bypass_mode.type = val;
4485 break;
4486 case UNI_RRO_SET_TXFREE_PATH:
4487 req.txfree_path.path = val;
4488 break;
4489 case UNI_RRO_SET_FLUSH_TIMEOUT:
4490 req.timeout.flush_one = cpu_to_le16(val);
4491 req.timeout.flush_all = cpu_to_le16(2 * val);
4492 break;
4493 default:
4494 return -EINVAL;
4495 }
4496
4497 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RRO), &req,
4498 sizeof(req), true);
4499 }
4500
mt7996_mcu_get_all_sta_info(struct mt7996_phy * phy,u16 tag)4501 int mt7996_mcu_get_all_sta_info(struct mt7996_phy *phy, u16 tag)
4502 {
4503 struct mt7996_dev *dev = phy->dev;
4504 struct {
4505 u8 _rsv[4];
4506
4507 __le16 tag;
4508 __le16 len;
4509 } __packed req = {
4510 .tag = cpu_to_le16(tag),
4511 .len = cpu_to_le16(sizeof(req) - 4),
4512 };
4513
4514 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(ALL_STA_INFO),
4515 &req, sizeof(req), false);
4516 }
4517
mt7996_mcu_wed_rro_reset_sessions(struct mt7996_dev * dev,u16 id)4518 int mt7996_mcu_wed_rro_reset_sessions(struct mt7996_dev *dev, u16 id)
4519 {
4520 struct {
4521 u8 __rsv[4];
4522
4523 __le16 tag;
4524 __le16 len;
4525 __le16 session_id;
4526 u8 pad[4];
4527 } __packed req = {
4528 .tag = cpu_to_le16(UNI_RRO_DEL_BA_SESSION),
4529 .len = cpu_to_le16(sizeof(req) - 4),
4530 .session_id = cpu_to_le16(id),
4531 };
4532
4533 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RRO), &req,
4534 sizeof(req), true);
4535 }
4536
mt7996_mcu_set_sniffer_mode(struct mt7996_phy * phy,bool enabled)4537 int mt7996_mcu_set_sniffer_mode(struct mt7996_phy *phy, bool enabled)
4538 {
4539 struct mt7996_dev *dev = phy->dev;
4540 struct {
4541 u8 band_idx;
4542 u8 _rsv[3];
4543 __le16 tag;
4544 __le16 len;
4545 u8 enable;
4546 u8 _pad[3];
4547 } __packed req = {
4548 .band_idx = phy->mt76->band_idx,
4549 .tag = 0,
4550 .len = cpu_to_le16(sizeof(req) - 4),
4551 .enable = enabled,
4552 };
4553
4554 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SNIFFER), &req,
4555 sizeof(req), true);
4556 }
4557
mt7996_mcu_set_txpower_sku(struct mt7996_phy * phy)4558 int mt7996_mcu_set_txpower_sku(struct mt7996_phy *phy)
4559 {
4560 #define TX_POWER_LIMIT_TABLE_RATE 0
4561 struct mt7996_dev *dev = phy->dev;
4562 struct mt76_phy *mphy = phy->mt76;
4563 struct tx_power_limit_table_ctrl {
4564 u8 __rsv1[4];
4565
4566 __le16 tag;
4567 __le16 len;
4568 u8 power_ctrl_id;
4569 u8 power_limit_type;
4570 u8 band_idx;
4571 } __packed req = {
4572 .tag = cpu_to_le16(UNI_TXPOWER_POWER_LIMIT_TABLE_CTRL),
4573 .len = cpu_to_le16(sizeof(req) + MT7996_SKU_PATH_NUM - 4),
4574 .power_ctrl_id = UNI_TXPOWER_POWER_LIMIT_TABLE_CTRL,
4575 .power_limit_type = TX_POWER_LIMIT_TABLE_RATE,
4576 .band_idx = phy->mt76->band_idx,
4577 };
4578 struct mt76_power_limits la = {};
4579 struct sk_buff *skb;
4580 int i, tx_power;
4581
4582 tx_power = mt7996_get_power_bound(phy, phy->txpower);
4583 tx_power = mt76_get_rate_power_limits(mphy, mphy->chandef.chan,
4584 &la, tx_power);
4585 mphy->txpower_cur = tx_power;
4586
4587 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL,
4588 sizeof(req) + MT7996_SKU_PATH_NUM);
4589 if (!skb)
4590 return -ENOMEM;
4591
4592 skb_put_data(skb, &req, sizeof(req));
4593 /* cck and ofdm */
4594 skb_put_data(skb, &la.cck, sizeof(la.cck));
4595 skb_put_data(skb, &la.ofdm, sizeof(la.ofdm));
4596 /* ht20 */
4597 skb_put_data(skb, &la.mcs[0], 8);
4598 /* ht40 */
4599 skb_put_data(skb, &la.mcs[1], 9);
4600
4601 /* vht */
4602 for (i = 0; i < 4; i++) {
4603 skb_put_data(skb, &la.mcs[i], sizeof(la.mcs[i]));
4604 skb_put_zero(skb, 2); /* padding */
4605 }
4606
4607 /* he */
4608 skb_put_data(skb, &la.ru[0], sizeof(la.ru));
4609 /* eht */
4610 skb_put_data(skb, &la.eht[0], sizeof(la.eht));
4611
4612 /* padding */
4613 skb_put_zero(skb, MT7996_SKU_PATH_NUM - MT7996_SKU_RATE_NUM);
4614
4615 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
4616 MCU_WM_UNI_CMD(TXPOWER), true);
4617 }
4618
mt7996_mcu_cp_support(struct mt7996_dev * dev,u8 mode)4619 int mt7996_mcu_cp_support(struct mt7996_dev *dev, u8 mode)
4620 {
4621 __le32 cp_mode;
4622
4623 if (mode < mt76_connac_lmac_mapping(IEEE80211_AC_BE) ||
4624 mode > mt76_connac_lmac_mapping(IEEE80211_AC_VO))
4625 return -EINVAL;
4626
4627 cp_mode = cpu_to_le32(mode);
4628 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(CP_SUPPORT),
4629 &cp_mode, sizeof(cp_mode), true);
4630 }
4631