1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * i.MX9 OCOTP fusebox driver
4 *
5 * Copyright 2023 NXP
6 */
7
8 #include <linux/device.h>
9 #include <linux/io.h>
10 #include <linux/module.h>
11 #include <linux/nvmem-provider.h>
12 #include <linux/of.h>
13 #include <linux/platform_device.h>
14 #include <linux/slab.h>
15
16 enum fuse_type {
17 FUSE_FSB = BIT(0),
18 FUSE_ELE = BIT(1),
19 FUSE_ECC = BIT(2),
20 FUSE_INVALID = -1
21 };
22
23 struct ocotp_map_entry {
24 u32 start; /* start word */
25 u32 num; /* num words */
26 enum fuse_type type;
27 };
28
29 struct ocotp_devtype_data {
30 u32 reg_off;
31 char *name;
32 u32 size;
33 u32 num_entry;
34 u32 flag;
35 nvmem_reg_read_t reg_read;
36 struct ocotp_map_entry entry[];
37 };
38
39 struct imx_ocotp_priv {
40 struct device *dev;
41 void __iomem *base;
42 struct nvmem_config config;
43 struct mutex lock;
44 const struct ocotp_devtype_data *data;
45 };
46
imx_ocotp_fuse_type(void * context,u32 index)47 static enum fuse_type imx_ocotp_fuse_type(void *context, u32 index)
48 {
49 struct imx_ocotp_priv *priv = context;
50 const struct ocotp_devtype_data *data = priv->data;
51 u32 start, end;
52 int i;
53
54 for (i = 0; i < data->num_entry; i++) {
55 start = data->entry[i].start;
56 end = data->entry[i].start + data->entry[i].num;
57
58 if (index >= start && index < end)
59 return data->entry[i].type;
60 }
61
62 return FUSE_INVALID;
63 }
64
imx_ocotp_reg_read(void * context,unsigned int offset,void * val,size_t bytes)65 static int imx_ocotp_reg_read(void *context, unsigned int offset, void *val, size_t bytes)
66 {
67 struct imx_ocotp_priv *priv = context;
68 void __iomem *reg = priv->base + priv->data->reg_off;
69 u32 count, index, num_bytes;
70 enum fuse_type type;
71 u32 *buf;
72 void *p;
73 int i;
74 u8 skipbytes;
75
76 if (offset + bytes > priv->data->size)
77 bytes = priv->data->size - offset;
78
79 index = offset >> 2;
80 skipbytes = offset - (index << 2);
81 num_bytes = round_up(bytes + skipbytes, 4);
82 count = num_bytes >> 2;
83
84 p = kzalloc(num_bytes, GFP_KERNEL);
85 if (!p)
86 return -ENOMEM;
87
88 mutex_lock(&priv->lock);
89
90 buf = p;
91
92 for (i = index; i < (index + count); i++) {
93 type = imx_ocotp_fuse_type(context, i);
94 if (type == FUSE_INVALID || type == FUSE_ELE) {
95 *buf++ = 0;
96 continue;
97 }
98
99 if (type & FUSE_ECC)
100 *buf++ = readl_relaxed(reg + (i << 2)) & GENMASK(15, 0);
101 else
102 *buf++ = readl_relaxed(reg + (i << 2));
103 }
104
105 memcpy(val, ((u8 *)p) + skipbytes, bytes);
106
107 mutex_unlock(&priv->lock);
108
109 kfree(p);
110
111 return 0;
112 };
113
imx_ocotp_cell_pp(void * context,const char * id,int index,unsigned int offset,void * data,size_t bytes)114 static int imx_ocotp_cell_pp(void *context, const char *id, int index,
115 unsigned int offset, void *data, size_t bytes)
116 {
117 u8 *buf = data;
118 int i;
119
120 /* Deal with some post processing of nvmem cell data */
121 if (id && !strcmp(id, "mac-address"))
122 for (i = 0; i < bytes / 2; i++)
123 swap(buf[i], buf[bytes - i - 1]);
124
125 return 0;
126 }
127
imx_ocotp_fixup_dt_cell_info(struct nvmem_device * nvmem,struct nvmem_cell_info * cell)128 static void imx_ocotp_fixup_dt_cell_info(struct nvmem_device *nvmem,
129 struct nvmem_cell_info *cell)
130 {
131 cell->read_post_process = imx_ocotp_cell_pp;
132 }
133
imx_ele_ocotp_probe(struct platform_device * pdev)134 static int imx_ele_ocotp_probe(struct platform_device *pdev)
135 {
136 struct device *dev = &pdev->dev;
137 struct imx_ocotp_priv *priv;
138 struct nvmem_device *nvmem;
139
140 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
141 if (!priv)
142 return -ENOMEM;
143
144 priv->data = of_device_get_match_data(dev);
145
146 priv->base = devm_platform_ioremap_resource(pdev, 0);
147 if (IS_ERR(priv->base))
148 return PTR_ERR(priv->base);
149
150 priv->config.dev = dev;
151 priv->config.name = "ELE-OCOTP";
152 priv->config.id = NVMEM_DEVID_AUTO;
153 priv->config.owner = THIS_MODULE;
154 priv->config.size = priv->data->size;
155 priv->config.reg_read = priv->data->reg_read;
156 priv->config.word_size = 1;
157 priv->config.stride = 1;
158 priv->config.priv = priv;
159 priv->config.read_only = true;
160 priv->config.add_legacy_fixed_of_cells = true;
161 priv->config.fixup_dt_cell_info = imx_ocotp_fixup_dt_cell_info;
162 mutex_init(&priv->lock);
163
164 nvmem = devm_nvmem_register(dev, &priv->config);
165 if (IS_ERR(nvmem))
166 return PTR_ERR(nvmem);
167
168 return 0;
169 }
170
171 static const struct ocotp_devtype_data imx93_ocotp_data = {
172 .reg_off = 0x8000,
173 .reg_read = imx_ocotp_reg_read,
174 .size = 2048,
175 .num_entry = 6,
176 .entry = {
177 { 0, 52, FUSE_FSB },
178 { 63, 1, FUSE_ELE},
179 { 128, 16, FUSE_ELE },
180 { 182, 1, FUSE_ELE },
181 { 188, 1, FUSE_ELE },
182 { 312, 200, FUSE_FSB }
183 },
184 };
185
186 static const struct ocotp_devtype_data imx95_ocotp_data = {
187 .reg_off = 0x8000,
188 .reg_read = imx_ocotp_reg_read,
189 .size = 2048,
190 .num_entry = 12,
191 .entry = {
192 { 0, 1, FUSE_FSB | FUSE_ECC },
193 { 7, 1, FUSE_FSB | FUSE_ECC },
194 { 9, 3, FUSE_FSB | FUSE_ECC },
195 { 12, 24, FUSE_FSB },
196 { 36, 2, FUSE_FSB | FUSE_ECC },
197 { 38, 14, FUSE_FSB },
198 { 63, 1, FUSE_ELE },
199 { 128, 16, FUSE_ELE },
200 { 188, 1, FUSE_ELE },
201 { 317, 2, FUSE_FSB | FUSE_ECC },
202 { 320, 7, FUSE_FSB },
203 { 328, 184, FUSE_FSB }
204 },
205 };
206
207 static const struct of_device_id imx_ele_ocotp_dt_ids[] = {
208 { .compatible = "fsl,imx93-ocotp", .data = &imx93_ocotp_data, },
209 { .compatible = "fsl,imx95-ocotp", .data = &imx95_ocotp_data, },
210 {},
211 };
212 MODULE_DEVICE_TABLE(of, imx_ele_ocotp_dt_ids);
213
214 static struct platform_driver imx_ele_ocotp_driver = {
215 .driver = {
216 .name = "imx_ele_ocotp",
217 .of_match_table = imx_ele_ocotp_dt_ids,
218 },
219 .probe = imx_ele_ocotp_probe,
220 };
221 module_platform_driver(imx_ele_ocotp_driver);
222
223 MODULE_DESCRIPTION("i.MX OCOTP/ELE driver");
224 MODULE_AUTHOR("Peng Fan <[email protected]>");
225 MODULE_LICENSE("GPL");
226