History log of /XiangShan/src/main/scala/xiangshan/frontend/Frontend.scala (Results 126 – 143 of 143)
Revision Date Author Comments
# 036b8a85 16-Sep-2020 GouLingrui <[email protected]>

Merge remote-tracking branch 'origin/master' into br-his


# 89231490 11-Sep-2020 GouLingrui <[email protected]>

log clean ups


# fe1efe58 31-Aug-2020 zhanglinjuan <[email protected]>

cache/dtlb: add blocked itlb


# 590c2dd8 28-Aug-2020 jinyue110 <[email protected]>

SoC: add icache into XS SoC


# 3dc518aa 27-Aug-2020 jinyue110 <[email protected]>

icache/frontend: add ICache object

now use enableICache parameter we can choose ICache or FakeICache


# 395c0ea6 18-Aug-2020 jinyue110 <[email protected]>

Icache: fix syntax error


# 77409b73 18-Aug-2020 jinyue110 <[email protected]>

Frontend: connect icache into frontend


# a428082b 04-Aug-2020 LinJiawei <[email protected]>

Merge master into dev-fronend


# 42696a74 31-Jul-2020 zhanglinjuan <[email protected]>

frontend: refactor forntend pipeline


# b2e6921e 28-Jul-2020 LinJiawei <[email protected]>

Refactor redirect, cputest pass, microbench fail


# ccd5d342 15-Jul-2020 GouLingrui <[email protected]>

Fully merged origin/master


# eca3848f 15-Jul-2020 GouLingrui <[email protected]>

Merge remote-tracking branch 'origin/master' into dev-bpu-pipeline-rebase


# b9fd1892 14-Jul-2020 LinJiawei <[email protected]>

Remove xiangshan.utils


# 866dacaf 10-Jul-2020 jinyue110 <[email protected]>

IFU: add npc pipeline


# bfce7f7f 08-Jul-2020 jinyue <[email protected]>

Frontend: finish connection between FakeIcache and IFU


# a25b1bce 07-Jul-2020 LinJiawei <[email protected]>

Bundle/RedirectInfo: use redirectinfo update bpu


# 3457e5ad 25-Jun-2020 LinJiawei <[email protected]>

Frontend: add log


# 5844fcf0 16-Jun-2020 LinJiawei <[email protected]>

Initially completed the module interface design


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