| /aosp_15_r20/external/deqp-deps/SPIRV-Tools/source/opt/ |
| D | function.h | 55 Instruction& DefInst() { return *def_inst_; } in DefInst() function
56 const Instruction& DefInst() const { return *def_inst_; } in DefInst() function
|
| /aosp_15_r20/external/swiftshader/third_party/SPIRV-Tools/source/opt/ |
| H A D | function.h | 55 Instruction& DefInst() { return *def_inst_; } in DefInst() function
56 const Instruction& DefInst() const { return *def_inst_; } in DefInst() function
|
| /aosp_15_r20/external/angle/third_party/spirv-tools/src/source/opt/ |
| H A D | function.h | 55 Instruction& DefInst() { return *def_inst_; } in DefInst() function
56 const Instruction& DefInst() const { return *def_inst_; } in DefInst() function
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/BPF/ |
| H A D | BPFMISimplifyPatchable.cpp | 117 MachineInstr *DefInst = MO.getParent(); in checkADDrr() local
287 MachineInstr *DefInst = MRI->getUniqueVRegDef(SrcReg); in removeLD() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| H A D | BPFMISimplifyPatchable.cpp | 105 MachineInstr *DefInst = I->getParent(); in checkADDrr() local
257 MachineInstr *DefInst = MRI->getUniqueVRegDef(SrcReg); in removeLD() local
|
| /aosp_15_r20/external/llvm/lib/Target/AMDGPU/ |
| H A D | SILowerI1Copies.cpp | 110 MachineInstr *DefInst = MRI.getUniqueVRegDef(Src.getReg()); in runOnMachineFunction() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDGPUMemoryUtils.cpp | 119 Instruction *DefInst = Def->getMemoryInst(); in isReallyAClobber() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| H A D | SIFixupVectorISel.cpp | 96 MachineInstr *DefInst = MRI.getUniqueVRegDef(WOp->getReg()); in findSRegBaseAndIndex() local
|
| H A D | SIPeepholeSDWA.cpp | 530 const MachineInstr *DefInst = Def.getParent(); in foldToImm() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/ |
| H A D | RegAllocFast.cpp | 370 for (const MachineInstr &DefInst : MRI->def_instructions(VirtReg)) { in mayLiveOut() local
418 for (const MachineInstr &DefInst : MRI->def_instructions(VirtReg)) { in mayLiveIn() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| H A D | PPCBranchCoalescing.cpp | 462 MachineInstr *DefInst = MRI->getVRegDef(Use.getReg()); in canMoveToEnd() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/PowerPC/ |
| H A D | PPCBranchCoalescing.cpp | 465 MachineInstr *DefInst = MRI->getVRegDef(Use.getReg()); in canMoveToEnd() local
|
| H A D | PPCPreEmitPeephole.cpp | 258 MachineBasicBlock::iterator DefInst; in addLinkerOpt() member
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| H A D | HexagonCopyToCombine.cpp | 414 MachineInstr *DefInst = LastDef[Reg]; in findPotentialNewifiableTFRs() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Hexagon/ |
| H A D | HexagonCopyToCombine.cpp | 406 MachineInstr *DefInst = LastDef[Reg]; in findPotentialNewifiableTFRs() local
|
| /aosp_15_r20/external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonCopyToCombine.cpp | 400 MachineInstr *DefInst = LastDef[Reg]; in findPotentialNewifiableTFRs() local
|
| /aosp_15_r20/external/swiftshader/third_party/subzero/src/ |
| H A D | IceRegAlloc.cpp | 519 const Inst *DefInst = VMetadata->getFirstDefinitionSingleBlock(Iter.Cur); in findRegisterPreference() local
|
| /aosp_15_r20/external/llvm/lib/Transforms/Scalar/ |
| H A D | EarlyCSE.cpp | 282 Instruction *DefInst; member
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AMDGPU/ |
| H A D | SIPeepholeSDWA.cpp | 506 const MachineInstr *DefInst = Def.getParent(); in foldToImm() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Scalar/ |
| H A D | EarlyCSE.cpp | 520 Instruction *DefInst = nullptr; member
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| H A D | RegAllocFast.cpp | 303 for (const MachineInstr &DefInst : MRI->def_instructions(VirtReg)) { in mayLiveIn() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Transforms/Scalar/ |
| H A D | EarlyCSE.cpp | 577 Instruction *DefInst = nullptr; member
|
| H A D | DeadStoreElimination.cpp | 1987 Instruction *DefInst = Def->getMemoryInst(); in eliminateRedundantStoresOfExistingValues() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Analysis/ |
| H A D | MemorySSA.cpp | 265 Instruction *DefInst = MD->getMemoryInst(); in instructionClobbersQuery() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Analysis/ |
| H A D | MemorySSA.cpp | 289 Instruction *DefInst = MD->getMemoryInst(); in instructionClobbersQuery() local
|