| /aosp_15_r20/external/capstone/arch/ARM/ |
| H A D | ARMDisassembler.c | 1172 unsigned Rm = fieldFromInstruction_4(Val, 0, 4); in DecodeSORegImmOperand() local
1211 unsigned Rm = fieldFromInstruction_4(Val, 0, 4); in DecodeSORegRegOperand() local
1527 unsigned Rm = fieldFromInstruction_4(Insn, 0, 4); in DecodeAddrMode2IdxInstruction() local
1633 unsigned Rm = fieldFromInstruction_4(Val, 0, 4); in DecodeSORegMemOperand() local
1677 unsigned Rm = fieldFromInstruction_4(Insn, 0, 4); in DecodeAddrMode3Instruction() local
1899 unsigned Rm = fieldFromInstruction_4(Insn, 0, 4); in DecodeQADDInstruction() local
2156 unsigned Rm = fieldFromInstruction_4(Insn, 8, 4); in DecodeSMLAInstruction() local
2278 unsigned Rm = fieldFromInstruction_4(Val, 0, 4); in DecodeAddrMode6Operand() local
2295 unsigned wb, Rn, Rm; in DecodeVLDInstruction() local
2629 unsigned wb, Rn, Rm; in DecodeVSTInstruction() local
[all …]
|
| /aosp_15_r20/external/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 1140 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegImmOperand() local
1177 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegRegOperand() local
1477 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeAddrMode2IdxInstruction() local
1581 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegMemOperand() local
1626 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeAddrMode3Instruction() local
1845 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeQADDInstruction() local
2123 unsigned Rm = fieldFromInstruction(Insn, 8, 4); in DecodeSMLAInstruction() local
2151 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeTSTInstruction() local
2317 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeAddrMode6Operand() local
2339 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeVLDInstruction() local
[all …]
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 1664 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegImmOperand() local
1702 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegRegOperand() local
2046 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeAddrMode2IdxInstruction() local
2151 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegMemOperand() local
2209 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeAddrMode3Instruction() local
2430 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeQADDInstruction() local
2740 unsigned Rm = fieldFromInstruction(Insn, 8, 4); in DecodeSMLAInstruction() local
2769 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeTSTInstruction() local
2944 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeAddrMode6Operand() local
2967 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeVLDInstruction() local
[all …]
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 1453 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegImmOperand() local
1490 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegRegOperand() local
1829 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeAddrMode2IdxInstruction() local
1933 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegMemOperand() local
1978 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeAddrMode3Instruction() local
2197 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeQADDInstruction() local
2475 unsigned Rm = fieldFromInstruction(Insn, 8, 4); in DecodeSMLAInstruction() local
2503 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeTSTInstruction() local
2668 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeAddrMode6Operand() local
2690 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeVLDInstruction() local
[all …]
|
| /aosp_15_r20/external/swiftshader/third_party/subzero/src/ |
| H A D | IceAssemblerARM32.cpp | 334 IValueT encodeShiftRotateImm5(IValueT Rm, OperandARM32::ShiftKind Shift, in encodeShiftRotateImm5()
343 IValueT encodeShiftRotateReg(IValueT Rm, OperandARM32::ShiftKind Shift, in encodeShiftRotateReg()
389 IValueT Rm; in encodeOperand() local
985 RegARM32::GPRRegister Rm = getGPRReg(kRmShift, Address); in emitMemOp() local
1062 IValueT Rn, IValueT Rm) { in emitDivOp()
1129 IValueT Rn, IValueT Rm, IValueT Rs, in emitMulOp()
1159 IValueT Rm = encodeGPRegister(OpSrc0, "Rm", InstName); in emitSignExtend() local
1435 IValueT Rm = encodeGPRegister(Target, "Rm", BlxName); in blx() local
1443 void AssemblerARM32::bx(RegARM32::GPRRegister Rm, CondARM32::Cond Cond) { in bx()
1467 IValueT Rm = encodeGPRegister(OpSrc, RmName, ClzName); in clz() local
[all …]
|
| H A D | IceAssemblerX8664.h | 986 void emitRexRB(const Type Ty, const RegType Reg, const RmType Rm) { in emitRexRB()
992 const RmType Rm) { in emitRexRB()
999 template <typename RmType> void emitRexB(const Type Ty, const RmType Rm) { in emitRexB()
|
| /aosp_15_r20/external/vogar/src/vogar/commands/ |
| H A D | Rm.java | 25 public final class Rm { class
28 public Rm(Log log) { in Rm() method in Rm
|
| /aosp_15_r20/external/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 2821 unsigned Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
2828 unsigned Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
2858 unsigned Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
2870 unsigned Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
2889 unsigned Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
2909 unsigned Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
2917 unsigned Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
2935 unsigned Rm = MI.getOperand(4).getReg(); in getNumMicroOpsSwiftLdSt() local
2949 unsigned Rm = MI.getOperand(4).getReg(); in getNumMicroOpsSwiftLdSt() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 3375 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3382 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3412 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3424 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3443 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3463 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3471 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3489 Register Rm = MI.getOperand(4).getReg(); in getNumMicroOpsSwiftLdSt() local
3503 Register Rm = MI.getOperand(4).getReg(); in getNumMicroOpsSwiftLdSt() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 3521 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3528 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3558 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3570 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3589 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3609 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3617 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3635 Register Rm = MI.getOperand(4).getReg(); in getNumMicroOpsSwiftLdSt() local
3649 Register Rm = MI.getOperand(4).getReg(); in getNumMicroOpsSwiftLdSt() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64Disassembler.cpp | 1012 unsigned Rm = fieldFromInstruction(insn, 16, 5); in DecodeThreeAddrSRegInstruction() local
1614 unsigned Rm = fieldFromInstruction(insn, 16, 5); in DecodeAddSubERegInstruction() local
2032 unsigned Rm = fieldFromInstruction(insn, 16, 5); in DecodeSETMemOpInstruction() local
2065 uint64_t Rm = fieldFromInstruction(insn, 16, 5); in DecodePRFMRegInstruction() local
|
| /aosp_15_r20/prebuilts/go/linux-x86/src/cmd/go/internal/script/ |
| D | cmds.go | 878 func Rm() Cmd { func
|
| /aosp_15_r20/external/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64Disassembler.cpp | 745 unsigned Rm = fieldFromInstruction(insn, 16, 5); in DecodeThreeAddrSRegInstruction() local
1298 unsigned Rm = fieldFromInstruction(insn, 16, 5); in DecodeAddSubERegInstruction() local
|
| /aosp_15_r20/external/capstone/arch/AArch64/ |
| H A D | AArch64Disassembler.c | 837 unsigned Rm = fieldFromInstruction(insn, 16, 5); in DecodeThreeAddrSRegInstruction() local
1390 unsigned Rd, Rn, Rm; in DecodeAddSubERegInstruction() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64Disassembler.cpp | 938 unsigned Rm = fieldFromInstruction(insn, 16, 5); in DecodeThreeAddrSRegInstruction() local
1509 unsigned Rm = fieldFromInstruction(insn, 16, 5); in DecodeAddSubERegInstruction() local
|
| /aosp_15_r20/external/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCCodeEmitter.cpp | 866 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg()); in getThumbAddrModeRegRegOpValue() local
1073 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getLdStSORegOpValue() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCCodeEmitter.cpp | 933 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg()); in getThumbAddrModeRegRegOpValue() local
1256 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getLdStSORegOpValue() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCCodeEmitter.cpp | 939 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg()); in getThumbAddrModeRegRegOpValue() local
1257 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getLdStSORegOpValue() local
|
| /aosp_15_r20/external/XNNPACK/src/jit/ |
| H A D | aarch32-assembler.cc | 198 void Assembler::mov(Condition c, CoreRegister Rd, CoreRegister Rm) { in mov()
|
| /aosp_15_r20/frameworks/libs/binary_translation/assembler/include/berberis/assembler/ |
| D | riscv.h | 977 RoundingOperand Rm(Rounding value) { return {value}; } in Rm() function
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64InstPrinter.cpp | 841 unsigned Rm = MI->getOperand(2).getReg(); in printRangePrefetchAlias() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 953 int Rn = 0, Rm = 0; in buildHvxVectorReg() local
|
| /aosp_15_r20/external/conscrypt/benchmark-android/ |
| HD | vogar.jar | META-INF/
META-INF/MANIFEST.MF
vogar/
vogar/TestProperties.class
TestProperties ... |
| /aosp_15_r20/prebuilts/cmdline-tools/tools/lib/ |
| HD | r8.jar | resources/new_api_database.ser
LICENSE
META-INF/MANIFEST.MF
META-INF/services/ ... |
| /aosp_15_r20/prebuilts/sdk/tools/windows/lib/ |
| HD | d8.jar | META-INF/
META-INF/MANIFEST.MF
META-INF/services/com. ... |