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Searched defs:entry (Results 1 – 9 of 9) sorted by relevance

/XiangShan/src/main/scala/xiangshan/frontend/icache/
H A DInstrUncache.scala193 val entry = Module(new InstrMMIOEntry(edge)) constant
H A DWayLookup.scala49 val entry = new WayLookupEntry constant
H A DICache.scala236 val entry = Wire(new ICacheMetaEntry) constant
403 val entry = Wire(new ICacheDataEntry) constant
/XiangShan/src/main/scala/xiangshan/cache/dcache/mainpipe/
H A DProbe.scala166 val entry = Module(new ProbeEntry) constant
/XiangShan/src/main/scala/xiangshan/cache/mmu/
H A DMMUBundle.scala1090 val entry = new PtwEntry(tagLen = vpnLen, hasPerm = true, hasLevel = true) constant
1113 val entry = new PtwEntry(tagLen = gvpnLen, hasPerm = true, hasLevel = true, hasNapot = true) constant
1162 …val entry = new PtwSectorEntry(tagLen = sectorvpnLen, hasPerm = true, hasLevel = true, hasNapot = … constant
1234 …val entry = Vec(tlbcontiguous, new PtwMergeEntry(tagLen = sectorvpnLen, hasPerm = true, hasLevel =… constant
/XiangShan/src/main/scala/xiangshan/mem/vector/
H A DVMergeBuffer.scala253 val entry = entries(pipeWbMbIndex) constant
/XiangShan/src/main/scala/device/
H A DMemEncrypt.scala802 val entry = table(io.write_req.keyid) constant
807 val entry = table(io.write_req.keyid) constant
/XiangShan/src/main/scala/xiangshan/backend/issue/
H A DEntryBundles.scala140 val entry = ValidIO(new EntryBundle) constant
/XiangShan/src/main/scala/xiangshan/frontend/
H A DFTB.scala417 val entry = new FTBEntry constant