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Searched refs:hci_cmd_buffer (Results 1 – 17 of 17) sorted by relevance

/btstack/chipset/cc256x/
H A Dbtstack_chipset_cc256x.c181 static void chipset_set_baudrate_command(uint32_t baudrate, uint8_t *hci_cmd_buffer){ in chipset_set_baudrate_command() argument
182 hci_cmd_buffer[0] = 0x36; in chipset_set_baudrate_command()
183 hci_cmd_buffer[1] = 0xFF; in chipset_set_baudrate_command()
184 hci_cmd_buffer[2] = 0x04; in chipset_set_baudrate_command()
185 hci_cmd_buffer[3] = baudrate & 0xff; in chipset_set_baudrate_command()
186 hci_cmd_buffer[4] = (baudrate >> 8) & 0xff; in chipset_set_baudrate_command()
187 hci_cmd_buffer[5] = (baudrate >> 16) & 0xff; in chipset_set_baudrate_command()
188 hci_cmd_buffer[6] = 0; in chipset_set_baudrate_command()
191 static void chipset_set_bd_addr_command(bd_addr_t addr, uint8_t *hci_cmd_buffer){ in chipset_set_bd_addr_command() argument
192 hci_cmd_buffer[0] = 0x06; in chipset_set_bd_addr_command()
[all …]
H A Dant_cmd.c58 static uint16_t ant_cmd_create_from_template(uint8_t *hci_cmd_buffer, const ant_cmd_t *cmd, va_list… in ant_cmd_create_from_template() argument
60 hci_cmd_buffer[0] = 0xd1; in ant_cmd_create_from_template()
61 hci_cmd_buffer[1] = 0xfd; in ant_cmd_create_from_template()
64 hci_cmd_buffer[4] = 0x00; in ant_cmd_create_from_template()
65 hci_cmd_buffer[6] = cmd->message_id; in ant_cmd_create_from_template()
75 hci_cmd_buffer[pos++] = 0; in ant_cmd_create_from_template()
80 hci_cmd_buffer[pos++] = word & 0xff; in ant_cmd_create_from_template()
82 hci_cmd_buffer[pos++] = word >> 8; in ant_cmd_create_from_template()
86 hci_cmd_buffer[pos++] = word >> 8; in ant_cmd_create_from_template()
93 hci_cmd_buffer[pos++] = longword; in ant_cmd_create_from_template()
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H A Dant_cmd.h159 uint16_t ant_create_cmd(uint8_t *hci_cmd_buffer, const ant_cmd_t *cmd, ...);
/btstack/chipset/bcm/
H A Dbtstack_chipset_bcm.c90 static void chipset_set_baudrate_command(uint32_t baudrate, uint8_t *hci_cmd_buffer){ in chipset_set_baudrate_command() argument
91 hci_cmd_buffer[0] = 0x18; in chipset_set_baudrate_command()
92 hci_cmd_buffer[1] = 0xfc; in chipset_set_baudrate_command()
93 hci_cmd_buffer[2] = 0x06; in chipset_set_baudrate_command()
94 hci_cmd_buffer[3] = 0x00; in chipset_set_baudrate_command()
95 hci_cmd_buffer[4] = 0x00; in chipset_set_baudrate_command()
96 little_endian_store_32(hci_cmd_buffer, 5, baudrate); in chipset_set_baudrate_command()
100 static void chipset_set_bd_addr_command(bd_addr_t addr, uint8_t *hci_cmd_buffer){ in chipset_set_bd_addr_command() argument
101 hci_cmd_buffer[0] = 0x01; in chipset_set_bd_addr_command()
102 hci_cmd_buffer[1] = 0xfc; in chipset_set_bd_addr_command()
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/btstack/chipset/csr/
H A Dbtstack_chipset_csr.c112 static enum update_result update_init_script_command(uint8_t *hci_cmd_buffer){ in update_init_script_command() argument
113 uint16_t varid = little_endian_read_16(hci_cmd_buffer, 10); in update_init_script_command()
115 uint16_t key = little_endian_read_16(hci_cmd_buffer, 14); in update_init_script_command()
121 hci_cmd_buffer[20] = bd_addr[3]; in update_init_script_command()
122 hci_cmd_buffer[22] = bd_addr[5]; in update_init_script_command()
123 hci_cmd_buffer[23] = bd_addr[4]; in update_init_script_command()
124 hci_cmd_buffer[24] = bd_addr[2]; in update_init_script_command()
125 hci_cmd_buffer[26] = bd_addr[1]; in update_init_script_command()
126 hci_cmd_buffer[27] = bd_addr[0]; in update_init_script_command()
136 little_endian_store_16(hci_cmd_buffer, 20, baudrate >> 16); in update_init_script_command()
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/btstack/chipset/em9301/
H A Dbtstack_chipset_em9301.c172 static void chipset_set_bd_addr_command(bd_addr_t addr, uint8_t *hci_cmd_buffer){ in chipset_set_bd_addr_command() argument
173 little_endian_store_16(hci_cmd_buffer, 0, OPCODE(OGF_VENDOR, 0x02)); in chipset_set_bd_addr_command()
174 hci_cmd_buffer[2] = 0x06; in chipset_set_bd_addr_command()
175 reverse_bd_addr(addr, &hci_cmd_buffer[3]); in chipset_set_bd_addr_command()
178 static void chipset_set_baudrate_command(uint32_t baudrate, uint8_t *hci_cmd_buffer){ in chipset_set_baudrate_command() argument
192 little_endian_store_16(hci_cmd_buffer, 0, OPCODE(OGF_VENDOR, 0x07)); in chipset_set_baudrate_command()
193 hci_cmd_buffer[2] = 0x01; in chipset_set_baudrate_command()
194 hci_cmd_buffer[3] = i; in chipset_set_baudrate_command()
205 static btstack_chipset_result_t chipset_next_command(uint8_t * hci_cmd_buffer){ in chipset_next_command() argument
211 little_endian_store_16(hci_cmd_buffer, 0, HCI_OPCODE_EM_CPU_RESET); in chipset_next_command()
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/btstack/chipset/stlc2500d/
H A Dbtstack_chipset_stlc2500d.c59 static void chipset_set_baudrate_command(uint32_t baudrate, uint8_t *hci_cmd_buffer){ in chipset_set_baudrate_command() argument
94 little_endian_store_16(hci_cmd_buffer, 0, OPCODE(OGF_VENDOR, 0xfc)); in chipset_set_baudrate_command()
95 hci_cmd_buffer[2] = 0x01; in chipset_set_baudrate_command()
96 hci_cmd_buffer[3] = preset; in chipset_set_baudrate_command()
99 static void chipset_set_bd_addr_command(bd_addr_t addr, uint8_t *hci_cmd_buffer){ in chipset_set_bd_addr_command() argument
100 little_endian_store_16(hci_cmd_buffer, 0, OPCODE(OGF_VENDOR, 0x22)); in chipset_set_bd_addr_command()
101 hci_cmd_buffer[2] = 0x08; in chipset_set_bd_addr_command()
102 hci_cmd_buffer[3] = 254; in chipset_set_bd_addr_command()
103 hci_cmd_buffer[4] = 0x06; in chipset_set_bd_addr_command()
104 reverse_bd_addr(addr, &hci_cmd_buffer[5]); in chipset_set_bd_addr_command()
/btstack/src/
H A Dhci_cmd.c88 uint16_t hci_cmd_create_from_template(uint8_t *hci_cmd_buffer, const hci_cmd_t *cmd, va_list argptr… in hci_cmd_create_from_template() argument
90 hci_cmd_buffer[0] = cmd->opcode & 0xffu; in hci_cmd_create_from_template()
91 hci_cmd_buffer[1] = cmd->opcode >> 8; in hci_cmd_create_from_template()
119 hci_cmd_buffer[pos++] = word & 0xffu; in hci_cmd_create_from_template()
123 hci_cmd_buffer[pos++] = word & 0xffu; in hci_cmd_create_from_template()
124 hci_cmd_buffer[pos++] = word >> 8; in hci_cmd_create_from_template()
128 hci_cmd_buffer[pos++] = word & 0xffu; in hci_cmd_create_from_template()
129 hci_cmd_buffer[pos++] = word >> 8; in hci_cmd_create_from_template()
133 hci_cmd_buffer[pos++] = longword; in hci_cmd_create_from_template()
134 hci_cmd_buffer[pos++] = longword >> 8; in hci_cmd_create_from_template()
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H A Dbtstack_chipset.h83 btstack_chipset_result_t (*next_command)(uint8_t * hci_cmd_buffer);
90 void (*set_baudrate_command)(uint32_t baudrate, uint8_t *hci_cmd_buffer);
96 void (*set_bd_addr_command)(bd_addr_t addr, uint8_t *hci_cmd_buffer);
H A Dhci_cmd.h676 uint16_t hci_cmd_create_from_template(uint8_t *hci_cmd_buffer, const hci_cmd_t *cmd, va_list argptr…
686 uint16_t hci_cmd_create_from_template_with_vargs(uint8_t * hci_cmd_buffer, const hci_cmd_t * cmd, .…
/btstack/chipset/tc3566x/
H A Dbtstack_chipset_tc3566x.c64 static void chipset_set_baudrate_command(uint32_t baudrate, uint8_t *hci_cmd_buffer){ in chipset_set_baudrate_command() argument
89 memcpy(hci_cmd_buffer, baudrate_command, sizeof(baudrate_command)); in chipset_set_baudrate_command()
90 little_endian_store_16(hci_cmd_buffer, 13, div1); in chipset_set_baudrate_command()
91 hci_cmd_buffer[15] = div2; in chipset_set_baudrate_command()
94 static void chipset_set_bd_addr_command(bd_addr_t addr, uint8_t *hci_cmd_buffer){ in chipset_set_bd_addr_command() argument
96 hci_cmd_buffer[0] = 0x13; in chipset_set_bd_addr_command()
97 hci_cmd_buffer[1] = 0x10; in chipset_set_bd_addr_command()
98 hci_cmd_buffer[2] = 0x06; in chipset_set_bd_addr_command()
99 reverse_bd_addr(addr, &hci_cmd_buffer[3]); in chipset_set_bd_addr_command()
/btstack/test/embedded/
H A Dhci_cmd_test.cpp7 static uint8_t hci_cmd_buffer[350]; variable
13 uint16_t len = hci_cmd_create_from_template(hci_cmd_buffer, cmd, argptr); in create_hci_cmd()
63 MEMCMP_EQUAL(expected_buffer, &hci_cmd_buffer[3], sizeof(expected_buffer)); in TEST()
70 MEMCMP_EQUAL(expected_buffer, &hci_cmd_buffer[3], sizeof(expected_buffer)); in TEST()
77 MEMCMP_EQUAL(expected_buffer, &hci_cmd_buffer[3], sizeof(expected_buffer)); in TEST()
84 MEMCMP_EQUAL(expected_buffer, &hci_cmd_buffer[3], sizeof(expected_buffer)); in TEST()
93 MEMCMP_EQUAL(input_buffer, &hci_cmd_buffer[3], expected_size); in TEST()
104 MEMCMP_EQUAL(expected_buffer, &hci_cmd_buffer[3], expected_size); in TEST()
113 MEMCMP_EQUAL(input_buffer, &hci_cmd_buffer[3], expected_size); in TEST()
122 MEMCMP_EQUAL(input_buffer, &hci_cmd_buffer[3], expected_size); in TEST()
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/btstack/chipset/atwilc3000/
H A Dbtstack_chipset_atwilc3000.c112 static void atwilc3000_set_baudrate_command(uint32_t baudrate, uint8_t *hci_cmd_buffer){ in atwilc3000_set_baudrate_command() argument
113 hci_cmd_buffer[0] = 0x53; in atwilc3000_set_baudrate_command()
114 hci_cmd_buffer[1] = 0xfc; in atwilc3000_set_baudrate_command()
115 hci_cmd_buffer[2] = 5; in atwilc3000_set_baudrate_command()
116 little_endian_store_32(hci_cmd_buffer, 3, baudrate); in atwilc3000_set_baudrate_command()
117 hci_cmd_buffer[7] = atwilc3000_flowcontrol; // use global state in atwilc3000_set_baudrate_command()
120 static void atwilc3000_set_bd_addr_command(bd_addr_t addr, uint8_t *hci_cmd_buffer){ in atwilc3000_set_bd_addr_command() argument
121 hci_cmd_buffer[0] = 0x54; in atwilc3000_set_bd_addr_command()
122 hci_cmd_buffer[1] = 0xFC; in atwilc3000_set_bd_addr_command()
123 hci_cmd_buffer[2] = 0x06; in atwilc3000_set_bd_addr_command()
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/btstack/chipset/zephyr/
H A Dbtstack_chipset_zephyr.c72 static btstack_chipset_result_t chipset_next_command(uint8_t * hci_cmd_buffer){ in chipset_next_command() argument
81 memcpy(&hci_cmd_buffer[0], (uint8_t *) &init_script[init_script_offset], 3); in chipset_next_command()
83 int payload_len = hci_cmd_buffer[2]; in chipset_next_command()
85 memcpy(&hci_cmd_buffer[3], (uint8_t *) &init_script[init_script_offset], payload_len); in chipset_next_command()
/btstack/chipset/nxp/
H A Dbtstack_chipset_nxp.c478 static btstack_chipset_result_t nxp_next_command(uint8_t * hci_cmd_buffer) { in nxp_next_command() argument
487 …hci_cmd_create_from_template_with_vargs(hci_cmd_buffer, &hci_nxp_set_sco_data_path, nxp_chipset_sc… in nxp_next_command()
494 … hci_cmd_create_from_template_with_vargs(hci_cmd_buffer, &hci_nxp_host_pcm_i2s_control_enable, 1); in nxp_next_command()
499 … hci_cmd_create_from_template_with_vargs(hci_cmd_buffer, &hci_nxp_write_pcm_i2s_settings, 0x02); in nxp_next_command()
505 …hci_cmd_create_from_template_with_vargs(hci_cmd_buffer, &hci_nxp_write_pcm_i2s_sync_settings, 0x03… in nxp_next_command()
508 …hci_cmd_create_from_template_with_vargs(hci_cmd_buffer, &hci_nxp_write_pcm_i2s_sync_settings, 0x03… in nxp_next_command()
514 … hci_cmd_create_from_template_with_vargs(hci_cmd_buffer, &hci_nxp_write_pcm_link_settings, 0x0004); in nxp_next_command()
/btstack/chipset/realtek/
H A Dbtstack_chipset_realtek.c776 static uint8_t update_firmware(const char *firmware, const char *config, uint8_t *hci_cmd_buffer) { in update_firmware() argument
934 little_endian_store_16(hci_cmd_buffer, 0, HCI_OPCODE_HCI_RTK_DOWNLOAD_FW); in update_firmware()
935 HCI_CMD_SET_LENGTH(hci_cmd_buffer, len + 1); in update_firmware()
936 HCI_CMD_DOWNLOAD_SET_INDEX(hci_cmd_buffer, index); in update_firmware()
937 HCI_CMD_DOWNLOAD_COPY_FW_DATA(hci_cmd_buffer, patch_buf, fw_ptr, len); in update_firmware()
959 static btstack_chipset_result_t chipset_next_command(uint8_t *hci_cmd_buffer) { in chipset_next_command() argument
965 … memcpy(hci_cmd_buffer, hci_realtek_read_lmp_subversion, sizeof(hci_realtek_read_lmp_subversion)); in chipset_next_command()
969 … memcpy(hci_cmd_buffer, hci_realtek_read_hci_revision, sizeof(hci_realtek_read_hci_revision)); in chipset_next_command()
977 HCI_CMD_SET_OPCODE(hci_cmd_buffer, HCI_OPCODE_HCI_RTK_READ_ROM_VERSION); in chipset_next_command()
978 HCI_CMD_SET_LENGTH(hci_cmd_buffer, 0); in chipset_next_command()
[all …]
/btstack/platform/daemon/src/
H A Dbtstack.c61 static uint8_t hci_cmd_buffer[HCI_ACL_BUFFER_SIZE]; // BTstack command packets are not size restric… variable
126 uint16_t len = hci_cmd_create_from_template(hci_cmd_buffer, cmd, argptr); in bt_send_cmd()
128 …socket_connection_send_packet(btstack_connection, HCI_COMMAND_DATA_PACKET, 0, hci_cmd_buffer, len); in bt_send_cmd()