xref: /XiangShan/src/main/scala/xiangshan/backend/fu/NewCSR/ExceptionBundle.scala (revision ca0aa83543eb9914b4fb4162ff18e90463149da3) 
1package xiangshan.backend.fu.NewCSR
2
3import xiangshan.backend.fu.NewCSR.CSRDefines.{
4  CSRRWField => RW,
5}
6
7class ExceptionBundle extends CSRBundle {
8  val EX_IAM    = RW(0)
9  val EX_IAF    = RW(1)
10  val EX_II     = RW(2)
11  val EX_BP     = RW(3)
12  val EX_LAM    = RW(4)
13  val EX_LAF    = RW(5)
14  val EX_SAM    = RW(6)
15  val EX_SAF    = RW(7)
16  val EX_UCALL  = RW(8)
17  val EX_HSCALL = RW(9)
18  val EX_VSCALL = RW(10)
19  val EX_MCALL  = RW(11)
20  val EX_IPF    = RW(12)
21  val EX_LPF    = RW(13)
22  // 14 Reserved
23  val EX_SPF    = RW(15)
24  // double trap
25  val EX_DBLTRP = RW(16)
26  // 17 Reserved
27  // software check
28  val EX_SWC    = RW(18)
29  // hardware error
30  val EX_HWE    = RW(19)
31  val EX_IGPF   = RW(20)
32  val EX_LGPF   = RW(21)
33  val EX_VI     = RW(22)
34  val EX_SGPF   = RW(23)
35  // 24-31 Designated for custom use
36  // 32-47 Reserved
37  // 48-63 Designated for custom use
38  // >= 64 Reserved
39
40  def getAddressMisaligned = Seq(EX_IAM, EX_LAM, EX_SAM)
41
42  def getAccessFault = Seq(EX_IAF, EX_LAF, EX_SAF)
43
44  def getPageFault = Seq(EX_IPF, EX_LPF, EX_SPF)
45
46  def getGuestPageFault = Seq(EX_IGPF, EX_LGPF, EX_SGPF)
47
48  def getLSGuestPageFault = Seq(EX_LGPF, EX_SGPF)
49
50  def getFetchFault = Seq(EX_IAM, EX_IAF, EX_IPF)
51
52  def getLoadFault = Seq(EX_LAM, EX_LAF, EX_LPF)
53
54  def getStoreFault = Seq(EX_SAM, EX_SAF, EX_SPF)
55
56  def getALL = Seq(EX_SGPF, EX_VI, EX_LGPF, EX_IGPF, EX_HWE, EX_SWC, EX_DBLTRP, EX_SPF, EX_LPF, EX_IPF, EX_MCALL, EX_VSCALL,
57    EX_HSCALL, EX_UCALL, EX_SAF, EX_SAM, EX_LAF, EX_LAM, EX_BP, EX_II, EX_IAF, EX_IAM)
58}
59