SimTop.scala (d4aca96cccdcdafa80dd344996e18d1978a01af7) | SimTop.scala (c21bff99db38ffd5df19a9459a048e16b7b7cb23) |
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1/*************************************************************************************** 2* Copyright (c) 2020-2021 Institute of Computing Technology, Chinese Academy of Sciences 3* Copyright (c) 2020-2021 Peng Cheng Laboratory 4* 5* XiangShan is licensed under Mulan PSL v2. 6* You can use this software according to the terms and conditions of the Mulan PSL v2. 7* You may obtain a copy of Mulan PSL v2 at: 8* http://license.coscl.org.cn/MulanPSL2 --- 5 unchanged lines hidden (view full) --- 14* See the Mulan PSL v2 for more details. 15***************************************************************************************/ 16 17package top 18 19import chipsalliance.rocketchip.config.{Config, Parameters} 20import chisel3.stage.ChiselGeneratorAnnotation 21import chisel3._ | 1/*************************************************************************************** 2* Copyright (c) 2020-2021 Institute of Computing Technology, Chinese Academy of Sciences 3* Copyright (c) 2020-2021 Peng Cheng Laboratory 4* 5* XiangShan is licensed under Mulan PSL v2. 6* You can use this software according to the terms and conditions of the Mulan PSL v2. 7* You may obtain a copy of Mulan PSL v2 at: 8* http://license.coscl.org.cn/MulanPSL2 --- 5 unchanged lines hidden (view full) --- 14* See the Mulan PSL v2 for more details. 15***************************************************************************************/ 16 17package top 18 19import chipsalliance.rocketchip.config.{Config, Parameters} 20import chisel3.stage.ChiselGeneratorAnnotation 21import chisel3._ |
22 | |
23import device.{AXI4RAMWrapper, SimJTAG} 24import freechips.rocketchip.diplomacy.{LazyModule, LazyModuleImp} 25import utils.GTimer 26import xiangshan.{DebugOptions, DebugOptionsKey} 27import chipsalliance.rocketchip.config._ 28import freechips.rocketchip.devices.debug._ 29import difftest._ 30 --- 75 unchanged lines hidden --- | 22import device.{AXI4RAMWrapper, SimJTAG} 23import freechips.rocketchip.diplomacy.{LazyModule, LazyModuleImp} 24import utils.GTimer 25import xiangshan.{DebugOptions, DebugOptionsKey} 26import chipsalliance.rocketchip.config._ 27import freechips.rocketchip.devices.debug._ 28import difftest._ 29 --- 75 unchanged lines hidden --- |