| #
914bbc86 |
| 20-Feb-2025 |
xiaofeibao-xjtu <[email protected]> |
chore(dispatch): remove useless code and files (#4288)
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| #
0ed0e482 |
| 20-Dec-2024 |
Guanghui Cheng <[email protected]> |
area(EXU): add parameter `needCopySrc` in FuConfig (#4063)
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| #
edb1dfaf |
| 27-Nov-2024 |
Haojin Tang <[email protected]> |
chore: use scala-provided `distinctBy`
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| #
42b6cdf9 |
| 05-Sep-2024 |
sinsanction <[email protected]> |
timing(Backend): add OG2 stage for vector mem (#3482)
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| #
f8b278aa |
| 05-Jul-2024 |
sinsanction <[email protected]> |
Backend: add reg cache data writing back path
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| #
de8bd1d0 |
| 28-May-2024 |
sinsanction <[email protected]> |
Backend: update all Params' signals and methods for v0 & vl split
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| #
82674533 |
| 15-May-2024 |
xiaofeibao <[email protected]> |
Backend: add Dispatch2IqFpImp
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| #
a4d1b2d1 |
| 13-May-2024 |
good-circle <[email protected]> |
Merge branch 'master' into vlsu-merge-master-0504
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| #
60f0c5ae |
| 26-Apr-2024 |
xiaofeibao <[email protected]> |
Backend: add FpScheduler
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| #
25df626e |
| 04-May-2024 |
good-circle <[email protected]> |
Merge branch 'master' into vlsu-tmp-master
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| #
b6279fc6 |
| 24-Apr-2024 |
Ziyue Zhang <[email protected]> |
rv64v: add ignore oldvd judgement in issue queue
1. when the instruction depend on old vd, we cannot set the srctype to imm
2. when vl = 0, we cannot set the srctype to imm because the vd keep the ol
rv64v: add ignore oldvd judgement in issue queue
1. when the instruction depend on old vd, we cannot set the srctype to imm
2. when vl = 0, we cannot set the srctype to imm because the vd keep the old value
3. when vl = vlmax, we can set srctype to imm when vta is not se
show more ...
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| #
ec49b127 |
| 19-Apr-2024 |
sinsanction <[email protected]> |
Backend: reduce the width of LoadDependency to 2 bits
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| #
7e4f0b19 |
| 17-Apr-2024 |
Ziyue-Zhang <[email protected]> |
rv64v: fix the logic of writing vtype for vsetvl instruction (#2875)
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| #
17985fbb |
| 01-Feb-2024 |
Ziyue Zhang <[email protected]> |
rv64v: fix vxrm and frm connection for vector instructions
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| #
596af5d2 |
| 20-Dec-2023 |
Haojin Tang <[email protected]> |
Scheduler: implement wakeup from LoadUnit
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| #
4c5a0d77 |
| 06-Dec-2023 |
xiaofeibao-xjtu <[email protected]> |
WakeupQueue: Copy all bits
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| #
0c7ebb58 |
| 04-Dec-2023 |
xiaofeibao-xjtu <[email protected]> |
WakeupQueue: pdest copy
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| #
f39a61a1 |
| 29-Nov-2023 |
zhanglyGit <[email protected]> |
Backend: remove per IQ's wbWakeup
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| #
670870b3 |
| 25-Oct-2023 |
Xuan Hu <[email protected]> |
backend: support hybrid unit
* filter not fake unit when generate bundles
* add fake exu unit
* hybrid unit use one load writeback port and one store writeback port
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| #
b133b458 |
| 21-Oct-2023 |
Xuan Hu <[email protected]> |
backend,mem: support HybridUnit
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| #
83ba63b3 |
| 11-Oct-2023 |
Xuan Hu <[email protected]> |
fix merge error
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| #
39c59369 |
| 03-Aug-2023 |
Xuan Hu <[email protected]> |
params,backend: refactor RegFile parameters
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| #
10fe9778 |
| 20-Jul-2023 |
Xuan Hu <[email protected]> |
backend: remove IssueQueueCancelBundle
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| #
c0be7f33 |
| 19-Jul-2023 |
Xuan Hu <[email protected]> |
backend,iq: split wake up bundles, add cancel bundle
* Split IssueQueueWakeUpBundle into IssueQueueWBWakeUpBundle and IssueQueueIQWakeUpBundle.
* Add cancel bundle used to cancel waked-up uop src
*
backend,iq: split wake up bundles, add cancel bundle
* Split IssueQueueWakeUpBundle into IssueQueueWBWakeUpBundle and IssueQueueIQWakeUpBundle.
* Add cancel bundle used to cancel waked-up uop src
* Add srcTimer in StatusArray to record the cycles src has been waked up
* Add dataSources in StatusArray to record the source of src data (reg, forward, bypass or none)
* Remove useless ready field in StatusArray
show more ...
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| #
5d2b9cad |
| 19-Jul-2023 |
Xuan Hu <[email protected]> |
backend: add BypassNetwork
|