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72d992a6 |
| 28-Mar-2022 |
Xianjun Jiao <[email protected]> |
More correct hw flag set via ieee80211_hw_set to prevent:
Some client, like iPhone, always has frequent PS (Power Saving) state change like this: sdr0: STA e2:72:49:82:a6:a0 aid 1 enters power save
More correct hw flag set via ieee80211_hw_set to prevent:
Some client, like iPhone, always has frequent PS (Power Saving) state change like this: sdr0: STA e2:72:49:82:a6:a0 aid 1 enters power save mode sdr0: STA e2:72:49:82:a6:a0 aid 1 exits power save mode sdr0: STA e2:72:49:82:a6:a0 aid 1 sending 0 filtered/0 PS frames since STA woke up Now with these correct hw flag setting, the link is more stable
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921f612e |
| 28-Mar-2022 |
Xianjun Jiao <[email protected]> |
Only support 40MHz sps and non offset tuning now
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9f07176e |
| 28-Mar-2022 |
Xianjun Jiao <[email protected]> |
Remove the unused code in openwifi_dev_probe()
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cb810548 |
| 28-Mar-2022 |
Xianjun Jiao <[email protected]> |
Add helper functions for rssi_half_db rssi_dbm conversion and rssi_correction lookup table: and use them for priv->rssi_correction/priv->last_auto_fpga_lbt_th initialization in openwifi_dev_probe()
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7b2f8bdf |
| 28-Mar-2022 |
Xianjun Jiao <[email protected]> |
Align the inital actual_tx_lo/actual_rx_lo to rf_init_11n.sh: Make it far from our usual 2.4/5GHz to force ad9361 to calibration while up in 2.4/5GHz due to large tuning offset from the original freq
Align the inital actual_tx_lo/actual_rx_lo to rf_init_11n.sh: Make it far from our usual 2.4/5GHz to force ad9361 to calibration while up in 2.4/5GHz due to large tuning offset from the original frequency (1GHz)
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ffd377ca |
| 28-Mar-2022 |
Xianjun Jiao <[email protected]> |
Adjust the err code and print in openwifi_dev_probe()
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7b380560 |
| 28-Mar-2022 |
Xianjun Jiao <[email protected]> |
Remove the short GI capability report from driver for: stability with minor throughput loss
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8e13e72b |
| 28-Mar-2022 |
Xianjun Jiao <[email protected]> |
Add set_antenna and get_antenna implementations to ieee80211_ops
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76b1a6a1 |
| 28-Mar-2022 |
Xianjun Jiao <[email protected]> |
Adjust the driver arguments while loading/insert: 1. test_mode 0 -- normal, no aggregation (AMPDU); test_mode 1 -- experimental, has AMPDU support 2. init_tx_att -- initial tx attenuation in dB*1000
Adjust the driver arguments while loading/insert: 1. test_mode 0 -- normal, no aggregation (AMPDU); test_mode 1 -- experimental, has AMPDU support 2. init_tx_att -- initial tx attenuation in dB*1000 format. example: put 20000 for 20dB
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91a6d831 |
| 28-Mar-2022 |
Xianjun Jiao <[email protected]> |
Improve the openwifi_is_radio_enabled() according to the new design
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e21492d7 |
| 28-Mar-2022 |
Xianjun Jiao <[email protected]> |
Driver register initialization optimization: keep software registers persistent between NIC down and up for multiple times
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56203843 |
| 28-Mar-2022 |
Xianjun Jiao <[email protected]> |
Add runtime tx/rx antenna switch support to driver
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b196f496 |
| 28-Mar-2022 |
Xianjun Jiao <[email protected]> |
Add priv->actual_tx_lo preparing for further tx/rx related setting
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2ae501ca |
| 28-Mar-2022 |
Xianjun Jiao <[email protected]> |
Disable TID in sdr.c:
By default the TID is disabled in FPGA, because we currently try to TX and RX traffic for all TIDs. So, the TID related operations in sdr.c are removed.
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7d0af6df |
| 28-Mar-2022 |
Xianjun Jiao <[email protected]> |
Move sdrctl testmode cmd out to sdrctl_intf.c
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9cd584f8 |
| 06-Jan-2022 |
mmehari <[email protected]> |
Missing aggregation rules
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385339ab |
| 06-Jan-2022 |
mmehari <[email protected]> |
tx_interrupt if/else optimization
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0c0d5d82 |
| 06-Jan-2022 |
mmehari <[email protected]> |
use FPGA fifo count registers instead of software queue_cnt
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c0981124 |
| 06-Jan-2022 |
mmehari <[email protected]> |
bug fixes: 1) update start_idx and blk_ack_ssn variables, 2) revert printing switch 3) update use_short_gi type (bool -> u8), 4) advance skb->tail by num_byte_pad for non aggregation flow
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f738aefa |
| 06-Jan-2022 |
mmehari <[email protected]> |
A-MPDU tx aggregation support
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261bb9ee |
| 06-Jan-2022 |
mmehari <[email protected]> |
A-MPDU rx aggregation support
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72c90e5e |
| 13-Oct-2021 |
Jiao Xianjun <[email protected]> |
Merge pull request #104 from open-sdr/fix_large_ping_delay_igent
Fix the issue of iGent env related big ping delay:
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b60e485e |
| 04-Oct-2021 |
Xianjun Jiao <[email protected]> |
Fix the possible wrong last_auto_fpga_lbt_th saving: 1. Remove the last_auto_fpga_lbt_th saving from sdrctl set reg command. Otherwise, repeated sdrctl set reg will save wrong value into last_auto_fp
Fix the possible wrong last_auto_fpga_lbt_th saving: 1. Remove the last_auto_fpga_lbt_th saving from sdrctl set reg command. Otherwise, repeated sdrctl set reg will save wrong value into last_auto_fpga_lbt_th 2. The last_auto_fpga_lbt_th is only set in ad9361_rf_set_channel, which is called at least once by Linux after NIC is up
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109b1cfd |
| 29-Sep-2021 |
Xianjun Jiao <[email protected]> |
Fix the issue of iGent env related big ping delay: 1. The issue only happens at zcu102 side, when it is tested as AP together with zedboard 2. The issue does not happen when zcu102 is client and zedb
Fix the issue of iGent env related big ping delay: 1. The issue only happens at zcu102 side, when it is tested as AP together with zedboard 2. The issue does not happen when zcu102 is client and zedboard is AP 3. The issue (most likely) does not happen in places other than iGent (like Pablo home) 4. Sometimes it does happen at my home when I test zcu102 as AP together with COTS WiFi 5. Indeed seems like the environment related. Guess some quick small packets in the environment quickly flush/round-up/mess-up the rx dma cyclic buffer, and the rx interrupt internal static variable target_buf_idx_old loses track of the background automatic rx dma cyclic buffer 6. The fix is for all board types (zcu102, zedboard, 7035, etc) 7. The driver compiling make_all.sh script generates USE_NEW_RX_INTERRUPT macro to pre_def.h to enable the new code (while keeping the old code). You can use the script as before. 8. The logic of the fix is that exhaustive search all the rx dma cyclic buffer in rx interrupt to get packet to Linux in the first place.
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8598d294 |
| 28-Sep-2021 |
Xianjun Jiao <[email protected]> |
Use drv_xpu register 0 for LBT threshold setting. 0 will enable FPGA threshold auto setting by ad9361_rf_set_channel() in sdr.c. Other value will set static threshold (that value) to FPGA
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