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Searched defs:s1_paddr (Results 1 – 4 of 4) sorted by relevance

/XiangShan/src/main/scala/xiangshan/cache/dcache/storepipe/
H A DStorePipe.scala34 val s1_paddr = Output(UInt(PAddrBits.W)) constant
121 val s1_paddr = io.lsu.s1_paddr constant
/XiangShan/src/main/scala/xiangshan/mem/pipeline/
H A DStoreUnit.scala293 val s1_paddr = io.tlb.resp.bits.paddr(0) constant
/XiangShan/src/main/scala/xiangshan/cache/mmu/
H A DTLB.scala577 val s1_paddr = Cat(s1_ppn, get_off(req_out(idx).vaddr)) constant
/XiangShan/src/main/scala/xiangshan/mem/prefetch/
H A DSMSPrefetcher.scala179 val s1_paddr = RegEnable(io.s0_lookup.bits.paddr, s0_valid) constant