/XiangShan/scripts/ |
H A D | vlsi_mem_gen | 19 def __format_width(self, width): argument 25 def add_io(self, io_type, width, name): argument 30 def add_input(self, width, name): argument 33 def add_output(self, width, name): argument 36 def add_decl(self, decl_type, width, name, depth=1): argument 41 def add_decl_reg(self, width, name, depth=1): argument 44 def add_decl_ram(self, width, name, depth=1): argument 49 def add_decl_wire(self, width, name, depth=1): argument
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/XiangShan/src/main/scala/xiangshan/cache/mmu/ |
H A D | Repeater.scala | 651 val width = tlb.req.size constant 663 val width = tlb.req.size constant 676 val width = tlb.req.size constant 688 val width = tlb.req.size constant 703 val width = tlb.req.size constant 715 val width = tlb.req.size constant 730 val width = tlb.req.size constant 742 val width = tlb.req.size constant
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H A D | MMUConst.scala | 182 val width = v.getWidth constant
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H A D | MMUBundle.scala | 404 def width: Int = 2 method
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/XiangShan/src/main/scala/utils/ |
H A D | NamedUInt.scala | 16 def width: Int = int method
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/XiangShan/src/main/scala/xiangshan/backend/fu/vector/ |
H A D | Bundles.scala | 192 def width(implicit p: Parameters) = p(XSCoreParamsKey).vlWidth method 198 def width(implicit p: Parameters) = p(XSCoreParamsKey).vlWidth - 1 method 212 def width(implicit p: Parameters) = log2Up(p(XSCoreParamsKey).maxElemPerVreg) + 1 method
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/XiangShan/src/main/scala/xiangshan/backend/datapath/ |
H A D | WbFuBusyTable.scala | 111 val width = deqRespSel.map(x => x.getWidth).max constant
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/XiangShan/src/main/scala/top/ |
H A D | Top.scala | 67 val width = ResourceInt(2) constant
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H A D | XSNoCTop.scala | 49 val width = ResourceInt(2) constant
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/XiangShan/src/main/scala/xiangshan/backend/fu/ |
H A D | FuType.scala | 142 def width = num method
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/XiangShan/src/main/scala/xiangshan/backend/decode/ |
H A D | DecodeUnitComp.scala | 141 val width = instFields.WIDTH(1, 0) constant
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/XiangShan/src/main/scala/xiangshan/backend/ |
H A D | Bundles.scala | 884 def width = 4 // 0~15 // Todo: assosiate it with FuConfig method 931 def width(implicit p: Parameters): Int = p(XSCoreParamsKey).backendParams.numExu method
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/XiangShan/src/main/scala/xiangshan/mem/prefetch/ |
H A D | L1PrefetchComponent.scala | 60 val width = VADDR_HASH_WIDTH constant
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H A D | SMSPrefetcher.scala | 116 val width = VADDR_HASH_WIDTH constant
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/XiangShan/src/main/scala/xiangshan/frontend/ |
H A D | FrontendBundle.scala | 111 def width: Int = 2 method
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